High Frequency Analog Research Articles

Analysis of III–V Heterojunction TFET for High-Frequency Analog Applications

Analysis of III–V Heterojunction TFET for High-Frequency Analog Applications

Exploiting Ambipolarity in Graphene Field-Effect Transistors for Novel Designs on High-Frequency Analog Electronics.

Exploiting ambipolar electrical conductivity based on graphene field-effect transistors has raised enormous interest for high-frequency (HF) analog electronics. Controlling the device polarity, by biasing the graphene transistor around the vertex of the V-shaped transfer curve, enables to redesign and highly simplify conventional analog circuits, and simultaneously to seek for multifunctionalities, especially in the HF domain. This study presents new insights for the design of different HF applications such as power amplifiers, mixers, frequency multipliers, phase shifters, and modulators that specifically leverage the inherent ambipolarity of graphene-based transistors.

Quantum Effect Dependent Modelling of Short Channel Junctionless Double Gate Stack(SC-JL-DG) MOSFET for High Frequency Analog Applications

In this paper, the quantum effect has been induced on Junctionless (JL)-Double Gate metal-oxide-semiconductor field-effect transistors (JL-DGMOSFET) with gate oxide stack to study its effect on different device parameters like surface potential, threshold voltage, Id, Vg, gm, channel length etc. The study has been extended on Ion/Ioff change w.r.t. the variation in spacer width for varied channel thickness. In order to extend the efficacy of the results an analytical model has been formulated. The analytical model is developed by incorporating the Schrodinger equation in the conventional 2-D Poisson's equation, which has further been solved by applying the boundary conditions to obtain the final expression for potential and change in threshold voltage (Vth). The device parameters are in accordance for both the simulated and analytical results. The simulation work has been supported by the ATLAS device simulation.

Power-over-Fiber with Simultaneous Transmission of Optical Carrier for a High Frequency Analog Signal over Standard Single-Mode Fiber

Efficient simultaneous transmission of light with a power of more than 2 W at a wavelength of 976 nm and an optical carrier for transmitting a high-frequency analog signal at a wavelength of 1550 nm over a distance of 1 km over a standard single-mode fiber was experimentally demonstrated. Electrical power up to 350 mW (5 V, 70 mA) was obtained from a multi-junction silicon photocell, resulting in the optical transmission efficiency of about 70% and a photocell efficiency of 25%. The power transmission did not affect the transmission of the high frequency analog signal. Key broadband analog transmission characteristics such as noise figure (NF < 25 dB) and spurious-free dynamic range (SFDR3 > 117 dB/Hz2/3) were achieved and were close to the fundamental shot noise limit. This approach is promising for powering a remote antenna unit in optical fronthaul architecture.

Dual-Gate Junctionless FET on SOI for High Frequency Analog Applications

This paper presents a dual-gate junctionless FET (DGJLT) on SOI for enhanced analog/RF performance. The Si channel of device is sandwiched between the two gates placed in separate vertical trenches. The proposed structure is studied for moderately doped drain (MDD) and heavily doped drain (HDD) concentrations. The analog/RF performance parameters of both the configurations are analysed and compared using ATLASTM TCAD simulator. The simulation results reveal that the HDD-DGJLT provides superior performance as compared to MDD-DGJLT in terms of gm, fT and fmax. At a gate length of 20 nm, the HDD-DGJLT exhibits a peak gm, fT and fmax of 3102 μS/μm, 554 GHz and 875 GHz, respectively, which are significantly higher as compared to the reported DG-JLFETs in the literature. Therefore, the proposed HDD-DGJLT can be considered as a better choice for high frequency small signal applications.

Small signal model and RF performance analysis of InAs/GaSb hetero-junction tunneling field effect transistor

This work presents a comprehensive study of small-signal parameters based on radio frequency (RF) data of a heterojunction tunnel field effect transistor (HJ-TFET). The TFET device shows excellent small-signal analog and RF performance. Numerical device simulations of the optimized HJ-TFET shows ION/IOFF ratio of ~6 orders of magnitude. It is found that gate voltage dependency of HJ-TFET on the intrinsic parameters obtained from the non-quasi static (NQS) model differ from the conventional MOSFET due to band to band tunneling mechanism and inversion layer formation in the device. Based on this mechanism, the high frequency analog and RF performance of HJ-TFET were investigated using TCAD and modeled using NQS model, which was verified upto 100 GHz. The modeling results showed excellent agreement with the simulated small-signal parameters at multiple drain voltages (Vd). f

High-K Spacer Dual-Metal Gate Stack Underlap Junctionless Gate All Around (HK-DMGS-JGAA) MOSFET for high frequency applications

High-K Spacer based Dual-Metal Gate Stack Junctionless Gate All Around (HK-DMGS-JGAA) MOSFET has been proposed and analyzed in this paper for high frequency analog ad RF applications. It has been done by comparing it with the existing Junctionless devices in particular, Junctionless-Gate All Around, Junctionless Gate All Around Underlap and Dual-Metal Junctionless Gate All Around Underlap MOSFET. It is so found that HK-DMGS-JGAA MOSFET shows higher Ids, gm, gd and fT over existing Junctionless device architectures making it a suitable device for high frequency analog applications. It has also been established that HK-DMGS-JGAA MOSFET has better ION/IOFF ratio, Subthreshold Slope (SS) most close to the ideal values, lower Channel Resistance, Rch, higher Early Voltage (VEA), higher Frequency Transconductance Product, superior Transconductance Generation Factor, Maximum gains in terms of current gain, Maximum Transducer Power Gain and Unilateral Power Gain, superior noise performance in terms of the Noise Conductivity and Noise Figure. All these improved figure of merits warrant HK-DMGS-JGAA MOSFET as the best suited device design for various analog and digital applications along with high frequency applications.

An Inductor Current Estimator for Digitally Controlled Synchronous Buck Converter

Inductor current is an important feedback parameter in synchronous buck converters (SBCs). It is used for overcurrent protection, current sharing among interleaved modules, and current-mode feedback regulation, among others. While implementing a digital controller, inductor current is sensed and fed into the controller through a high sampling frequency analog to digital converter (ADC). As the switching frequency of the converter becomes higher, the need for an even higher sampling frequency ADC also goes up, which is a distinct disadvantage in terms of the overall cost. This paper discusses a simple current estimation technique that avoids use of any expensive current sensor and high sampling frequency ADCs. The paper shows that in a buck converter, inductor current can be estimated by tracking the width of the switch node voltage. Implementation and limitations of the proposed current estimation scheme are discussed in detail. The proposed method is validated using a 3.3 V–15 A SBC prototype and results show the estimation technique is accurate within 5% with a converter switching frequency of 800 kHz. In order to prove the effectiveness of the technique in feedback regulation, the current estimation technique is used to implement average current mode and hysteretic current mode control on a SBC. To prove the effectiveness of the proposed current estimation scheme, it is used in closed-loop control of the SBC to verify the dynamic responses, such as start-up transient, step change in load, and reference.

Алгоритм дискретной параметрической оптимизации для решения задач синтеза аналоговых фильтров диапазона очень высоких частот

Алгоритм дискретной параметрической оптимизации для решения задач синтеза аналоговых фильтров диапазона очень высоких частот

Designing of High Frequency Analog Filter using 45nm CMOS based CCII

Designing of High Frequency Analog Filter using 45nm CMOS based CCII

Hafnium oxide based cylindrical junctionless double surrounding gate (CJLDSG) MOSFET for high speed, high frequency digital and analog applications

In this paper Hafnium Oxide (HfO2) based cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET has been analyzed for various metrics of device performance. HfO2 based CJLDSG MOSFET has been compared with HfO2 based Cylindrical Junctionless Surrounding Gate (CJLSG) MOSFET and Silicon Oxide (SiO2) based CJLDSG MOSFET and CJLSG MOSFET. It has been observed that HfO2 based CJLDSG MOSFET shows improved analog performance in terms of higher drain current, higher transconductance, higher output conductance (gd), higher Transconductance Generation Factor (TGF), higher Early Voltage (VEA), Maximum Transducer Power Gain (MTPG), Current Gain and Subthreshold Slope (SS) close to 60 mV/decade. HfO2 based CJLDSG MOSFET shows lower channel resistance. The Cut Off Frequency (fT) and Frequency Transconductance Product (FTP) of HfO2 based CJLDSG MOSFET is maximum among all and it also offers highest frequency of operation. It also shows higher Ion/Ioff ratio. Thus, making HfO2 based CJLDSG MOSFET an ultimate device for high speed, high frequency digital and analog applications.

Extremely uniform epitaxial growth of graphene from sputtered SiC films on SiC substrates

ABSTRACTA novel method to fabricate uniform epitaxial graphene on C-face SiC substrates was investigated. Graphene was grown on the C-face 6H-SiC substrates with a sputtered SiC film by annealing temperatures ranging from 1400 to 1900 °C under an Ar ambient. The fractional area of the graphene having the layer number of two was about 95% in a 75×75 μm square by a Raman mapping and a low energy electron microscopy. Graphene on the C-face SiC fabricated by this method is quite uniform compared to that made by a conventional method without the sputtered SiC films and is thus suitable for high frequency analog devices.

Graphene Quantum Capacitors for High Frequency Tunable Analog Applications.

Graphene quantum capacitors (GQC) are demonstrated to be enablers of radio-frequency (RF) functions through voltage-tuning of their capacitance. We show that GQC complements MEMS and MOSFETs in terms of performance for high frequency analog applications and tunability. We propose a CMOS compatible fabrication process and report the first experimental assessment of their performance at microwaves frequencies (up to 10 GHz), demonstrating experimental GQCs in the pF range with a tuning ratio of 1.34:1 within 1.25 V, and Q-factors up to 12 at 1 GHz. The figures of merit of graphene variable capacitors are studied in detail from 150 to 350 K. Furthermore, we describe a systematic, graphene specific approach to optimize their performance and predict the figures of merit achieved if such a methodology is applied.

Langmuir probe diagnostic suite in the C-2 field-reversed configuration.

Several in situ probes have been designed and implemented into the diagnostic array of the C-2 field-reversed configuration (FRC) at Tri Alpha Energy [M. Tuszewski et al. (the TAE Team), Phys. Rev. Lett. 108, 255008 (2012)]. The probes are all variations on the traditional Langmuir probe. They include linear arrays of triple probes, linear arrays of single-tipped swept probes, a multi-faced Gundestrup probe, and an ion-sensitive probe. The probes vary from 5 to 7 mm diameter in size to minimize plasma perturbations. They also have boron nitride outer casings that prevent unwanted electrical breakdown and reduce the introduction of impurities. The probes are mounted on motorized linear-actuators allowing for programmatic scans of the various plasma parameters over the course of several shots. Each probe has a custom set of electronics that allows for measurement of the desired signals. High frequency ( > 5MHz) analog optical-isolators ensure that plasma parameters can be measured at sub-microsecond time scales while providing electrical isolation between machine and data acquisition systems. With these probes time-resolved plasma parameters (temperature, density, spatial potential, flow, and electric field) can be directly/locally measured in the FRC jet and edge/scrape-off layer.

Continuous-time analog filter in CMOS nanoscale era

Analog filters are key blocks in analog signal processing. They are widely employed in many systems, like wireless transceivers, detectors read-out, sensors interfaces, etc. The IC technology choice for such systems is mainly dictated by the requirements of high speed and low power consumption of digital circuits. This pushed an impressive movement towards scaled technology and this has important consequences on the analog circuits design. The impact of technology scaling down to nanometre scale on analog filters design is here investigated. For instance, supply voltage reduction in analog filters limits circuits design solutions and could result in higher power consumption. Moreover, at the same time, innovative systems push analog filters to get higher and higher operation frequencies, due to the increasing bandwidth/speed requirements. Recent solutions for efficient low-voltage and high frequency analog filters in nanometre technology are described.

Experimental Demonstration of LD-Based Bidirectional Fiber-Optic Chaos Communication

A fiber-optic chaos communication system for allowing bidirectional message transmission is first constructed and experimentally demonstrated. Using the synchronized chaos outputs of two authorized semiconductor lasers as communication carriers, two oppositely transmitted high frequency analog messages (3 and 4 GHz) can be encrypted and decrypted between two communication terminals over a 10-km single mode fiber channel. Furthermore, two data streams with bit rates of 2.5 Gb/s can also be bidirectionally encrypted and decrypted with bit-error-rates estimated below 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> .

Successive approximation pipelined ADC with one clock cycle conversion rate

An N -bit successive approximation pipelined (SAP) analogue-to-digital converter (ADC) with a conversion rate equal to the clock frequency is presented. The ADC implements the successive approximation algorithm using parallelism and pipelining to sample the input and generate an N -bit digital output at each clock cycle. The latency is N clock cycles. The requirement for the residue circuit (high frequency analogue subtract and multiply) between pipeline stages in traditional pipelined ADCs is eliminated, which significantly reduces the sensitivity to comparator offset and component mismatch. The combination of energy efficient SAR sub-circuits with conversion rate greater than 1.0 GHz when implemented in CMOS nanotechnology makes the SAP ADC an attractive option for high performance wireless and wireline applications.

Design Flow for High Switching Frequency and Large-Bandwidth Analog DC/DC Step-Down Converters for a Polar Transmitter

System-on-chip requirements for energy management push both technology and design of voltage regulators to their limits. Integration constraints are added to high performance needs in terms of power efficiency and dynamic performance of the power converters. Switch-mode power supplies (SMPSs) are intended to supplant linear voltage regulators. This paper details a methodology to deal with different tradeoffs introduced by various specifications and constraints of embedded SMPSs. The design methodology is applied to the standard analog step-down SMPS architecture operating at very high switching frequency, and verified experimentally. The results are measured on test chips fabricated in standard 0.25-m BiCMOS technology, operating between 10 and 200 MHz, respectively, with a power efficiency up to 80% and a small-signal bandwidth of 1.2 and 15 MHz, respectively.

The Research of Current Ripple on Interleaving Parallel High-Frequency Rectifier

Interleaving Parallel is the unique technology with the combination of SPWM modulation technology with multiple technology. This paper was researched the interleaving parallel rectifier technology in restraining the AC side current ripple in detail, and compared current ripple in the AC side between the single rectifier and the interleaving parallel rectifier. The research was deduced that current ripple in the AC side of the interleaving parallel rectifier was lessened than the same parameters of the single rectifier. The relevant simulations were verified the characteristic of restraining the current ripple in the AC side in interleaving High-Frequency rectifier was effective.

A Design of Parallel High Frequency Dynamometer Fixture

Micro milling force is the main parameter in motoring dynamic cutting process. The natural frequency of dynamometer is the key factor in the accurate measurement of high speed milling force. In this paper, a new structure fixture is designed, and the natural frequency of the fixture is obtained by finite element methods. After optimizing the structure design, the fixture is produced for the force signal acquisition system, together with the forces transducer, signal acquisition card and the software based on the LabVIEW. The experiment shows that the design of the fixture can meet the requirements of force acquisition.