High Field-effect Mobility Research Articles

Thermal atomic layer deposition-processed InHfZnO thin film transistors with excellent stability

In recent years, the downscaling of transistors has sparked considerable interest in the advancement of amorphous oxide semiconductors, particularly indium-hafnium-zinc oxide (IHZO) has remarkable potential in applications such as high-resolution displays and 3D NAND. For the first time, we propose the fabrication of IHZO thin film transistors (TFTs) via thermal atomic layer deposition (TH-ALD). The preparation, electrical properties, and stability of IHZO TFTs are investigated. The performance of TFT deposited at 250 °C and annealed in N2 atmosphere at 300 °C exhibits a high field-effect mobility (μ) of 22.53 cm2/Vs, a high Ion/Ioff of ∼107, a low threshold voltage (Vth) of 0.15 V, and a minimum subthreshold swing (SS) of 0.24 V/decade. Furthermore, the threshold voltage shifts (ΔVth) in TFTs annealed in N2 and O2 are 0.31 and 0.16 V, respectively. These enhancements are attributed to the defects suppression and remaining ionized oxygen vacancies result in increased electron concentration in N2-annealed films. In comparison, O2 annealing causes a reduction in field effect mobility but concurrently enhances stability due to the direct passivation of defects, which leads to fewer oxygen vacancies. Additionally, Hf content can also impact the performance of TFT devices, even a small addition of Hf also results in the effective reduction of the carrier concentration. These findings provide valuable insights into the device mechanism of IHZO TFTs, presenting a novel avenue for comprehending and augmenting their overall performance.

Solution-processable ordered defect compound semiconductors for high-performance electronics.

Solution-processable semiconductors hold promise in enabling applications requiring cost-effective electronics at scale but suffer from low performance limited by defects. We show that ordered defect compound semiconductor CuIn5Se8, which forms regular defect complexes with defect-pair compensation, can simultaneously achieve high performance and solution processability. CuIn5Se8 transistors exhibit defect-tolerant, band-like transport supplying an output current above 35 microamperes per micrometer, with a large on/off ratio greater than 106, a small subthreshold swing of 189 ± 21 millivolts per decade, and a high field-effect mobility of 58 ± 10 square centimeters per volt per second, with excellent uniformity and stability, superior to devices built on its less defective parent compound CuInSe2, analogous binary compound In2Se3, and other solution-deposited semiconductors. They can be monolithically integrated with carbon nanotube transistors to form high-speed and low-voltage three-dimensional complementary logic circuits and with micro-light-emitting diodes to realize high-resolution displays.

Heterogeneous monolithic 3D integration for hybrid vertical CMOS inverter using n-type IGTO TFT on p-type Si FET

In this work, a complementary metal oxide semiconductor (CMOS) vertical inverter using heterogeneous monolithic 3D (M3D) integration with p-type Si field-effect transistor (FET) and n-type indium-gallium-tin-oxide (IGTO) thin film transistor (TFT) was implemented and characterized. This CMOS inverter was attained by vertical stacking n-type IGTO TFT on p-type Si FET. Oxide semiconductor materials such as indium-gallium-zinc-oxide (IGZO), indium-tungsten-oxide (IWO), indium oxide (In2O3) and IGTO are being considered as potential options for channel materials in M3D integration technology due to high electrical characteristics and low temperature process. Among them, IGTO was employed as a channel material to achieve high mobility. We fabricated a n-type IGTO TFT using HfO2 and tungsten as a gate dielectric and electrode, respectively. The post-annealing process was conducted at 200–500 °C with 50 °C intervals. The IGTO TFT exhibits a high field-effect mobility (32.9 cm2/Vs), low sub-threshold swing (0.070 V/dec) and stable reliability behaviour (ΔVth < 0.4 V) against various external gate bias temperature stress tests in a low temperature (<500 °C). The stable heterogeneous vertical inverter performance such as voltage-transfer curve (VM = 1.66 V), voltage gain (30.1 V at VDD = 3 V), and noise margin (NMH = 1.22 V, NML = 1.34 V) were well behaved. This M3D integration-based hybrid CMOS inverter can be an alternative knob toward various device applications.

Solution-processed high-k photopatternable polymers for low-voltage electronics.

High dielectric constant (k) polymers have been widely explored for flexible, low-power-consumption electronic devices. In this work, solution-processable high-k polymers were designed and synthesized by ultraviolet (UV) triggered crosslinking at a low temperature (60 °C). The highly crosslinked network allows for high resistance to organic solvents and high breakdown strength over 2 MV cm-1. The UV-crosslinking capability of the polymers enables them to achieve a high-resolution pattern with a feature size down to 1 μm. Further investigation suggests that the polar cyano pendants in side chains are responsible for increasing the dielectric constant up to 10 in a large-area device array, thereby contributing to a low driving voltage of 5 V and high field-effect mobility exceeding 20 cm2 V-1 s-1 in indium gallium zinc oxide (IGZO) thin-film transistors (TFTs). In addition, the solution-processable high-k dielectric polymers were utilized to fabricate flexible low-voltage organic TFTs, which show highly reliable and reproducible mechanical stability at a bending radius of 5 mm after 1000 cycles. And also, the high radiation stability of the dielectric polymers was observed in a UV-sensitive TFT device, thereby achieving highly reproducible pattern recognition, which is promising for artificial optic nerve circuits.

Passivated indium oxide thin-film transistors with high field-effect mobility (128.3 cm2 V−1 s−1) and low thermal budget (200 °C)

Here, we demonstrate a high-mobility indium oxide (In2O3) thin-film transistor (TFT) with a sputtered alumina (Al2O3) passivation layer (PVL) with a low thermal budget (200 °C). The sputtering process of the Al2O3 PVL plays a positive role in improving the field-effect mobility (µ FE) and current on/off ratio (I ON/I OFF) performance of the In2O3 TFTs. However, these enhancements are limited due to the high density of intrinsic trap defects in the In2O3 channels, as reflected in their large hysteresis and poor bias stability. Treating the In2O3 channel with oxygen (O2) plasma prior to sputtering the Al2O3 PVL results in notable improvements. Specifically, a high µ FE of 128.3 cm2V−1 s−1, a high I ON/I OFF over 106 at V DS of 0.1 V, a small hysteresis of 0.03 V, and a negligible threshold voltage shift under negative bias stress are achieved in the passivated In2O3 TFT (with O2 plasma pretreatment), representing a significant improvement compared to the passivated In2O3 TFT (without O2 plasma pretreatment) and the unpassivated In2O3 TFT. The remarkable reduction of intrinsic trap defects in the passivated In2O3 TFT compensated by O2 plasma is the primary mechanism underlying the improvement in µ FE and bias stability, as validated by x-ray photoelectron spectra, hysteresis analysis, and temperature-stress electrical characterizations. Plasma treatment effectively compensates for intrinsic trap defects in oxide semiconductor (OS) channels, when combined with sputter passivation, resulting in a significant enhancement of the overall performance of OS TFTs under low thermal budgets. This approach offers valuable insights into advancing OS TFTs with satisfactory driving capability and wide applicability.

Enhanced Performance of P-Channel CuIBr Thin-Film Transistor by ITO Surface Charge-Transfer Doping.

The process development and optimization of p-type semiconductors and p-channel thin-film transistors (TFTs) are essential for the development of high-performance circuits. In this study, the Br-doped CuI (CuIBr) TFTs are proposed by the solution process to control copper vacancy generation and suppress excess holes formation in p-type CuI films and improve current modulation capabilities for CuI TFTs. The CuIBr films exhibit a uniform surface morphology and good crystalline quality. The on/off current (ION/IOFF) ratio of CuIBr TFTs increased from 103 to 106 with an increase in the Br doping ratio from 0 to 15%. Furthermore, the performance and operational stability of CuIBr TFTs are significantly enhanced by indium tin oxide (ITO) surface charge-transfer doping. The results obtained from the first-principles calculations well explain the electron-doping effect of ITO overlayer in CuIBr TFT. Eventually, the CuIBr TFT with 15% Br content exhibits a high ION/IOFF ratio of 3 × 106 and a high hole field-effect mobility (μFE) of 7.0 cm2 V-1 s-1. The band-like charge transport in CuIBr TFT is confirmed by the temperature-dependent measurement. This study paves the way for the realization of transparent complementary circuits and wearable electronics.

High-mobility and high-reliability Zn-incorporated amorphous In2O3-based thin-film transistors

Polycrystalline indium oxide-based thin film transistors (In2O3 TFTs) have attracted considerable attention because of high field effect mobility (μ FE ∼ 100 cm2 V−1 s−1). However, In2O3 TFTs exhibit poor reliability owing to the adsorption and/or desorption of gas molecules at the grain boundaries. The incorporation of Zn suppresses the crystallization of In2O3. Herein, we systematically studied the effect of Zn incorporation into In2O3 TFTs. The crystallization of In2O3 was suppressed when the Zn concentration ranged from 25% to 68%. Amorphous InZnO (IZO) TFTs with 25% Zn exhibited the highest μ FE of 41 cm2 V−1 s−1 and excellent reliability. In contrast, polycrystalline IZO TFTs showed a low μ FE <12 cm2 V−1 s−1 due to the formation of grain boundaries, and poor reliability after positive gate bias, mostly due to electron trapping at the polycrystalline/insulator interface. These results render an approach to realize In2O3 TFTs that show reasonably high μ FE and excellent reliability.

P‐13: Excessive Oxygen induced Threshold Voltage Shifts in High Mobility Top‐Gate PrIZO TFTs

The top gate self‐alignment (TGSA) Praseodymium‐doped indium zinc oxide (PrIZO) thin film transistor (TFT) was fabricated with different process condition in our production line, and high field effect mobility of 40.83 cm2 V‐1 s‐1 was obtained by regulating the GI and ILD parameters. At the same time, the devices show excellent stability with PBTS of 0.52 V and NBTIS of ‐0.9 V, indicating its potential in overcoming the trade‐off between mobility and reliability.

An inorganic-blended p-type semiconductor with robust electrical and mechanical properties

Inorganic semiconductors typically have limited p-type behavior due to the scarcity of holes and the localized valence band maximum, hindering the progress of complementary devices and circuits. In this work, we propose an inorganic blending strategy to activate the hole-transporting character in an inorganic semiconductor compound, namely tellurium-selenium-oxygen (TeSeO). By rationally combining intrinsic p-type semimetal, semiconductor, and wide-bandgap semiconductor into a single compound, the TeSeO system displays tunable bandgaps ranging from 0.7 to 2.2 eV. Wafer-scale ultrathin TeSeO films, which can be deposited at room temperature, display high hole field-effect mobility of 48.5 cm2/(Vs) and robust hole transport properties, facilitated by Te-Te (Se) portions and O-Te-O portions, respectively. The nanosphere lithography process is employed to create nanopatterned honeycomb TeSeO broadband photodetectors, demonstrating a high responsibility of 603 A/W, an ultrafast response of 5 μs, and superior mechanical flexibility. The p-type TeSeO system is highly adaptable, scalable, and reliable, which can address emerging technological needs that current semiconductor solutions may not fulfill.

High-performance tin perovskite transistors through formate pseudohalide engineering

The lack of high-performance p-type semiconducting materials hinders the integration of complementary metal-oxide semiconductors with well-established n-type metal-oxide counterparts. Although tin halide perovskites are promising p-type material candidates, their practical implementation is hindered by excessive hole concentrations and difficulties in precisely controlling crystallization, which leads to poor device performance and yield. In this paper, we propose a formate pseudohalide engineering method to overcome these issues and demonstrate high-performance tin perovskite thin-film transistors (TFTs). The incorporation of formate anion greatly suppresses the vacancy defects at the surfaces of the perovskite films with an increase in crystallinity and grain size. This reduces the hole concentration and eliminates the dependence on the addition of excessive tin fluoride for hole suppression. Hence, high-performance TFTs with a high average field-effect hole mobility of 57.34 cm2 V−1 s−1 and on/off current ratios surpassing 108 can be achieved, approaching p-channel low-temperature polysilicon devices.

Synergistic polarization engineering of dielectric towards low-voltage high-mobility solution-processed ultraflexible organic transistors

The emerging wearable skin-like electronics require the ultra-flexible organic transistor to operate at low voltage for electrical safety and energy efficiency and simultaneously enable high field-effect mobility to ensure the carrier migration ability and the switching speed of circuits. However, the currently reported low-voltage organic transistors generally present low mobility, originating from the trade-off between molecular polarity and surface polarity of the dielectrics. In this work, the orientation polarization of the dielectric is enhanced by introducing a flexible quaternary ammonium side chain, and the surface polarity is weakened by the shielding effect of the nonpolar methyl groups on the polar nitrogen atom. The resulting antisolvent QPSU dielectric enables the high-dielectric constant up to 18.8 and the low surface polarity with the polar component of surface energy only at 2.09 mJ/m2. Such a synergistic polarization engineering between orientation polarization and surface polarity makes the solution-processed ultraflexible transistors present the ultralow operational voltage down to −3 V, the ultrahigh charge-carrier mobility up to 8.28 cm2 V−1 s−1 at 1 Hz, excellent cyclic operational stability and long-term air stability. These results combined with the ultrathin thickness of transistor as low as 135 nm, the ultralight mass of 0.5 g/m2, the conformal adherence capability on human skin and 1-μm blade edge, and the strong mechanical robustness with stable electrical properties for 30,000 bending cycles, open up an available strategy to successfully realize low-voltage high-mobility solution-processed organic transistor, and presents the potential application of QPSU dielectric for the next-generation wearable imperceptible skin-like electronics.

Universal Design and Efficient Synthesis for High Ambipolar Mobility Emissive Conjugated Polymers.

High ambipolar mobility emissive conjugated polymers (HAME-CPs) are perfect candidates for organic optoelectronic devices, such as polymer light emitting transistors. However, due to intrinsic trade-off relationship between high ambipolar mobility and strong solid-state luminescence, the development of HAME-CPs suffers from high structural and synthetic complexity. Herein, a universal design principle and simple synthetic approach for HAME-CPs are developed. A series of simple non-fused polymers composed of charge transfer units, π bridges and emissive units are synthesized via a two-step microwave assisted C-H arylation and direct arylation polymerization protocol with high total yields up to 61 %. The synthetic protocol is verified valid among 7 monomers and 8 polymers. Most importantly, all 8 conjugated polymers have strong solid-state emission with high photoluminescence quantum yields up to 24 %. Furthermore, 4 polymers exhibit high ambipolar field effect mobility up to 10-2 cm2 V-1 s-1, and can be used in multifunctional optoelectronic devices. This work opens a new avenue for developing HAME-CPs by efficient synthesis and rational design.

Universal Design and Efficient Synthesis for High Ambipolar Mobility Emissive Conjugated Polymers

AbstractHigh ambipolar mobility emissive conjugated polymers (HAME‐CPs) are perfect candidates for organic optoelectronic devices, such as polymer light emitting transistors. However, due to intrinsic trade‐off relationship between high ambipolar mobility and strong solid‐state luminescence, the development of HAME‐CPs suffers from high structural and synthetic complexity. Herein, a universal design principle and simple synthetic approach for HAME‐CPs are developed. A series of simple non‐fused polymers composed of charge transfer units, π bridges and emissive units are synthesized via a two‐step microwave assisted C−H arylation and direct arylation polymerization protocol with high total yields up to 61 %. The synthetic protocol is verified valid among 7 monomers and 8 polymers. Most importantly, all 8 conjugated polymers have strong solid‐state emission with high photoluminescence quantum yields up to 24 %. Furthermore, 4 polymers exhibit high ambipolar field effect mobility up to 10−2 cm2 V−1 s−1, and can be used in multifunctional optoelectronic devices. This work opens a new avenue for developing HAME‐CPs by efficient synthesis and rational design.

Quantum octets in high mobility pentagonal two-dimensional PdSe2

Two-dimensional (2D) materials have drawn immense interests in scientific and technological communities, owing to their extraordinary properties and their tunability by gating, proximity, strain and external fields. For electronic applications, an ideal 2D material would have high mobility, air stability, sizable band gap, and be compatible with large scale synthesis. Here we demonstrate air stable field effect transistors using atomically thin few-layer PdSe2 sheets that are sandwiched between hexagonal BN (hBN), with large saturation current > 350 μA/μm, and high field effect mobilities of ~ 700 and 10,000 cm2/Vs at 300 K and 2 K, respectively. At low temperatures, magnetotransport studies reveal unique octets in quantum oscillations that persist at all densities, arising from 2-fold spin and 4-fold valley degeneracies, which can be broken by in-plane and out-of-plane magnetic fields toward quantum Hall spin and orbital ferromagnetism.

Inkjet-printed transistors with coffee ring aligned carbon nanotubes

Low-concentration deposition techniques such as inkjet printing for forming carbon nanotube (CNT) transistor channels typically result in higher on–off current ratio, while lowering the field-effect mobility compared to traditional high-concentration techniques. In this paper, we show that inkjet-printed devices can have both high field-effect mobility and on–off current ratio by utilizing coffee ring induced thickness variation in the channel. The coffee ring effect occurs naturally in printed patterns with most solvents and substrates, and it pushes dissolved particles to the edges of printed features. Thickness variation and coffee ring effect are usually avoided in the channel of solution processed thin-film transistors by implementing additional expensive steps in the fabrication process. Instead, here, we control these variations and utilize them to create inkjet-printed CNT channels with printing induced thickness variation that improves transistor properties. Printing properties such as printing speed, and number of layers are studied to manipulate capillary flow and form thicker line edges, which ultimately enhance current transport in the CNT network. A two-pass printing pattern with separate lines improves the field-effect mobility five times compared to a pattern with connected lines that has no defined edges. The field-effect mobility increases from 1.1 to 5.7 cm2 V−1 s−1 at a drain voltage of −2 V.

High-Temperature and High-Electron Mobility Metal-Oxide-Semiconductor Field-Effect Transistors Based on N-Type Diamond.

Diamond holds the highest figure-of-merits among all the known semiconductors for next-generation electronic devices far beyond the performance of conventional semiconductor silicon. To realize diamond integrated circuits, both n- and p-channel conductivity are required for the development of diamond complementary metal-oxide-semiconductor (CMOS) devices, as those established for semiconductor silicon. However, diamond CMOS has never been achieved due to the challenge in n-type channel MOS field-effect transistors (MOSFETs). Here, electronic-grade phosphorus-doped n-type diamond epilayer with an atomically flat surface based on step-flow nucleation mode is fabricated. Consequently, n-channel diamond MOSFETs are demonstrated. The n-type diamond MOSFETs exhibit a high field-effect mobility around 150cm2V-1 s-1 at 573K, which is the highest among all the n-channel MOSFETs based on wide-bandgap semiconductors. This work enables the development of energy-efficient and high-reliability CMOS integrated circuits for high-power electronics, integrated spintronics, and extreme sensors under harsh environments.

C-Axis Aligned 3 nm Thick In2O3 Crystal Using New Liquid DBADMIn Precursor for Highly Scaled FET Beyond the Mobility-Stability Trade-off.

Oxide semiconductors (OS) are attractive materials for memory and logic device applications owing to their low off-current, high field effect mobility, and superior large-area uniformity. Recently, successful research has reported the high field-effect mobility (μFE) of crystalline OS channel transistors (above 50 cm2 V-1 s-1). However, the memory and logic device application presents challenges in mobility and stability trade-offs. Here, we propose a method for achieving high-mobility and high-stability by lowering the grain boundary effect. A DBADMIn precursor was synthesized to deposit highly c-axis-aligned C(222) crystalline 3 nm thick In2O3 films. In this study, the 250 °C deposited 3 nm thick In2O3 channel transistor exhibited high μFE of 41.12 cm2 V-1 s-1, Vth of -0.50 V, and SS of 150 mV decade-1 with superior stability of 0.16 V positive shift during PBTS at 100 °C, 3 MV cm-1 stress conditions for 3 h.

High-Performance Organic Field-Effect Transistors Based on Two-Dimensional Vat Orange 3 Crystals

The exploration and research of low-cost, environmentally friendly, and sustainable organic semiconductor materials are of immense significance in various fields, including electronics, optoelectronics, and energy conversion. Unfortunately, these semiconductors have almost poor charge transport properties, which range from ∼ 10−4 cm2⋅V−1⋅s−1 to ∼ 10−2 cm2⋅V−1⋅s−1. Vat orange 3, as one of these organic semiconductors, has great potential due to its highly conjugated structure. We obtain high-quality multilayered Vat orange 3 crystals with two-dimensional (2D) growth on h-BN surfaces with thickness of 10–100 nm using physical vapor transport. Raman’s results confirm the stability of the chemical structure of Vat orange 3 during growth. Furthermore, by leveraging the structural advantages of 2D materials, an organic field-effect transistor with a 2D vdW vertical heterostructure is further realized with h-BN encapsulation and multilayered graphene contact electrodes, resulting in an excellent transistor performance with On/Off ratio of 104 and high field-effect mobility of 0.14 cm2⋅V−1⋅s−1. Our results show the great potential of Vat orange 3 with 2D structures in future nano-electronic applications. Furthermore, we showcase an approach that integrates organic semiconductors with 2D materials, aiming to offer new insights into the study of organic semiconductors.

Inkjet printing high mobility indium-zinc-tin oxide thin film transistor

Metal oxide thin film transistor has been widely used in flat panel display industry because of its low leakage current, high mobility and large area uniformity. Besides, with the development of printed display technology, inkjet printing process can fabricate the customizable patterns on diverse substrates with no need of vacuum or lithography to be used, thus significantly reducing cost and receiving more and more attention. In this paper, we use inkjet printing technology to prepare a bottom gate bottom contact thin film transistor (TFT) by using indium-zinc-tin-oxide (IZTO) semiconductor. The surface morphology of the printed IZTO film is modified by adjusting the solvent composition and solute concentration of the printing precursor ink. The experimental result show that the use of binary solvents can effectively overcome the coffee ring shape caused by the accumulation of solute edge in the volatilization process of a single solvent, ultimately presenting a uniform and flat contour surface. Further increase in solute concentration is in favor of formation of convex surface topology. The reason for the formation of the flat surface of the oxide film is the balance between the inward Marangoni reflux of the solute and the outward capillary flow during volatilization. In addition, IZTO thin film transistor printed with binary solvents exhibits excellent electrical properties. The ratio of width/length = 50/30 exhibits a high on-off ratio of 1.21×10&lt;sup&gt;9&lt;/sup&gt;, a high saturation field-effect mobility is 16.6 cm&lt;sup&gt;2&lt;/sup&gt;/(V·s), a low threshold voltage is 0.84 V, and subthreshold swing is 0.24 V/dec. The uniform and flat active layer thin film pattern can form good contact with the source leakage electrode, and the contact resistances of TFT devices with different width-to-length ratios are less than 1000 Ω, which can reach the basic conditions of high mobility thin film transistors prepared by inkjet printing. Therefore, using solvent mixture provides a universal and simple way to print oxide films with required surface topology, and present a visible path for inkjet printing of high-mobility thin film transistors.

Processes to enable hysteresis-free operation of ultrathin ALD Te p-channel field-effect transistors.

Recently, tellurium (Te) has been proposed as a promising p-type material; however, even the state-of-the-art results couldn't overcome the critical roadblocks for its practical applications, such as large I-V hysteresis and high off-state leakage current. We developed a novel Te atomic layer deposition (ALD) process combined with a TeOx seed layer and Al2O3 passivation to detour the limitations of p-type Te semiconducting materials. Also, we have identified the origins of high hysteresis and off current using the 77 K operation study and passivation process optimization. As a result, a p-type Te field-effect transistor exhibits less than 23 mV hysteresis and a high field-effect mobility of 33 cm2 V-1 s-1 after proper channel thickness modulation and passivation. Also, an ultralow off-current of approximately 1 × 10-14 A, high on/off ratios in the order of 108, and a steep slope subthreshold swing of 79 mV dec-1 could be achieved at 77 K. These enhancements strongly indicate that the previously reported high off-state current was originated from interfacial defects formed at the metal-Te contact interface. Although further studies concerning this interface are still necessary, the findings herein demonstrate that the major obstacles hindering the use of Te for ultrathin p-channel device applications can be eliminated by proper process optimization.