High Cutoff Frequency Research Articles

Improved Performance of 4H-SiC MESFET with Stepped-Channel

A novel 4H-SiC MESFET with stepped-channel (stepped-spacer) structure is proposed for the first time and analyzed by 2D numerical simulation. Based on the stepped buried oxide structure of SOI which can produce additional electrical Electric field peaks, much more advantages can be obtained through a stepped-channel structure compared to that of the field terminal technology, such as an obvious increase of the breakdown voltage which is equal to the electric field to the path integral, and the lower capacitances lead to a higher cut-off frequency. The simulation results show that a 100% higher saturated drain current and a 153% larger breakdown voltage can be obtained utilizing the stepped-channel structure MESFET than those of the conventional counterpart.

경로 손실 변화의 보상이 가능한 77 GHz 차량용 레이더 시스템을 위한 65 nm CMOS 베이스밴드 필터

본 논문에서는 77 GHz 자동차 레이더 시스템에서 거리가 달라도 일정한 감도를 유지할 수 있도록 하는 베이스밴드 필터를 제안하였다. 기존의 DCOC(DC Offset Cancellation) loop 회로를 이용하여 DC offset을 제거함과 동시에 거리에 따른 수신 전력의 크기 차이를 이득으로 상쇄시킬 수 있도록 하였다. 측정 결과, 이득은 최대 51 dB의 크기를 가지며, 고역 통과 차단 주파수는 5 kHz에서 15 kHz까지 가변 가능하게 하였다. 거리에 따른 손실을 보상하기 위한 고역 통과 필터의 기울기는 거리 보상 범위를 위해 -10~-40 dB/decade로 가변이 가능하게 설계되었다. 1 V의 전압에서 전류 소모는 4.3 mA이며, 측정된 NF는 26 dB이고, IIP3는 +4.5 dBm을 가진다. 칩은 65 nm CMOS 공정을 사용하였으며, 입출력 패드를 제외한 크기는 <TEX>$500{\mu}m{\times}1,050{\mu}m$</TEX>이다. In this paper, the baseband filter is proposed in order to maintain a constant sensitivity regardless of distances for 77 GHz automotive radar system. Using existing DCOC loop circuit can remove DC offset and also cancel differences of received power depending on the distance. Measured results show that the maximum gain is 51 dB and high pass cutoff frequency can be tuned from 5 kHz to 15 kHz. The slope of high pass filter can be tuned from -10 to -40 dB/decade for the distance compensation. The measured NF and IIP3 are 26 dB and +4.5 dBm with 4.3 mA at 1.0 V supply voltage, respectively. The fabricated die size <TEX>$500{\mu}m{\times}1,050{\mu}m$</TEX> excluding the in/out pads.

Room‐Temperature Electron Spin Amplifier Based on Ga(In)NAs Alloys

The first experimental demonstration of a spin amplifier at room temperature is presented. An efficient, defect-enabled spin amplifier based on a non-magnetic semiconductor, Ga(In)NAs, is proposed and demonstrated, with a large spin gain (up to 2700% at zero field) for conduction electrons and a high cut-off frequency of up to 1 GHz.

Bias-Dependent Radio Frequency Performance for 40 nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600 GHz

In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (fT) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization.

Silicon Germanium Heterojunction Bipolar Transistor for Digital Application

Bipolar transistor performances can be characterized by figures of merit such as cut-off frequency, maximum frequency of oscillation and Emitter Coupled Logic gate delay. We studied the required figures of merit for digital application and the effects of lateral and vertical scaling to the figures of merit of SiGe Heterojunction Bipolar Transistor. With lateral scaling, the width of emitter finger is scaled down from 0.25 to 0.12 μm while with the vertical scaling, the base width is scaled down to reduce the base delay. We also observed the effects of Ge profile and Ge fraction to the devices performances. Bipole3 5.3.1G is used to help us in the study. We found that high frequency cut-off and maximum frequency of oscillation as well as low Emitter Coupled Logic gate delay are all important for digital applications. Scaling down the emitter finger width enhanced the maximum frequency of oscillation and reduced Emitter Coupled Logic gate delay significantly while scaling down the base width increased the cutoff frequency and current gain.

Magnetic properties of Co–Ti substituted barium hexaferrite

This paper demonstrated the magnetic properties of Co–Ti substituted M-type hexaferrite of Ba(CoTi)xFe12–2xO19 (x=0.9–1.4), which was prepared by the solid-state reaction method. The single-phased M-type hexaferrite was obtained at 1050°C, and the samples could be sintered well at 1200°C. Co–Ti substitution reduces both saturation magnetization and coercivity of M-type hexaferrite, and gradually turns the magnetocrystalline anisotropy from uniaxial to planar within the composition range of x=0.9–1.2. When x⩾1.1, the samples have a good soft magnetic property with low coercivity and they exhibit high permeability in very high frequency range. Among them, the x=1.2 sample has the best magnetic property with both high permeability of μ′=40 and high cut-off frequency of 300MHz.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

The ‘impact’ of force filtering cut-off frequency on the peak knee abduction moment during landing: artefact or ‘artifiction’?

BackgroundJoint moments computed using inverse dynamic techniques are important estimators of net joint loads. Joints moments computed from marker position and ground reaction force data filtered using different cut-off frequencies...

On the New Design of a 4-Port TEM Waveguide with a Higher Cutoff Frequency and Wider Test Volume

A new miniaturized 4-port waveguide generating a transverse electromagnetic wave is proposed. The waveguide presents enhanced performance of higher field uniformity in extended test volume up to an increased test frequency limit compared to that of the conventional 2-port waveguide. The advantageous features of the proposed waveguide have been obtained through a new design scheme based on effective miniaturization maintaining good impedance matching. Consequently, we can provide a more accurate electromagnetic compatibility test method, covering larger devices operating in higher frequencies, which is a marked improvement upon the conventional approaches.

Improvement of RF and Noise Characteristics Using a Cavity Structure in InAlAs/InGaAs HEMTs

Reduction of parasitic capacitance in the gate region by adopting a cavity structure improved the high-frequency and noise characteristics of InAlAs/InGaAs high-electron mobility transistors (HEMTs). We achieved a high cutoff frequency f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> of 517 GHz and a minimum noise figure NF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> of 0.71 dB at 94 GHz even after passivation and interconnection process. Scaling of the gate-to-channel distance and gate-recess length is also effective in enhancing transconductance g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> to improve f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> and NF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> . The cavity structure is a promising candidate that can help in achieving high-performance millimeter-wave monolithic integrated circuits with multilayer interconnections.

A new process for the fabrication of planar antenna coupled Ni–NiOx–Ni tunnel junction devices

Graphical abstractDisplay Omitted Highlights? Methods to fabricate planar, geometrically asymmetric Ni-NiOx-Ni tunnel diodes are developed. ? Planar structure decreased the parasitic capacitance enabling high cut-off frequency. ? Ni electrodes provided the surface oxidation control and low band edge offset with its native oxide. ? Asymmetric geometry of the electrodes resulted in electrical asymmetry across zero bias. ? Three Ni oxidation methods are studied to build a thin, but durable oxide for the tunnel barrier. Antenna coupled metal-insulator-metal (ACMIM) tunnel junctions are fast electromagnetic wave detectors shown to respond to radiation of wavelength as short as 1.6µm. In the design and fabrication of these devices, it is crucial to keep the RC time constant of the tunnel junction small to achieve the requisite cut-off frequency and adequate rectification efficiency. Junction geometry and the properties of the insulation layer between the metal antenna parts play an important role in determining both the time constant and the rectification effectiveness. In this paper we have designed and fabricated Ni-NiOx-Ni devices and performed three oxidation processes to optimize the insulation layer. Ease of manufacture over large areas is also a requirement for successful implementation. We detail two simple and low cost processes for the fabrication of Ni-NiOx-Ni tunnel junctions. These methods allow for the large area array implementations of the antenna coupled MIMs for the application in low-cost energy harvesting.

Silicon Germanium Heterojunction Bipolar Transistor for Digital Application

Bipolar transistor performances can be characterized by figures of merit such as cutoff frequency, maximum frequency of oscillation and ECL gate delay. We studied the required figures of merit for digital application and the effects of lateral and vertical scaling to the figures of merit of SiGe HBT. With lateral scaling, the width of emitter finger is scaled down from 0.25 to 0.12 ?m while with the vertical scaling, the base width is scaled down to reduce the base delay. We also observed the effects of Ge profile and Ge fraction to the devices performances. Bipole3 5.3.1G is used to help us in the study. We found that high frequency cutoff and maximum frequency of oscillation as well as low ECL gate delay are all important for digital applications. Scaling down the emitter finger width enhanced the maximum frequency of oscillation and reduced ECL gate delay significantly while scaling down the base width increased the cutoff frequency and current gain. DOI: http://dx.doi.org/10.11591/telkomnika.v10i3.609

Design of High-Aspect-Ratio T-Gates on N-Polar GaN/AlGaN MIS-HEMTs for High $f_{\max}$

This letter discusses the design of high-aspect-ratio T-gates on molecular beam epitaxy (MBE)-grown nitrogen-polar (N-polar) GaN/AlGaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) for high power-gain cutoff frequency (fmax). A 351-GHz fmax is demonstrated, which is the highest published to date for an N-polar GaN HEMT. Novel 80-nm-long 1.1-m-tall T-gates with a 370-nm-tall stem were used to simultaneously minimize gate resistance (Rg) and parasitic gate-drain capacitance (Cgd). The device on -resistance (Ron) of 0.42 mm was obtained by employing n+ GaN MBE-regrown ohmic contacts and by scaling the lateral separation between regrown source-drain regions to 250 nm. Within the design space explored, this letter experimentally demonstrates that fmax is increased by reducing the gate width and the T-gate top length.

A 6th order wideband active-RC LPF for LTE application

A low power, highly linear active-RC filter is presented. This filter is synthesized from a low pass 6 order Chebyshev RLC ladder, and exhibits a reconfigurable bandwidth (10 MHz, 50 MHz). In order to meet the high cutoff frequency (50 MHz) and strict adjacent channel rejection requirements, a novel operational amplifier based on a new compensation technique is used, which optimizes high frequency filter performance and minimizes current consumption. This filter is fabricated in a 0.18 μm CMOS process, the measurement results indicate that the filter provides 10 MHz and 50 MHz selectable bandwidth, and excellent adjacent channel rejection: −15.3 dB at 12.5 MHz with 10 MHz cutoff frequency, −8.3 dB at 60 MHz with 50 MHz cutoff frequency, three times out-band rejection more than 60 dB while the in-band ripple is less than 1 dB.

LTE-Advanced 표준을 지원하는 CMOS Active-RC 멀티채널 Low-Pass Filter

본 논문은 LTE-Advanced 시스템을 위한 멀티채널을 선택할 수 있는 저역통과 필터를 제안한다. 제안하는 저역통과 필터는 5 MHz, 10 MHz, 그리고 40 MHz의 3가지 모드의 차단주파수를 제공하며 Active-RC 5차 Chebyshev 구조로 설계되었다. 저전력을 확보하면서 40 MHz의 높은 차단 주파수를 확보하기 위해서 부성 저항을 가지는 PMOS Cross-Connection Load를 사용한 연산증폭기를 필터에 적용하였다. 더불어 공정, 전압, 그리고 온도에 의한 각각의 차단주파수 변화에 대응할 수 있도록 각각 3-bit 제어 가능한 튜닝회로를 추가하였다. 제안하는 필터는 0.13-<TEX>${\mu}m$</TEX> CMOS 공정을 사용하여 설계하였으며 1.2 V 전압에서 총 20.9 mW 전력을 소모한다. This paper has proposed a multi-channel low pass filter (LPF) for LTE-Advanced systems. The proposed LPF is an active-RC 5th chebyshev topology with three cut-off frequencies of 5 MHz, 10 MHz, and 40 MHz. A 3-bit tuning circuit has been adopted to prevent variations of each cut-off frequency from process, voltage, and temperature (PVT). To achieve a high cut-off frequency of 40 MHz, an operational amplifier used in the proposed filter has employed a PMOS cross-connection load with a negative impedance. A proposed filter has been implemented in a 0.13-<TEX>${\mu}m$</TEX> CMOS technology and consumes 20.2 mW with a 1.2 V supply voltage.

Growth and electrical characterisation of δ-doped boron layers on (111) diamond surfaces

A plasma enhanced chemical vapor deposition protocol for the growth of δ-doping of boron in diamond is presented, using the (111) diamond plane as a substrate for diamond growth. AC Hall effect measurements have been performed on oxygen terminated δ-layers and desirable sheet carrier densities (∼1013 cm−2) for field-effect transistor application are reported with mobilities in excess of what would expected for equivalent but thicker heavily boron-doped diamond films. Temperature-dependent impedance spectroscopy and secondary ion mass spectroscopy measurements show that the grown layers have metallic-like electrical properties with high cut-off frequencies and low thermal impedance activation energies with estimated boron concentrations of approximately 1020 cm−3.

A Nonlinear Lattice for High-Amplitude Picosecond Pulse Generation in CMOS

In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-Vpp, 6.3-ps pulses from a 22-GHz input signal.

ACOUSTIC SIGNAL PROCESSING APPARATUS AND ACOUSTIC SIGNAL PROCESSING METHOD

An apparatus for performing processing of an input acoustic signal to be reproduced by a loudspeaker, which generates a harmonic of a low pitch sound component equal to or lower than a predetermined low cutoff frequency, and generates a harmonic synthesized acoustic signal synthesizing the input signal with the harmonic. The apparatus generates an output acoustic signal which cuts off, from the harmonic synthesized acoustic signal, a low pitch sound component equal to or lower than the low cutoff frequency and a high pitch sound component equal to or higher than the high cutoff frequency. The apparatus sets a low and high cutoff frequencies in accordance with an output characteristic of a loudspeaker.

Software to Estimate Earthquake Spectral and Source Parameters

A software (EQK_SRC_PARA) has been developed to estimate spectral parameters of earthquake source spectrum, namely: low frequency displacement spectral level (Ω0), corner frequency above which spectrum decays with a rate of 2 (fc), the cut-off frequency above which the spectrum again decays (fmax) and the rate of decay above fmax (N). A Brune’s source model [1,2] that yield a fall-off of 2 beyond corner frequency is considered with high cut-off frequency factor presented by Boore [3] that fits well for frequencies greater than fmax. The software EQK_SRC_PARA is written in MATLAB and uses input data in Sesame ASCII Format (SAF) format. The obtained spectral parameters have been used to estimate source parameters (e.g., seismic moment, source dimension and stress drop etc.) and to develop scaling laws for the study region. The cut-off frequency “fmax” can also be studied and interpreted to confirm about its origin.

Effect of confinement on molecular processes in the liquid crystal 8OCB: application of NMR relaxometry

Dispersions of proton spin–lattice relaxation rates (R1) in the nematic and smectic phases of the liquid crystal 4′-octyloxy-4-cyanobiphenyl (8OCB), embedded in a nano-porous medium formed by an aerosil matrix, are investigated over a wide frequency (ν) range (104 Hz to 5 × 107 Hz) at two average pore sizes. In the low frequency (sub-MHz) region we observe a significant increase of R1 in the confined samples, mediated by slow translational displacements (RMTD), arising from the formation of adsorption layers near the porous surface. Dispersion in this region is well accounted for by a power law behaviour (R1 ∼ ω−p), bracketed by low and high cutoff frequencies reflecting the limiting length scales of such displacements in these layers. The exponent p increases from 0.45 to 0.6 with a decrease of the temperature within the nematic phase, due to the progressive onset of longer wavelength diffusive modes within these layers. This signifies the onset of order director fluctuation (ODF) modes within the adsorption layers. Confinement is also seen to place restrictions on the long wavelength ODF modes of the bulk-like region of the liquid crystal, thus weakening considerably their dispersive effects in the low frequency region, relative to the bulk samples. In the smectic phase, p decreases appreciably signalling a depletion of such long range cooperative modes on layer formation. Analysis of the R1 data also shows that individual dynamic processes like translational diffusion and reorientations of the molecules within the voids are largely unaffected due to confinement.