HfO2 Layer Research Articles

Alleviation of Self-Heating Effect in Top-Gated Ultrathin In2O3 FETs Using a Thermal Adhesion Layer

In this work, a thin layer of hexagonal boron nitride (h-BN) or HfO2 serves as an adhesion layer between the ultrathin atomic-layer-deposited (ALD) indium oxide (In2O3) channel and a sapphire substrate to enhance the thermal interfacial conductance. A thermo-reflectance (TR) measurement system with high spatial resolution is introduced to experimentally demonstrates the improvement. With the thin h-BN or HfO2 interlayer, the temperature elevation ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta {T}$ </tex-math></inline-formula> ) induced by self-heating effect (SHE) is decreased by roughly 9% or 27%, respectively. To quantify the improvement of the interfacial heat transfer, a steady-state thermal diffusion model with a finite-element method is combined with the experimental TR observation to extract the effective thermal boundary conductance (TBC) values in each case. It is shown that the effective TBC is ameliorated by a factor of 2 or 7 with the h-BN or HfO2 interlayer, which is responsible for the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta {T}$ </tex-math></inline-formula> reduction. Furthermore, phonon density of states (PDOS) distribution mismatch implies that the intersection over union (IOU) ratio in the acoustic phonon region of In2O3 with h-BN or HfO2 is roughly 3 or 11 times higher than that directly with sapphire, which is responsible for the profound TBC enhancement. Based on this, ultrahigh maximum drain current of 2.4 mA/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> is achieved with 2.1-nm-thick In2O3 channel on a sapphire substrate with an HfO2 interlayer in between due to the alleviated SHE.

Improved resistive switching performance and realized electric control of exchange bias in a NiO/HfO2 bilayer structure.

The fluctuation of switching parameters is unavoidable in conductive filaments (CFs)-type resistive switching (RS) devices, which restricts the application in resistive random-access memory. Here, we employed an uninsulated antiferromagnetic (AFM) NiO layer adhered to a well-insulating HfO2 layer to effectively suppress the RS fluctuation by achieving forming-free, narrower set voltage distribution, a more stable on/off ratio, and better endurance in comparison with single-HfO2-layer based RS devices. The conduction scaling behavior indicates that the NiO/HfO2 bilayer has a smaller scale parameter S0 (lateral dimension of the bottleneck for the CFs). Besides this, considering some preexisting conductive paths in the NiO layer, the electric fields and the formation/rupture of CFs can be highly localized, leading to reduced switching fluctuation and improved RS performance in the NiO/HfO2-based RS devices. Moreover, asymmetric I-V curves measured in a high resistance state (HRS) in positively and negatively biased regions and the electric modulation of exchange bias (EB) arising from the Co-NiO interfacial coupling are favorable for revealing the inherent mechanism for RS. The coexistence of RS and EB is also useful to the design of novel multifunctional memory devices.

Self-Assembled Au/P3HT, High-k Bilayer Dielectric-Based Solution Processed Low Voltage OTFT for Multiparametric Ammonia Sensor at Room Temperature

A self-assembled, fully solution-processed, bilayer (TiO2/HfO2) dielectric-based thin film transistor (TFT) has been fabricated and explored for highly sensitive ammonia gas at room temperature (RT—25 °C). The bilayer dielectric film has been grown over a heavily boron-doped silicon substrate (p++ Si), and the thickness of each layer has been optimized by spin coating rotation speed and spin time to find a high-quality gate oxide. The obtained dielectric has a high areal capacitance of 0.926 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{F}$ </tex-math></inline-formula> /cm2, low rms roughness of 0.914 nm, and low leakage current density of ~1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{A}$ </tex-math></inline-formula> /cm2, high dielectric constant of ~42, which are much more favorable for the high-performance organic TFT (OTFT). The incorporation of the TiO2 layer in between the p++ Si and HfO2 layer enhances the areal capacitance and minimizes the rms roughness (TiO2 minimizes the no. of interface trap states at the dielectric/semiconductor interface) of the bilayer dielectric film, thereby improving the charge transfer mechanism. The developed high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${k}$ </tex-math></inline-formula> bilayer solution-processed dielectric layer has been utilized to develop a low voltage operated (−1.5 V) OTFT for ammonia (NH3) gas at RT. The fabricated OTFT device utilized the solution-processed floating film transfer method (FTM) to grow the Au(gold) doped P3HT film as a sensing/organic semiconductor channel (OSC) layer. The Au/P3HT sensing layer shows a quick response/recovery time (5/17 s), with a high sensing response of 55% (5 ppm) toward the NH3 analyte. The study aims to find a low-voltage, solution-processed, cost-efficient OTFT device for a high-performance gas sensor at RT.

Enhancement of Resistive Switching Performance in Hafnium Oxide (HfO2) Devices via Sol-Gel Method Stacking Tri-Layer HfO2/Al-ZnO/HfO2 Structures.

Resistive random-access memory (RRAM) is a promising candidate for next-generation non-volatile memory. However, due to the random formation and rupture of conductive filaments, RRMS still has disadvantages, such as small storage windows and poor stability. Therefore, the performance of RRAM can be improved by optimizing the formation and rupture of conductive filaments. In this study, a hafnium oxide-/aluminum-doped zinc oxide/hafnium oxide (HfO2/Al-ZnO/HfO2) tri-layer structure device was prepared using the sol-gel method. The oxygen-rich vacancy Al-ZnO layer was inserted into the HfO2 layers. The device had excellent RS properties, such as an excellent switch ratio of 104, retention of 104 s, and multi-level storage capability of six resistance states (one low-resistance state and five high-resistance states) and four resistance states (three low-resistance states and one high-resistance state) which were obtained by controlling stop voltage and compliance current, respectively. Mechanism analysis revealed that the device is dominated by ohmic conduction and space-charge-limited current (SCLC). We believe that the oxygen-rich vacancy concentration of the Al-ZnO insertion layer can improve the formation and rupture behaviors of conductive filaments, thereby enhancing the resistive switching (RS) performance of the device.

Could the negative capacitance effect be used in field-effect transistors with a ferroelectric gate?

We analyze the electric potential and field, polarization and charge, and differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin layers of dielectric SiO2 and weak ferroelectric HfO2. It appeared possible to achieve a quasi-steady-state negative capacitance (NC) of the HfO2 layer, , if the layer thickness is close to the critical thickness of the size-induced ferroelectric-paraelectric phase transition. However, this effect disappears as the gate voltage increases above a certain critical value, which can be explained by the nonlinearity of the ferroelectric permittivity. The quasi-steady-state NC corresponds to a positive capacitance of the whole system. Implementation of the gate insulator NC, , can open the principal possibility to reduce the MOSFET subthreshold swing below the critical value, and to decrease the gate voltage below the fundamental Boltzmann limit. However, we failed to found the parameters for which is negative in the quasi-steady states; and thus, the negative cannot reduce the subthreshold swing below the fundamental limit. Nevertheless, the increase in , related with , can decrease the swing above the limit, reduce device heating during the operation cycles, and thus contribute to further improvements of MOSFET performances.

Fabrication and Properties of InGaZnO Thin-Film Transistors Based on a Sol-Gel Method with Different Electrode Patterns.

The preparation of thin-film transistors (TFTs) with InGaZnO (IGZO) channels using sol-gel technology has the advantages of simplicity in terms of process and weak substrate selectivity. We prepared a series of TFT devices with a top contact and bottom gate structure, in which the top contact was divided into rectangular and circular structures of drain/source electrodes. The field-effect performance of TFT devices with circular pattern drain/source electrodes was better than that with a traditional rectangular structure on both substrates. The uniform distribution of the potential in the circular electrode structure was more conducive to the regulation of carriers under the same channel length at different applied voltages. In addition, with the development of transparent substrate devices, we also constructed a hafnium oxide (HfO2) insulation layer and an IGZO active layer on an indium tin oxide conductive substrate, and explored the effect of circular drain/source electrodes on field-effect properties of the semitransparent TFT device. The IGZO deposited on the HfO2 dielectric layer by spin-coating can effectively reduce the surface roughness of the HfO2 layer and optimize the scattering of carriers at the interface in TFT devices.

Design and characterization of a pyroelectric detector based on three-dimensional structured hafnium oxide thin films

Pyroelectric detectors are used for gas analysis and flame detection because of their fast response and excellent performance. Most pyroelectric devices are based on monocrystalline lithium tantalate or pyroelectric lead zirconate titanate thin films deposited on a silicon (Si) substrate. In comparison, recently discovered pyroelectric-doped hafnium oxide (HfO2) offers the possibility of manufacturing completely complementary metal-oxide-semiconductor (CMOS)-compatible devices on large Si wafers. This is a promising approach to simplifying mass production of the sensor element and realizing new sensor structures with a high performance. Si substrates were structured with trenches and filled with thin-doped HfO2 layers by atomic layer deposition to multiply the pyroelectric current responsivity. An effective pyroelectric coefficient of up to 1300 μC / m2 / K was measured. Micromechanical structuring of the 6-in Si wafers was used to improve the thermal conversion of the sensor element. The applied plasmonic absorbers increase the infrared light absorption to >80 % for the spectral range of 3 to 5 μm, which was determined using Fourier transform infrared reflection measurements. In the first step, the performance of the sensor element was evaluated with an analog transimpedance amplifier with a feedback resistance of 5 GΩ. A specific detectivity D * > 1 · 107 cm√Hz / W was measured for the frequency range of 1 to 10 Hz. In addition, an application-specific integrated circuit was designed for the electrical signal conditioning to build a fully CMOS-compatible pyroelectric detector. It offers a simple to manufacture, flexible configuration, and digital communication interface with a signal-to-noise performance close to analog detectors. We present the measurement results of different sensor elements and detector types.

Memristors with Nociceptor Characteristics Using Threshold Switching of Pt/HfO2/TaOx/TaN Devices.

As artificial intelligence technology advances, it is necessary to imitate various biological functions to complete more complex tasks. Among them, studies have been reported on the nociceptor, a critical receptor of sensory neurons that can detect harmful stimuli. Although a complex CMOS circuit is required to electrically realize a nociceptor, a memristor with threshold switching characteristics can implement the nociceptor as a single device. Here, we suggest a memristor with a Pt/HfO2/TaOx/TaN bilayer structure. This device can mimic the characteristics of a nociceptor including the threshold, relaxation, allodynia, and hyperalgesia. Additionally, we contrast different electrical properties according to the thickness of the HfO2 layer. Moreover, Pt/HfO2/TaOx/TaN with a 3 nm thick HfO2 layer has a stable endurance of 1000 cycles and controllable threshold switching characteristics. Finally, this study emphasizes the importance of the material selection and fabrication method in the memristor by comparing Pt/HfO2/TaOx/TaN with Pt/TaOx/TaN, which has insufficient performance to be used as a nociceptor.

Oxidation of Hafnium Diboride—Silicon Carbide at 1500 °C in Air; Effect of Compressive Stress

The long-term oxidation behavior of HfB2 and of HfB2-20 vol.% SiC was studied. Test samples of each material were oxidized at 1500 °C in air using a box furnace. The exposure times were 0, 0.5, 1, 2, 3, 6, 9, 12, 15, 30, 45 and 90 h. Weight gain, oxide scale composition and oxide scale thickness were characterized for both materials. Crystal structure of the surface scales was analyzed using x-ray diffraction. Oxide scales were further characterized via scanning electron microscopy with energy dispersive spectroscopy analysis. For HfB2 the oxide scale consists predominantly of porous HfO2. For HfB2-20 vol.% SiC, the oxide scale is composed of a borosilicate glass outer layer and a porous HfO2 layer. Weight gain and the growth of oxide scale with exposure time were measured. The oxidation kinetics were determined using the weight gain as well as the scale thickness measurements, and the parabolic rate constants were calculated for both materials. The addition of SiC dramatically inhibited the oxidation of HfB2. The effects of compressive stress on oxidation of HfB2-20 vol.% SiC were also examined. Samples were oxidized while being subjected to compressive stress of 50-150 MPa for up to 30 h at 1500 °C in air. Compressive stress was found to have little effect on the growth of oxide scale with time. The oxidation data were analyzed in terms of mechanistic models for the oxidation of monolithic and SiC-containing refractory diborides. For HfB2-20 vol.% SiC, the model predictions agreed well with experimental data. For HfB2, the model significantly under-predicted the scale thickness, but accounted for weight gain reasonably well except for the longest exposure time of 90 h.

Reliability of TCAD study for HfO2-doped Negative capacitance FinFET with different Material-Specific dopants

Attaining the ferroelectric (FE) polarization in a thin HfO2 layer using a specific dopant is a widely adopted way to realize Negative Capacitance (NC) FET. In a general TCAD simulation study of NC-based devices, the NC property of the FE layer is strongly dependent on the values of Landau parameters (α,β,γ,ρ,g), which are unique for specific dopants and FE thickness. In this paper, for the first time, we investigated the reliability of TCAD simulations with which NC FinFET is simulated for a specific dopants-based FE-HfO2 layer. The possible dopants used to realize a thin-HfO2 layer as a FE layer are Al, Gd, La, Si, Sr, Y, and Zr. Each dopant has different (α,β,γ,ρ,g) and thus offers a different NC regime of operation, i.e., S-curve. α and β are the dominant parameters if we consider the uniform polarization under quasi-static analysis. Further, the change in ambient temperature alters the value of α, resulting in changes in the NC-state. Hence, for the reliable TCAD-based NC study, the precise selection of Landau parameters and dopants is needed for optimized performances.

Optimization of SiGe interface properties with ozone oxidation and a stacked HfO2/Al2O3 dielectric for a SiGe channel FinFET transistor

In this paper, the optimization of SiGe interface properties for the SiGe channel fin field effect transistor (FinFET) transistor is explored in detail. First, optimal low-temperature ozone oxidation at 300 °C for 30 min was confirmed based on Al2O3/Si0.7Ge0.3 metal-oxide-semiconductor (MOS) capacitors. This is because a higher oxidation temperature and a longer oxidation time can suppress the formation of GeO X in the interface layer (IL) and significantly improve the interface state density (D it). Moreover, compared with the Al2O3 sample, the HfO2 sample can obtain a thinner capacitance equivalent oxide thickness (CET), but it is more vulnerable to deterioration of Si0.7Ge0.3 interface properties because the GeO X in the IL is more likely to diffuse into the HfO2 layer. To further optimize the D it and CET of the Si0.7Ge0.3 MOS capacitor simultaneously, a stacked HfO2/Al2O3 dielectric is proposed. Compared with the HfO2 sample, its frequency dispersion characteristics and D it have been improved significantly, as the thin Al2O3 layer prevents the diffusion of GeO X to the HfO2 layer and controls the growth of GeO X . Therefore, a high-quality Si0.7Ge0.3 interface property optimization technology is realized via the development of a low-temperature ozone oxidation (300 °C, 30 min) method combined with a stacked HfO2/Al2O3 dielectric. In addition, a Si0.7Ge0.3 FinFET utilizing this newly developed interface property optimization scheme is successfully prepared. Its excellent subthreshold swing performance indicates that good interface quality of the Si0.7Ge0.3 is obtained. The above results prove that this newly developed interface property optimization scheme is a practical technology for high-mobility SiGe FinFET.

Bottom metal strip based ferroelectric Schottky Barrier MOSFET

This study develops and simulates a novel Schottky Barrier MOSFET topology that enhances device performance. The suggested device makes use of a ferroelectric material, a metal strip, and a HfO2 layer. The use of high work function metal has significantly lowered the SB thickness due to which a considerable high ION (1.72 × 10-4 A/µm) and ION-IOFF ratio (1.72 × 105) is obtained in the suggested SB-MOSFET in contrast to conventional SB-MOSFET having ION=(3.77 × 10-6) A/µm and ION/IOFF = 2.37 × 102. In contrast to the traditional SB-MOSFET, it has been noticed that the cut-off frequency, intrinsic gain, gain bandwidth product, and gain transconductance frequency product have all significantly improved.

Ion Drift and Polarization in Thin SiO2 and HfO2 Layers Inserted in Silicon on Sapphire.

To reduce the built-in positive charge value at the silicon-on-sapphire (SOS) phase border obtained by bonding and a hydrogen transfer, thermal silicon oxide (SiO2) layers with a thickness of 50–310 nm and HfO2 layers with a thickness of 20 nm were inserted between silicon and sapphire by plasma-enhanced atomic layer deposition (PEALD). After high-temperature annealing at 1100 °C, these layers led to a hysteresis in the drain current–gate voltage curves and a field-induced switching of threshold voltage in the SOS pseudo-MOSFET. For the inserted SiO2 with a thickness of 310 nm, the transfer transistor characteristics measured in the temperature ranging from 25 to 300 °C demonstrated a triple increase in the hysteresis window with the increasing temperature. It was associated with the ion drift and the formation of electric dipoles at the silicon dioxide boundaries. A much slower increase in the window with temperature for the inserted HfO2 layer was explained by the dominant ferroelectric polarization switching in the inserted HfO2 layer. Thus, the experiments allowed for a separation of the effects of mobile ions and ferroelectric polarization on the observed transfer characteristics of hysteresis in structures of Si/HfO2/sapphire and Si/SiO2/sapphire.

Bipolar Resistive Switching in Hafnium Oxide-Based Nanostructures with and without Nickel Nanoparticles

As research into additives and intentionally introduced impurities in dielectric thin film for enhancing the resistive switching based random access memories (RRAM) continues to gain momentum, the aim of the study was to evaluate the effects of chemically presynthesised Ni nanoparticles (NPs) embedded in a dielectric layer to the overall structure and resistive switching properties. HfO2-based thin films embedded with Ni NPs were produced by atomic layer deposition (ALD) from tetrakis(ethylmethylamino)hafnium (TEMAH) and the O2 plasma ALD process onto a TiN/Si substrate. The Ni NPs were separately synthesised through a continuous flow chemistry process and dispersed on the dielectric layer between the two stages of preparing the HfO2 layer. The nanodevices’ morphology and composition were analysed with physical characterisation methods and were found to be uniformly dispersed across the sample, within an amorphous HfO2 layer deposited around them. When comparing the resistive switching properties of otherwise identical samples with and without Ni NPs, the ILRS/IHRS ratio rose from around a 4 to 9 at 0.2 V reading voltage, the switching voltage dropped from ~2 V to ~1.5 V, and a distinct increase in the endurance characteristics could be seen with the addition of the nanoparticles.

Electronic Characteristics of Ultra‐Thin Passivation Layers for Silicon Photovoltaics

AbstractSurface passivating thin films are crucial for limiting the electrical losses during charge carrier collection in silicon photovoltaic devices. Certain dielectric coatings of more than 10 nm provide excellent surface passivation, and ultra‐thin (&lt;2 nm) dielectric layers can serve as interlayers in passivating contacts. Here, ultra‐thin passivating films of SiO2, Al2O3, and HfO2 are created via plasma‐enhanced atomic layer deposition and annealing. It is found that thin negatively charged HfO2 layers exhibit excellent passivation properties—exceeding those of SiO2 and Al2O3—with 0.9 nm HfO2 annealed at 450 °C providing a surface recombination velocity of 18.6 cm s−1. The passivation quality is dependent on annealing temperature and layer thickness, and optimum passivation is achieved with HfO2 layers annealed at 450 °C measured to be 2.2–3.3 nm thick which give surface recombination velocities ≤2.5 cm s−1 and J0 values of ≈14 fA cm−2. The superior passivation quality of HfO2 nanolayers makes them a promising candidate for future passivating contacts in high‐efficiency silicon solar cells.

Study of MIS structures based on CdHgTe and HfO2 applied by PEALD

We investigate the HfO2/Hg0.78Cd0.22Te interface fabricated by plasma-enhanced atomic layer deposition (PEALD) at 120 °C During the deposition of HfO2, no donor-like defects are introduced into mercury cadmium telluride. X-ray photoelectron spectroscopy and ellipsometry were used to establish the optimal process regime at 120 °C and to demonstrate how HfO2 layer composition and growth rate per cycle depend on post-plasma purge time; the optimum is achieved at 6 s. Increasing the post-plasma purge time decreases the carbon and nitrogen impurity concentration in the HfO2 layer. Measurements of the admittance of metal-insulator-semiconductor (MIS) structures over the surface of a sample show that the electro-physical properties are uniform. We discuss the method of measuring the admittance of MIS structures that allows us to minimize the contribution of slow states with trapped charge on shape and shift of the C–V curve. The results demonstrate that the densities of fixed charge, slow states, and fast interfacial traps at the HfO2/MCT interface are greater than that for Al2O3/MCT (also formed by PEALD). The interface trap density is estimated from a normalized parallel conductance map, and the HfO2 film adheres well.

Pyroelectric and Ferroelectric Properties of Hafnium Oxide Doped with Si via Plasma Enhanced ALD

Devices based on ferroelectric hafnium oxide are of major interest for sensor and memory applications. In particular, Si-doped hafnium oxide layers are investigated for the application in the front-end-of-line due to their resilience to high thermal treatments. Due to its very confined doping concentration range, Si:HfO2 layers based on thermal atomic layer deposition often exhibited a crossflow pattern across 300 mm wafer. Here, plasma enhanced atomic layer deposition is explored as an alternative method for producing Si-doped HfO2 layers, and their ferroelectric and pyroelectric properties are compared.

Interface engineering of β-Ga2O3 MOS-type Schottky barrier diode using an ultrathin HfO2 interlayer

Low leakage current and high breakdown voltage are critically important to design high performance Schottky barrier diodes. In this work, a low leakage current was reported by studying the effect of inserting an ultrathin HfO2 layer using atomic-layer deposition with different cycle number at the interface between Ni and β-Ga2O3 for different annealing temperatures. A remarkable decrease in leakage current from 5.68 × 10−3 to 2.97 × 10−6 A/cm² at -300 V and a breakdown voltage increase from -467 to -556 V, were achieved when two cycles of HfO2 are inserted and annealed at 400°C. The leakage current decreases from 9.87 × 10−5 to 2.14 × 10−5 A/cm² for 200°C annealing temperature and from 1.035 × 10−4 to 2.56 × 10−6 A/cm² for as-deposited Metal-oxide semiconductor based Schottky barrier diode (MOSSBD) only after 2-cycles (∼2 Å) HfO2 is inserted. As the number of HfO2 cycles was increased (2–8 cycles) and the annealing temperature is varied, leakage current and breakdown voltage are affected. To investigate these variations in leakage current and breakdown voltage, Silvaco TCAD simulator is used. Good agreement is obtained between experiment and simulation by considering the fixed charge density in HfO2 (positive fixed charge density is related to oxygen vacancy density in HfO2 and the interfacial trap (reduced by annealing), and, where necessary, also considering the inhomogeneity of the Schottky barrier height to understand the main reason for the abrupt increase in leakage current at a specific reverse voltage.

Memory Effects in Nanolaminates of Hafnium and Iron Oxide Films Structured by Atomic Layer Deposition

HfO2 and Fe2O3 thin films and laminated stacks were grown by atomic layer deposition at 350 °C from hafnium tetrachloride, ferrocene, and ozone. Nonlinear, saturating, and hysteretic magnetization was recorded in the films. Magnetization was expectedly dominated by increasing the content of Fe2O3. However, coercive force could also be enhanced by the choice of appropriate ratios of HfO2 and Fe2O3 in nanolaminated structures. Saturation magnetization was observed in the measurement temperature range of 5–350 K, decreasing towards higher temperatures and increasing with the films’ thicknesses and crystal growth. Coercive force tended to increase with a decrease in the thickness of crystallized layers. The films containing insulating HfO2 layers grown alternately with magnetic Fe2O3 exhibited abilities to both switch resistively and magnetize at room temperature. Resistive switching was unipolar in all the oxides mounted between Ti and TiN electrodes.

Ferroelectric ZrO2 ultrathin films on silicon for metal-ferroelectric-semiconductor capacitors and transistors

Enhanced ferroelectric properties of nanoscale ZrO2 thin films by an HfO2 seed layer are demonstrated in metal-ferroelectric-semiconductor (Si) capacitors and transistors prepared with a low thermal budget of 400 °C. The seeding effect of the HfO2 layer leads to the enhancement of crystallization into the orthorhombic phase and the increase of remnant polarization of the sub-10 nm ZrO2/HfO2 bilayer structure. The ferroelectric field-effect transistor with the ZrO2/HfO2 bilayer gate stack reveals a large memory window of ~1.2 V and a steep subthreshold swing below 60 mV/decade. As compared with the Hf0.5Zr0.5O2 thin film, superior ferroelectric properties of the ZrO2/HfO2 bilayer structure show great potential for ferroelectric memory devices fabricated on Si substrates.