Heterobipolar Transistor Research Articles

Токораспределение в гребенчатых структурах биполярных и гетеробиполярных СВЧ транзисторов с учетом сопротивления дорожек металлизации

Представлен краткий анализ причин неоднородного и неустойчивого распределения тока между элементарными транзисторами в гребенчатых структурах (ГС) биполярных (БТ) и гетеробиполярных (ГБТ) СВЧ транзисторов. Получено выражение для тока, втекающего в элементарный транзистор ГС, с учетом сопротивления эмиттерной дорожки металлизации. Приведена оценка влияния технологического разброса сопротивлений эмиттерных дорожек металлизации на неравномерность распределения полного тока транзистора между элементарными транзисторами. Показано, что сопротивление эмиттерных дорожек металлизации играет стабилизирующую роль и приводит к повышению тепловой устойчивости токораспределения в ГС, при этом наименее устойчивым к тепловому пробою будет элементарный транзистор ГС с наименьшим сопротивлением эмиттерной дорожки и наибольшим тепловым сопротивлением. Предложены рекомендации по выравниванию и повышению устойчивости токораспределения в ГС БТ и ГБТ.

Токораспределение в гребенчатых структурах биполярных и гетеробиполярных СВЧ транзисторов с учетом сопротивления дорожек металлизации

A brief analysis of the causes of inhomogeneous and unstable current distribution between elementary transistors in comb structures (CS) of bipolar (BT) and heterobipolar (HBT) microwave transistors is presented. An expression for the current flowing into a CS elementary transistor, taking into account the emitter track metallization resistance, is derived. An estimation of the influence of technological variation of emitter metallization track resistances on the non-uniformity of the transistor total current distribution between elementary transistors is given. It is shown that resistance of emitter tracks of metallization plays a stabilizing role and leads to increase of thermal stability of current distribution in CS, thus the least stable to thermal breakdown will be elementary transistor of CS with the least resistance of emitter track and the greatest thermal resistance. Recommendations on equalization and increase of stability of current distribution in CS of BT and HBT are offered.

Диагностика неоднородности токораспределения в гребенчатых структурах мощных биполярных и гетеробиполярных транзисторов по рекомбинационному излучению

A brief overview of methods for diagnosing current distribution and defects of high-power RF and microwave bipolar and heterobipolar transistors by recombination radiation is presented. An experimental setup is described for recording recombination radiation of structures of bipolar semiconductor devices with spatial resolution, which makes it possible to evaluate the inhomogeneity of current distribution in the comb structures of RF and microwave bipolar and heterobipolar transistors. The results of experimental testing of the installation on several samples of bipolar transistors of various types in the diode connection of the emitter junction are presented. It is established that the brightness of recombination radiation and, accordingly, the emitter current density monotonically decreases from the end to the base of the emitter tracks of current-carrying metallization, while the brightness inhomogeneity coefficient, defined as the ratio of the brightness of recombination radiation at the end to the beginning of the emitter tracks monotonically increases with increasing current flowing through the junction. An analytical model is proposed to explain the brightness distribution of recombination radiation along metallization paths in the comb structure of RF and microwave transistors.

Two-Section Model of the Current Distribution in Strip Layouts of Bipolar and Hetero-Bipolar Microwave Transistors

Two-Section Model of the Current Distribution in Strip Layouts of Bipolar and Hetero-Bipolar Microwave Transistors

A 2.4 GHz 20 W 8-channel RF Source Module with Solid-State Power Amplifiers for Plasma Generators

This paper presents a novel multi-channel type RF source module with solid-state power amplifiers for plasma generators. The proposed module is consisted of a DC control part, RF source generation part, and power amplification part. A 2-stage power amplifier (PA) is combined with a gallium arsenide hetero bipolar transistor (GaAs HBT) as a drive PA and a gallium nitride high electron mobility transistor (GaN HEMT) as a main PA, respectively. By employing 8 channels, the proposed module secures better area coverage on the wafer during semiconductor processes such as chemical vapor deposition (CVD), etching and so on. Additionally, each channel can be maintained at a constant output power because they have a gain factor tunable by a variable gain amplifier (VGA). For that reason, it is possible to have uniform plasma density on the wafer. The operating sequence is controllable by an external DC control port. Moreover, copper–tungsten (CuW) heat spreaders were applied to prevent RF performance degradation from heat generated by the high power amplifier (HPA), and a water jacket was implemented at the bottom of the power amplification part for liquid cooling. Drawing upon the measurement results, the output power at each channel was over 43 dBm (20 W) and the drain efficiency was more than 50% at 2.4 GHz.

Thermal characterization and design of GaAs HBT with heat source drifting effects under large current operating condition

A detailed investigation on internal thermal phenomena of GaAs hetero bipolar transistor (HBT) structure is presented especially when sub-collector is considered. This allows for a realistic and physical electro-thermal analysis. With the help of Joule heating calculation, a drifting heat source across the collector region is observed under real operation of large current density. Temperature distribution also verifies this phenomenon with further simulation. To get a better insight into the mechanism of the drifting action, the associated distributed high electric field is then analyzed. A thermally optimized HBT is then proposed with Gaussian doping in the sub-collector region. Compared to the original structure, the new design shows a reduction of maximum temperature by 9.5% with base current density of 2e-5 A/μm. The findings in this paper can help with accurate thermal modeling and provide suggestions for thermal optimized HBT design as well.

A Ruggedness Improved Mobile Radio Frequency Power Amplifier Module with Dynamic Impedance Correction by Software Defined Atomization

A ruggedness improved multi-band radio frequency (RF) power amplifier (PA) module applicable to mobile handsets, which are required to survive against a serious load impedance change under extreme power and bias conditions, is presented. In this method, the load impedance of PA is adaptively adjusted with a digitally controlled impedance corrector to keep the PA safe by performing a load mismatch detection. The impedance mismatch detector, impedance corrector, and other RF switches were all integrated into a single integrated circuit (IC) using silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS). For the verification purpose, a 2-stage hetero junction bipolar transistor (HBT) PA module adopting this method was fabricated. At a frequency of 1915 MHz, a collector bias voltage of 4.2 V, and over a wider range of load impedance variation between a VSWR of 1 and a VSWR of 5.5, it did not fail. When this technique was not applied with a voltage standing wave ratio (VSWR) range of 1 to 4, it resulted in an acceptable RF performance degradation of 1% power added efficiency (PAE) in envelope tracking (ET) mode. Moreover, it survived at a bias voltage 1V larger than when the technique was not applied for the same mismatch condition.

Software-Based Adaptive Protection Control Against Load Mismatch for a Mobile Power Amplifier Module

A closed-loop protection method for a radio frequency (RF) power amplifier (PA) module applicable to mobile handsets has been introduced. The load impedance of the PA was adaptively sensed by an embedded impedance detector which was digitally controlled and the system adjusted PA power using a feedback circuit to keep the PA safe based on a load mismatch detection. For verification, a two-stage hetero junction bipolar transistor (HBT) PA module for handsets was fabricated and tested against load mismatch. Measurement results showed that the technique could help PA survive at a 0.5V larger collector bias voltage condition than when the technique was not applied for the same mismatch condition with an acceptable RF performance degradation at nominal condition.

Comparison of the Radiation Resistance of Prospective Bipolar and Heterobipolar Transistors

Approaches to solving the problem of the development of efficient bipolar and heterobipolar transistors operating at radio- and ultrahigh frequencies (0.1–10 GHz), which could be used as active elements of modern Si-based and GaAs-based radiation-resistant analog-digital integrated circuits, are discussed. Comparison of the radiation resistance of prospective “lateral” Si-based bipolar and “vertical” AlGaAs/GaAs heterobipolar transistors with a characteristic base thickness of 70–350 nm is performed. The features of the electron transport in active transistor regions are analyzed in detail and the influence of a surge in the velocity and the diffusion of quasi-ballistic electrons on an increase in the radiation resistance of transistors is evaluated.

NiCr resistors for terahertz applications in an InP DHBT process

In this article we report on the development of nickel-chrome (NiCr) thin film resistors (TFRs) for application in an Indium Phosphide (InP) Hetero-Bipolar Transistor process. We developed a stable process with low specific contact resistance, in which the sputtered NiCr is structured by lift-off. We measured a specific contact resistance to NiCr of 8 ×10−10 Ω ⋅ cm2. Furthermore we show the difficulties of structuring NiCr with an acid and connecting the NiCr from the top. Stress tests exhibited a high thermal resistance and high operation temperature of the NiCr on top of our BCB stack. Implemented NiCr resistors exhibit excellent agreement between simulation and measurement for high frequency applications. The utilization of the TFRs in microwave circuits showing excellent usability for microwave and terahertz applications.

Сравнение радиационной стойкости перспективных биполярных и гетеробиполярных транзисторов

AbstractApproaches to solving the problem of the development of efficient bipolar and heterobipolar transistors operating at radio- and ultrahigh frequencies (0.1–10 GHz), which could be used as active elements of modern Si-based and GaAs-based radiation-resistant analog-digital integrated circuits, are discussed. Comparison of the radiation resistance of prospective “lateral” Si-based bipolar and “vertical” AlGaAs/GaAs heterobipolar transistors with a characteristic base thickness of 70–350 nm is performed. The features of the electron transport in active transistor regions are analyzed in detail and the influence of a surge in the velocity and the diffusion of quasi-ballistic electrons on an increase in the radiation resistance of transistors is evaluated.

Investigating the RTA Treatment of Ohmic Contacts to n-Layers of Heterobipolar Nanoheterostructures

The preparation of ohmic contacts to heterobipolar nanostructures has a number of characteristic features. In addition to the basic requirement of minimizing contact resistance, contacts to this type of structures have a transition layer whose depth of penetration must not exceed the emitter layer’s thickness, due to the possibility of short-circuiting the emitter base p–n junction. In this work, the effect the main technological parameters of rapid thermal annealing have on a contact’s characteristics are examined, and the process of obtaining a low-resistance ohmic contact to heterobipolar transistor layers is optimized. Ohmic contacts to the n-layers of heterobipolar nanoheterostructures based on gallium arsenide and produced via layer-by-layer electron-beam deposition of Ge/Au/Ni/Au are considered. The diffusion distribution profiles of doping with Ge impurities are calculated as a function of the time and temperature of rapid thermal annealing, and are examined via scanning electron microscopy. It is found that rapid thermal annealing for 60 s at a temperature of 398°C yields ohmic contacts with low resistance, smooth surface morphology, and the minimum size of the transition layer.

Impact of nickel silicide on SiGe BiCMOS devices

Nickel silicide (NiSi) can improve the RF performance of SiGe hetero bipolar transistors (HBT) compared to cobalt silicide (Heinemann et al 2016 IEDM Tech. Dig. 51–4). In this paper, the impact of different procedures to form NiSi on HBT and MOS devices of a 0.13 μm BiCMOS cobalt silicide technology is studied. The different NiSi formations are carried out by partly or fully Ni consumption (PC, FC) for low temperature furnace and low pressure anneals. Our investigations indicate, PC results in rough silicide surfaces and substrate interfaces, whereas FC leads to smooth surfaces and interfaces associated with lower resistivities. FC nickel silicidation at 300 °C and 450 °C exhibits an excessive NiSi growth on the STI edges of n doped source drain (N+SD) regions, reducing the breakdown voltage to substrate or p well. An enhanced NiSi growth is found for all investigated silicide schemes on narrow P+SD regions along polysilicon gates. The leakage current of these structures is caused by enlarged lateral silicidation towards the gates. The enhanced lateral NiSi growth could be suppressed by partly Ni silicidation with furnace anneals at 200 °C or 230 °C.

Transferred-Substrate InP/GaAsSb Heterojunction Bipolar Transistor Technology With <inline-formula> <tex-math notation="LaTeX">${f}_{\text{max}}$ </tex-math> </inline-formula> ~ 0.53 THz

We report on the realization mymargin of transferred-substrate InP/GaAsSb double heterostructure bipolar transistors in a terahertz monolithic integrated circuit process. Transistors with 0.4- $\mu \text{m}$ -wide single emitters reached unilateral gain cutoff frequencies of around 530 GHz with simultaneous current gain cutoff frequencies above 350 GHz. Extrinsic collector capacitance is effectively reduced in the transfer-substrate process. In combination with the high collector breakdown voltage in the InP/GaAsSb heterobipolar transistor structure of 5 V, this process is amenable to analog power applications at millimeter (mm-wave) and sub-mm-wave frequencies. We demonstrate reliable extraction procedures for unilateral gain and current gain cutoff frequencies.

On increasing of density of transistors in a hybrid cascaded multilevel inverter

PurposeThe purpose of this paper is to analytically model redistribution of dopant in a heterostructure during annealing of dopant and/or radiation defects (during the modeling, the authors consider two types of infusing of the dopant: dopant diffusion and ion implantation). The authors consider a heterostructure, which consists of a substrate and an epitaxial layer. After that the authors consider doping of several specific areas to manufacture heterodiodes and heterobipolar transistors framework hybrid cascaded multilevel inverter.Design/methodology/approachBased on the modeling, the authors introduce an approach to increase density of diodes and bipolar transistors framework hybrid cascaded multilevel inverter, which has been manufactured based on the heterostructure. The approach is based on using inhomogeneity of the heterostructure and optimization of annealing of dopant and/or radiation defects.FindingsThe approach gives us possibility to take into account nonlinearity of considered processes.Originality/valueThe authors introduce an analytical approach to model diffusion and ion types of doping with account concurrent changing of parameters in space and time.

Manufacturable Low-Cost Flip-Chip Mounting Technology for 300–500-GHz Assemblies

We developed a chip mounting technology suitable for low-cost assemblies in the 300–500-GHz frequency range, compatible with standard chip and submount fabrication techniques. The waveguide and transition designs are compatible with indium phosphide heterobipolar transistor millimeter-wave monolithic integrated circuit chip architecture. Increased conductor shielding in different multilayer thin-film waveguide topologies is applied to suppress radiative losses, enabling low-loss interconnects up to 500-GHz bandwidth. Standard flip-chip align-and-place equipment is used to assemble the chips onto submounts. Losses are evaluated by banded ${S}$ -parameter measurements between 10 MHz and 500 GHz. For an optimized stripline-to-stripline transition, an insertion loss of less than 1 dB was measured at 500 GHz.

SciFab -a wafer-level heterointegrated InP DHBT/SiGe BiCMOS foundry process for mm-wave applications

We present a wafer-level heterointegrated indium phosphide double heterobipolar transistor on silicon germanium bipolar-complementary metal oxide semiconductor (InP DHBT on SiGe BiCMOS) process which relies on adhesive wafer bonding. Subcircuits are co-designed in both technologies, SiGe BiCMOS and InP DHBT, with more than 300 GHz bandwidth microstrip interconnects. The 250 nm SiGe HBTs offer cutoff frequencies around 200 GHz, the 800 nm InP DHBTs exceed 350 GHz. Heterointegrated signal sources are demonstrated including a 328 GHz quadrupling source with dBm RF output power. A common design kit for full InP DHBT/SiGe BiCMOS co-design was set up. The technology is being opened to third-party customers through IHP's multi-purpose wafer foundry interface. Microphotograph of InP DHBT / SiGe BiCMOS wafer

Indium Phosphide Heterobipolar Transistor Technology Beyond 1-THz Bandwidth

Recent improvements in the fabrication technology of InGaAs/InP heterobipolar transistors have enabled highly scaled transistors with power gain bandwidths above 1 THz. Limitations of the conventional fabrication process that reduce RF bandwidth have been identified and mitigated, among which are high resistivity base ohmic contacts, resistive base electrodes, excessive emitter end undercut, and insufficient undercut of large-diameter base posts. A novel two-step deposition process for self-aligned metallization of sub-20-nm bases has been developed and demonstrated. In the first step, a metal stack is directly evaporated onto the base semiconductor without any lithographic processing so as to minimize contamination from resist/developer chemistry. The composite metal stack exploits an ultrathin layer of platinum that controllably reacts with base, yielding low contact resistance, as well as a thick refractory diffusion barrier, which permits stable operation at high current densities and elevated temperatures. Further reduction of overall base access resistance is achieved by passivating base and emitter semiconductor surfaces in a combined atomic layer deposition Al2O3 and plasma-enchanced chemical vapor depositon SiNx sidewall process. This technology enables the deposition of low-sheet-resistivity base electrodes, further improving overall base access resistance and $f_{\textrm {max}}$ bandwidth. Additional process enhancements include the significant reduction of device parasitics by scaling base posts and controlling emitter end and base postundercut.

Using Buffer Porous Layers to Decrease Mismatch-Induced Stress in Heterobipolar Transistor

Using Buffer Porous Layers to Decrease Mismatch-Induced Stress in Heterobipolar Transistor

About influence of buffer porous layers between epitaxial layers of heterostructure on distributions of concentrations of dopants in heterobipolar transistors

In this paper we introduce an approach to manufacture a heterobipolar transistors. Framework this approach we consider doping by diffusion or by ion implantation of required parts of a heterostructure with special configuration and optimization of annealing of dopant and/or radiation defects. In this case one have possibility to manufacture bipolar transistors, which include into itself p-n-junctions with higher sharpness and smaller dimensions. We also consider influence of presents of buffer porous layers between epitaxial layers of heterostructure on distributions of concentrations of dopants in the considered transistors. An approach to decrease value of mismatch-induced stress has been considered.