Abstract
Nickel silicide (NiSi) can improve the RF performance of SiGe hetero bipolar transistors (HBT) compared to cobalt silicide (Heinemann et al 2016 IEDM Tech. Dig. 51–4). In this paper, the impact of different procedures to form NiSi on HBT and MOS devices of a 0.13 μm BiCMOS cobalt silicide technology is studied. The different NiSi formations are carried out by partly or fully Ni consumption (PC, FC) for low temperature furnace and low pressure anneals. Our investigations indicate, PC results in rough silicide surfaces and substrate interfaces, whereas FC leads to smooth surfaces and interfaces associated with lower resistivities. FC nickel silicidation at 300 °C and 450 °C exhibits an excessive NiSi growth on the STI edges of n doped source drain (N+SD) regions, reducing the breakdown voltage to substrate or p well. An enhanced NiSi growth is found for all investigated silicide schemes on narrow P+SD regions along polysilicon gates. The leakage current of these structures is caused by enlarged lateral silicidation towards the gates. The enhanced lateral NiSi growth could be suppressed by partly Ni silicidation with furnace anneals at 200 °C or 230 °C.
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