Good Thickness Uniformity Research Articles

Formation of extended defects in 4H‐SiC epitaxial growth and development of a fast growth technique

AbstractThis paper surveys extended defects in 4H‐SiC epilayers and reports recent results concerning fast epitaxial growth. Synchrotron X‐ray topography, transmission electron microscopy, Nomarski optical microscopy and defect selective etching analysis are applied to investigate the nucleation and propagation of carrot defects, basal plane Frank‐type defects, polytype inclusions and basal plane dislocations (BPDs) in 4H‐SiC epitaxial growth. In the development of the 4H‐SiC fast epitaxial growth technique, a very high growth rate of up to 250 μm/h is obtained in a newly developed vertical hot‐wall‐type reactor under low system pressure using a H2 + SiH4 + C3H8 system. Good thickness and impurity doping uniformity are also obtained simultaneously over a large area, with the retention of a high growth rate. A 4H‐SiC epilayer virtually free from BPDs is obtained on a 4° off Si‐face substrate. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Thickness controlled and smooth polycrystalline CVD diamond film deposition on SiO 2 with electrostatic self assembly seeding process

Sub micrometer thick continuous CVD diamond film was synthesized on thermally grown SiO 2 film employing the electrostatic self assembly seeding with nano-meter sized ultra dispersed diamond particles. Hot filament CVD system was used to deposit diamond film. Formation of mono-dispersed and mono-layered nano diamond seeding layer by well-known Electrostatic Self-Assembly method was effective to increase density and homogeneity of seeding particles. Because of high density of uniformed seeding particles, the nm controlled continuous CVD films with the surface roughness of less than 13 nm on silicon oxide without any mechanical damage were obtained. Linear growth rate with short incubation time was also observed. Depending on the film thickness, coloring effect was observed ranging from blue to yellow and orange. There was no visible fringe on the coated surface which affirms the good thickness uniformity.

Simulation of the thin-film thickness distribution for an OLED thermal evaporation process

A design of an OLED (organic light-emitting device) fabrication system strongly depends on a thermal evaporation process. In an OLED evaporation process, the essential requirements include good uniformity of the film thickness over a glass substrate. In this paper, a process simulation model was developed to predict the film thickness distribution by understanding system design parameters that affect the uniformity of film thickness. Based on the method developed in this study, the uniformity of the thickness in an organic layer was successfully controlled. The developed method allowed the manufacture of high quality OLED displays.

Experimental Study of ALD HfO2 Deposited on Strained Silicon-on-Insulator and Standard SOI

films of 4 nm were deposited by atomic layer deposition on silicon-on-insulator (SOI) substrates with various amounts of intentionally introduced lattice strain and several film thicknesses. After postdeposition annealing (PDA), the samples were studied by Rutherford backscattering spectroscopy, Raman spectroscopy, high-resolution transmission electron microscopy (HRTEM), electron energy-loss spectroscopy (EELS), and X-ray photoelectron spectroscopy (XPS). The as-deposited film showed a good stoichiometry and thickness uniformity. The strain in strained SOI layers remained after high-temperature PDA at . HRTEM images showed that, while films on standard nonstrained SOI became polycrystalline after PDA at , films on sSOI remained amorphous. The strain in the sSOI layer also suppressed the interlayer (IL) growth during PDA. The EELS and XPS results confirmed the interdiffusion across the interface. The XPS data also showed that the formation of Hf–O–Si bonds depends on the SOI lattice strain and thickness. The SOI thickness is critical to reduce the formation of silicate in the IL.

環状水素化炭素モノマーを用いたプラズマ支援重合膜特性への堆積温度の影響

Plasma CVD is a candidate technology to fabricate an optical polymer waveguide. It can deposit a film on any surface geometry and any material of substrate at temperature under 200 deg.C in vacuum process. Also, it provides good thickness controllability and uniformity of the deposition film. In the present study the effects of deposition temperature on film properties, those are refractive index, deposition rate, and molecular structure, are discussed. The refractive index decreases with elevating deposition temperature. The logarithm of deposition rare increases proportionally with the reciprocal temperature and the gradient of that depends on the ratio of double bond in monomer sources. The gradient does not change by using CF4 instead of Ar as gas mixed in plasma, though the deposition rate increases about 5 times. Langmuir adsorption isotherm explains the temperature dependency of deposition rate. We speculate that the deposition rate increase due to precursor increasing by mixing CF4 to plasma and due to dangling bonds increasing in the surface of deposition film by F radicals. And we also speculate that the precursors incorporated into the polymer are selected on a substrate by absorbed sites and absorption energy.

Silicon Carbide Hot-Wall Epitaxy for Large-Area, High-Voltage Devices

ABSTRACTThe growth of thick silicon carbide (SiC) epitaxial layers for large-area, high-power devices is described. Horizontal hot-wall epitaxial reactors with a capacity of three, 3-inch wafers have been employed to grow over 350 epitaxial layers greater than 100 μm thick. Using this style reactor, very good doping and thickness uniformity and run-to-run reproducibility have been demonstrated. Through a combination of reactor design and process optimization we have been able to achieve the routine production of thick epitaxial layers with morphological defect densities of around 1 cm−2. The low defect density epitaxial layers in synergy with improved substrates and SiC device processing have resulted in the production of 10 A, 10 kV junction barrier Schottky (JBS) diodes with good yield (61.3%).

Nitric acid method for fabrication of gate oxides in TFT

We have developed low temperature formation methods of SiO 2 layers which are applicable to gate oxide layers in thin film transistors (TFT) by use of nitric acid (HNO 3). Thick (>10 nm) SiO 2 layers with good thickness uniformity (i.e., ±4%) can be formed on 32 cm × 40 cm substrates by the two-step nitric acid oxidation method in which initial and subsequent oxidation is performed using 40 and 68 wt% (azeotropic mixture) HNO 3 aqueous solutions, respectively. The nitric acid oxidation of polycrystalline Si (poly-Si) thin films greatly decreases the height of ridge structure present on the poly-Si surfaces. When poly-Si thin films on 32 cm × 40 cm glass substrates are oxidized at azeotropic point (i.e., 68 wt% HNO 3 aqueous solutions at 121 °C), ultrathin (i.e., 1.1 nm) SiO 2 layers with a good thickness uniformity (±0.05 nm) are formed on the poly-Si surfaces. When SiO 2/Si structure fabricated using plasma-enhanced chemical vapor deposition is immersed in 68 wt% HNO 3, oxide fixed charge density is greatly decreased, and interface states are eliminated. The fixed charge density is further decreased by heat treatments at 200 °C, and consequently, capacitance–voltage characteristics which are as good as those of thermal SiO 2/Si structure are achieved.

Stress–strain behavior as related to surface topography and thickness uniformity in uni‐ and biaxially stretched PVDF/PMMA blends

AbstractThe influence of blend composition and processing conditions on the surface roughness and thickness uniformity of PVDF/PMMA blends were investigated in uniaxial and biaxial deformation mode for PVDV and PVDF/PMMA blends 70/30, 55/45, and 40/60 wt%. The addition of PMMA retards the thermal crystallizability of the blends and this allows rapid solidification into films with little or no crystallinities. Such precursors with lowered crystallinity were found to be easily uni‐ and biaxially stretched into uniform and transparent films in the temperature range between the glass transition temperature and cold crystallization temperature where they exhibit strain hardening. Thus, these blends are suitable for processes such as tenter frame biaxial stretching, double bubble film blowing, and stretch blow molding where they will exhibit good transparency and thickness uniformity. POLYM. ENG. SCI., 47:2110–2117, 2007. © 2007 Society of Plastics Engineers

Experimental Study of ALD HfO2 Deposited on Strained Silicon-on-Insulator (sSOI & xsSOI) and SOI

4 nm HfO2 films are deposited on silicon-on-insulator (SOI) with various amounts of lattice strain and thickness by atomic layer deposition (ALD). After post deposition annealing (PDA), the samples are studied by Rutherford backscattering spectroscopy (RBS), high-resolution transmission electron microscopy (HRTEM), electron energy-loss spectroscopy (EELS), and x-ray photoelectron spectroscopy (XPS). The as-deposited HfO2 film shows good stoichiometry and thickness uniformity. HRTEM images show that while HfO2 films on non-strained SOI becomes poly-crystalline after PDA at 600 oC, HfO2 films on strained SOI still keep amorphous. The strain SOI also suppresses the IL growth during PDA. The EELS and XPS results confirm the interdiffusion across the HfO2/Si interface. The XPS data also show that formation of Hf-O-Si bonds depend on the SOI lattice strain and thickness. The SOI thickness is critical to reduce the formation of silicate in the IL.

Development of Slit Coating Photoresist with High Coating Speed Property

The faster coating speed is required to the photoresist for slit coating process. When the photoresist is coated at high coating speed, the film thickness uniformity becomes worse. The carboxylic acids and the ester compounds with long alkyl chain were added into photoresist for the slit coating process. Such photoresist showed really good film thickness uniformity of photoresist film on the glass substrate at high coating speed condition.

Normal Incidence Intersubband Absorption in GaN/AlN Superlattices Grown on Facet-Controlled Epitaxial Lateral Overgrown GaN/Sapphire Templates

GaN/AlN superlattice structures along the (1122) facet were grown on facet-controlled epitaxial lateral overgrown (FACELO) GaN/sapphire templates by metal organic chemical vapor deposition (MOCVD). The as-grown GaN/AlN superlattice shows abrupt interfaces and good periodicity, as characterized by high-resolution transmission electron microscopy (TEM). The intersubband transition peak at a wavelength of 1.9 µm was observed for an AlN (1.5 nm)/GaN (1 nm) superlattice grown on the FACELO GaN (1122) facet with the propagation direction of the incident light normal to the (0001) facet of sapphire, called the normal incidence condition. The full width at half-maximum of the absorption peak is as narrow as 65 meV, implying the high quality of the interfaces, good thickness uniformity, and the reduced polarization effect in the structures. This result shows the promising feasibility for realizing two-dimensional (2D) arrays of nitride-based quantum-well infrared photodetectors (QWIPs) using GaN/AlN superlattices grown on FACELO GaN/sapphire templates.

Chemical vapor infiltration of photocatalytically active TiO 2 thin films on glass microfibers

Due to the high diffusivity of the chemical species, chemical vapor infiltration (CVI) is a suitable process for the conformal coverage of objects with large dimensions and complex shape geometry. Its large scale capacity and high reproducibility have made the technique favorable for the deposition of non-oxide ceramics. There are few works on other materials and metal-organic compounds are rarely used as molecular precursors. In this study we focus on the deposition of anatase thin films on substrates with large surface area (microfibers) for photocatalytic air treatment systems. Titanium tetra-isopropoxide (TTIP) was used as precursor without additional oxygen source. Using low mole fractions (26–124 × 10 − 5 ) and low deposition temperatures (300–400 °C), a relatively good thickness uniformity was obtained along the reactor axis. Infiltration experiments were achieved in this temperature range and under 1 Torr for high TTIP diffusivity (110–146 cm 2 s − 1 ) and low initial Thiele modulus (0.11–0.13) values. Photocatalytic activity of TiO 2 coated glass microfiber samples depends on the film morphology, average thickness and infiltration efficiency. It is shown that this later parameter plays a major role due to the increase of active surface area.

Growth and Characterization of High Quality MgO Thin Films by Ultrasonic Spray Pyrolysis

Ultrasonic spray pyrolysis has been applied to deposit MgO thin films on Si(100) and quartz glass substrate. The microstructures and properties of the as-grown MgO thin films were examined by X-ray diffraction, scanning electron microscopy, spectrophotometer and semiconductor resistivity meter. The results indicates that the MgO thin films deposited under optimal conditions shows smooth and dense surface without visible pores or defects over the substrate, and as well as good thickness uniformity. Almost completely (100)-oriented MgO films with the transmission higher than 90% in UV/VIS region and the resistivity at least in the order of 107Ω-cm were obtained. MgO thin film with such a crystal quality seems to be very suitable for acting as a buffer layer for the subsequent epitaxial growth of films.

Electron beam deposition and characterization of thin film Ti-Ni for shape memory applications

Thin film of Ti-Ni alloy has a potential to perform the microactuation functions required in the microelectromechanical system (MEMS). It is essential, however, to have good uniformity in both chemical composition and thickness to realize its full potential as an active component of MEMS devices. Electron beam evaporation technique was employed in this study to fabricate the thin films of Ti-Ni alloy on different substrates. The targets used for the evaporation were first prepared by electron beam melting. The uniformity of composition and microstructure of the thin films were characterized by electron probe microanalysis (EPMA), Auger electron spectroscopy (AES), X-ray diffraction (XRD), scanning electron microscopy (SEM), atomic force microscopy (AFM) and transmission electron microscopy (TEM). The mechanical property of the thin films was evaluated by the nano - indentation test. The martensitic transformation temperature was measured by differential scanning calorimetry (DSC). It is confirmed that the chemical composition of deposited thin films is identical to that of the target materials. Furthermore, results from depth profiling of the chemical composition variation reveal that the electron beam evaporation process yields better compositional homogeneity than other conventional methods such as sputtering and thermal evaporation. Microstructural observation by TEM shows that nanometer size precipitates are preferentially distributed along the grain boundaries of a few micron size grains. The hardness and elastic modulus of thin films decreases with an increase in Ti contents.

Pentacene devices and logic gates fabricated by organic vapor phase deposition

An organic vapor phase deposition (OVPD) tool has been developed and optimized for the deposition of pentacene thin films. Pentacene is grown with a good thickness uniformity, a good material consumption efficiency, and deposition rates up to 9.5Å∕s. Top-contact transistors based on OVPD-grown pentacene show high mobilities (up to 1.35cm2∕Vs) and excellent characteristics, even at high deposition rates. Elementary circuit blocks have also been produced using an OVPD-deposited pentacene film. A five-stage ring oscillator features a stage delay of 2.7μs at a supply voltage of 22V.

Optimization of plasma-enhanced chemical vapor deposition silicon oxynitride layers for integrated optics applications

Silicon oxynitride (SiO x N y :H) layers were grown from 2%SiH 4/N 2 and N 2O gas mixtures by plasma-enhanced chemical vapor deposition (PECVD). Layer properties such as refractive index, deposition rate, thickness non-uniformity and hydrogen bond content were correlated to the relevant deposition parameters including radio frequency power, chamber pressure, total gas flow, substrate temperature and N 2O/SiH 4 gas flow ratio. As a result, optimized SiO x N y :H layers could be produced over a wide index range (1.46–1.70) with good thickness uniformity and sufficiently high deposition rate. With a refraction index non-uniformity < 5 × 10 − 4 a thickness non-uniformity could be obtained below 1% over a 70 × 70 mm 2 area of a 100 mm wafer at a deposition rate > 50 nm/min. The material composition and the optical properties of the SiO x N y :H layers were characterized by spectroscopic ellipsometry, X-ray Photoelectron Spectroscopy, Fourier Transform Infrared spectroscopy and prism coupler techniques. A simple atomic valence model is found to describe the measured atomic concentrations for PECVD silicon oxynitride layers.

Design, Fabrication and Application of 4H-SiC Trenched-and-Implanted Vertical JFETs

This paper reports recent progress in the development of a vertical JFET, the purely vertical JFET based on trenched-and-implanted vertical JFET (TI-VJFET) approach that eliminates the need of epitaxial regrowth at middle of device fabrication and the need of a merged lateral JFET to control the vertical JFET. Different structures have been designed to target breakdown voltages ranging from 600V to 1.2kV. Vertical channel width uniformity has been studied, showing the feasibility of achieving below 0.1um variation for reasonably flat wafers of good thickness uniformity. Pitch size of the designs has been reduced compared to early report. Gate trench width has been reduced from 3.8um to 2.3um, aimed at increasing the device current capability. Fabricated device cells have been tested and packaged into multi-cell 30A TI-VJFETs which have been characterized of DC and switching characteristics at room and elevated temperatures. Very fast current rise/fall times of &lt;10ns were observed from RT to 200°C. PSpice model for TI-VJFET has been developed and applied to the performance prediction of 3-phase SiC power inverter, suggesting a high efficiency 97.7% at 200°C junction temperature without using soft-switching scheme. Preliminary experimental demonstration of a PWM-controlled three-phase inverter based on SiC TI-VJFET power board is reported.

SSOI fabrication by wafer bonding and layer splitting of thin SiGe virtual substrates

Fabrication of strained silicon on insulator (sSOI) substrates by wafer bonding and layer splitting is described in this paper. The sSi layer of 20 nm thickness is obtained on an 8 in. virtual substrate that consists of a plastically relaxed SiGe layer grown epitaxially on Si(0 0 1) by chemical vapor deposition (CVD). The plastic relaxation of the initially pseudomorphic SiGe layer is mediated by helium implantation into the Si wafer below the SiGe/Si(0 0 1) interface and subsequent annealing. A SiO 2 layer is grown by plasma enhanced (PE) CVD on the sSi/virtual substrate prior to wafer bonding. The PECVD oxide layer is used to compensate the thermal stress existing at the bonding interface during annealing. The SiO 2/sSi/virtual substrate wafers are then implanted with hydrogen at a high dose (3.5 × 10 16 H 2 + cm −2) and subsequently bonded to Si(0 0 1) handle wafers. Subsequent annealing of the bonded wafer pair leads to the transfer of the implanted layer (containing the sSi layer) from the virtual substrate to the Si handle wafer. The final sSOI structure is realized by subsequent chemo-mechanical polishing followed by selective wet chemical etching. The sSOI substrate shows good thickness uniformity (∼20 nm) of the sSi layer over the entire 8 in. area and the strain measurements indicate a value of ∼0.66%.

Tri-layer antireflection coatings (SiO2/SiO2–TiO2/TiO2) for silicon solar cells using a sol–gel technique

Abstract Antireflection coatings (ARCs) have become one of the key issues for mass production of Si solar cells. They are generally performed by vacuum processes such as thermal evaporation, reactive sputtering, and plasma-enhanced chemical vapor deposition. In this work, a sol–gel method has been demonstrated to prepare the ARCs for the non-textured monocrystalline Si solar cells. The spin-coated TiO2 single-layer, SiO2/TiO2 double-layer and SiO2/SiO2–TiO2/TiO2 triple-layer ARCs were deposited on the Si solar cells and they showed good uniformity in thickness. The measured average optical reflectance (400–1000 nm) was about 9.3, 6.2 and 3.2% for the single-layer, double-layer and triple-layer ARCs, respectively. Good correlation between theoretical and experimental data was obtained. Under a triple-layer ARC condition, a 39% improvement in the efficiency of the monocrystalline Si solar cell was achieved. These indicate that the sol–gel ARC process has high potential for low-cost solar cell fabrication.

Current status of large-area MOVPE growth of HgCdTe device heterostructures for infrared focal plane arrays

This paper reviews the current status of the growth of fully doped HgCdTe (MCT) devices by metalorganic vapor phase epitaxy (MOVPE). The current reactor system has been developed to produce 3-inch diameter epitaxial layers compatible with slice-scale processing. The new reactor system has achieved routine epitaxial growth of MCT with good morphology onto both gallium arsenide (GaAs) and GaAs on silicon (Si) wafers that were oriented (2–8°) off (100) orientation. The density of surface defects (so-called “hillocks”), typical of MOVPE growth on such orientation substrates, has been reduced to <5 cm−2 at a sufficient yield to make the production of low cluster defect 2D arrays possible. Alternative growth experiments onto cadmium telluride (CdTe) on Si substrates with (211)B orientation have also been performed to investigate their usefulness for infrared focal plane array (IRFPA) applications. Si substrates give better thermal expansion match to the read out Si circuits (ROIC). The horizontal reactor cell design has a graphite susceptor with a rotating platen capable of using substrates up to 4-inch diameter. Work, however, has concentrated on 3-inch diameter GaAs and GaAs on Si wafers substrates in the reactor, and these reproducibly demonstrated good compositional and thickness uniformity. Cut-off wavelength and thickness uniformity maps showed that there was sufficient uniformity to produce twelve sites of large format 2D arrays (640×512 diodes on 24-µm pitch) per slice. Minority carrier lifetimes in heterostructures is an important parameter and some factors affecting this are discussed, with special emphasis on As-doped material grown under various growth conditions in an attempt to reduce Shockley-Read (S-R) trap densities. New data are presented on trap densities and theoretical fitting of lifetimes in MOVPE material. Fully doped heterostructures have been grown to investigate the device performance in the 3–5 µm medium-wave IR (MWIR) band and 8–12 µm long-wave IR (LWIR). These layers have been fabricated into mesa arrays and then indium-bumped onto Si multiplexers. A summary of the 80-K device results shows that state-of-the-art device performance has been demonstrated in MOVPE-grown device structures.