SSOI fabrication by wafer bonding and layer splitting of thin SiGe virtual substrates

Abstract

Fabrication of strained silicon on insulator (sSOI) substrates by wafer bonding and layer splitting is described in this paper. The sSi layer of 20 nm thickness is obtained on an 8 in. virtual substrate that consists of a plastically relaxed SiGe layer grown epitaxially on Si(0 0 1) by chemical vapor deposition (CVD). The plastic relaxation of the initially pseudomorphic SiGe layer is mediated by helium implantation into the Si wafer below the SiGe/Si(0 0 1) interface and subsequent annealing. A SiO 2 layer is grown by plasma enhanced (PE) CVD on the sSi/virtual substrate prior to wafer bonding. The PECVD oxide layer is used to compensate the thermal stress existing at the bonding interface during annealing. The SiO 2/sSi/virtual substrate wafers are then implanted with hydrogen at a high dose (3.5 × 10 16 H 2 + cm −2) and subsequently bonded to Si(0 0 1) handle wafers. Subsequent annealing of the bonded wafer pair leads to the transfer of the implanted layer (containing the sSi layer) from the virtual substrate to the Si handle wafer. The final sSOI structure is realized by subsequent chemo-mechanical polishing followed by selective wet chemical etching. The sSOI substrate shows good thickness uniformity (∼20 nm) of the sSi layer over the entire 8 in. area and the strain measurements indicate a value of ∼0.66%.