GaN-based High Electron Mobility Transistors Research Articles

Reliability, Applications and Challenges of GaN HEMT Technology for Modern Power Devices: A Review

A new generation of high-efficiency power devices is being developed using wide bandgap (WBG) semiconductors, like GaN and SiC, which are emerging as attractive alternatives to silicon. The recent interest in GaN has been piqued by its excellent material characteristics, including its high critical electric field, high saturation velocity, high electron mobility, and outstanding thermal stability. Therefore, the superior performance is represented by GaN-based high electron mobility transistor (HEMT) devices. They can perform at higher currents, voltages, temperatures, and frequencies, making them suitable devices for the next generation of high-efficiency power converter applications, including electric vehicles, phone chargers, renewable energy, and data centers. Thus, this review article will provide a basic overview of the various technological and scientific elements of the current GaN HEMTs technology. First, the present advancements in the GaN market and its primary application areas are briefly summarized. After that, the GaN is compared with other devices, and the GaN HEMT device’s operational material properties with different heterostructures are discussed. Then, the normally-off GaN HEMT technology with their different types are considered, especially on the recessed gate metal insulator semiconductor high electron mobility transistor (MISHEMT) and p-GaN. Hereafter, this review also discusses the reliability concerns of the GaN HEMT which are caused by trap effects like a drain, gate lag, and current collapse with numerous types of degradation. Eventually, the breakdown voltage of the GaN HEMT with some challenges has been studied.

Surface Dispersion Suppression in High-Frequency GaN Devices

GaN-based high electron mobility transistors (HEMTs) are shown to have excellent properties, showing themselves to perform well among the throng of solid-state power amplifiers. They are particularly promising candidates for next-generation mobile communication applications due to their high power density, frequency, and efficiency. However, the radio-frequency (RF) dispersion aroused by a high surface-state density inherent in nitrides causes the degradation of GaN devices’ performance and reliability. Although various dispersion suppression strategies have been proposed successively—including surface treatment, passivation, field plate, cap layer, and Si surface doping—outcomes were not satisfactory for devices with higher frequencies until the emergence of a novel N-polar deep recess (NPDR) structure broke this deadlock. This paper summarizes the generation of dispersion, several widespread dispersion containment approaches, and their bottlenecks under high frequencies. Subsequently, we highlight the NPDR structure as a potential substitute, evaluate its technical benefits, and review the continuous exertions in recent years.

Cumulative Hot-Electron Trapping in GaN-Based Power HEMTs Observed by an Ultrafast (10 V/Ns) On-Wafer Methodology

The goal of this article is to advance the understanding of the impact of hard switching on the dynamic performance of GaN-based high electron mobility transistors (HEMTs). To this aim, we developed a fast (10 V/ns) on-wafer system for testing devices in hard switching. The system has been used to study the reliability of several <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$W_{G}=2$ </tex-math></inline-formula> mm p-type GaN HEMTs with different <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$L_{\text {GD}}$ </tex-math></inline-formula> or buffer properties. First, we show that by optimizing the drain node capacitance, we can speed up the hard-switching transition to a few ns, even on-wafer level. Second, repeating the experiment by using multiple frequencies, from 1 to 100 kHz, we demonstrate that, in real-world applications, cumulative turn-on stress has a much stronger effect on <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R_{\mathrm {ON}}$ </tex-math></inline-formula> compared with OFF-state stress. Third, by comparing the results on identical devices having shorter <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$L_{\text {GD}}$ </tex-math></inline-formula> , we pinpoint hot electrons as the main mechanism in the device degradation, ruling out the contribution of self-heating. Finally, by comparing three wafers with different processing conditions (different passivation, different buffer), we suggest that trapping phenomena related to hot electrons happen in ns time scale and that the properties of the buffer can significantly impact the dynamic performance of the devices in hard switching.

Improved Breakdown Voltage and Low Damage E-Mode Operation of AlON/AlN/GaN HEMTs Using Plasma Oxidation Treatment

Low-damage plasma oxidation treatment for AlN/GaN high-electron-mobility transistors (HEMTs) was developed in this letter, with which high-performance enhancement-mode (E-mode) AlON/AlN/GaN HEMTs were demonstrated. After removal of in situ SiN cap layer within gate area, remote plasma oxidation (RPO) treatment of 4.9nm AlN barrier layer at 300 °C leads to formation of AlON insulator layer and effective depletion of 2-D electron gas channel, without etch-induced damage or serious interfacial issues compared with the commonly used gate- recess metal-insulator-semiconductor HEMTs. Thanks to the low-damage RPO treatment, the achieved E-mode HEMTs with threshold voltage of 0.4 V exhibit quite a small loss of output current (7.8%) compared with the depletion-mode devices. In addition, the AlON gate insulator layer results in a remarkable increase in breakdown voltage of devices from 20 V to 74 V, which benefits the high-voltage operation of AlN/GaN technology. Further investigation shows that the oxidation process of AlN barrier tends to be saturated with treatment time increasing, providing a promising solution to the high-performance E-mode operation of scaled GaN-based HEMTs in RF applications.

DC and low-frequency noise characteristics of GaN-based HEMTs under cryogenic temperatures

In this work, the device characteristics of GaN-based high-electron-mobility transistors (HEMTs) were systematically investigated by the direct current (DC) and low-frequency noise (LFN) measurements within the temperature ranging from 300 K to 4.2 K. The temperature-dependent behavior of the on- and off-state electrical properties was statistically analyzed, highlighting an overall improved device performance under cryogenic temperatures. In addition, the LFN of the device exhibited an evident behavior of 1/f noise from 10 Hz to 10 kHz in the measured temperature range and can be well described by the carrier number fluctuations with correlated mobility fluctuations (CNF/CMF) model down to 4.2 K. Based on this model, we further extracted and discussed the defect-related behavior in the devices under low-temperature environments. These experimental results provide insights into the device characteristics of GaN-based HEMTs under cryogenic environments, motivating further studies into the GaN-based cryo-devices and systems.

Degradation mechanisms of Mg-doped GaN/AlN superlattices HEMTs under electrical stress

GaN-based high electron mobility transistors (HEMTs) have exhibited great application prospects in power and radio frequency devices, thanks to the superior properties of GaN. Despite the significant commercialization progress, the reliability of GaN-based HEMTs remains a challenge. This work experimentally investigates the time-dependent degradation of Mg-doped GaN/AlN superlattice HEMTs under both OFF-state and SEMI-ON-state bias conditions and proposes that GaN/AlN superlattices as a barrier can solve the Vth instability issues of GaN HEMTs under OFF-state and SEMI-ON-state bias conditions. On the one hand, in the SEMI-ON-state, the hot electron effect leads to the degradation of Ig, gm,max, and Id,sat to varying degrees. However, the as-prepared GaN-based HEMTs exhibit excellent Vth stability (almost no change) under hot electron injection, on the account of the excellent two-dimensional electron gas confinement in the GaN/AlN superlattice structure. On the other hand, in the OFF-state, positive Vth shift (about 0.12 V) is induced by the hole emission in the GaN/AlN superlattice structure under reverse bias stress. In addition, the stress-induced destruction of MgO gate dielectric gives rise to the gate leakage, which increases by 2 orders of magnitude and triggers an irreversible degradation (about 10%) of the gm,max. These results are expected to provide a solution to the Vth instability of GaN HEMTs.

CMOS-compatible GaN-based high electron mobility transistors with gate-first technology

In this article, the gate-first technology was developed in GaN-based HEMTs on silicon with low-temperature (LT) Ta/Al/CuW ohmic contacts. Benefiting from the 20 nm high-quality in-situ SiNx layer, the gate-first device with LT Ta/Al/ CuW ohmic contacts shows a maximum dielectric electric field strength of 13.5 MV/cm and a high Baliga’ Figure of Merit (BFOM) of 424 MW/cm2, which is 20.5% and 61.8% higher than that of the gate-first device with high-temperature (HT) Ti/Al/Ni/Au ohmic contacts, respectively. Moreover, the proposed device also demonstrates a negligible threshold voltage shift based on different gate stress bias and stress time measurements. By fitting the data with a power law, the lifetime was extrapolated to 63.2% of failures at 25 °C after 20 years, resulting in operating gate voltages of 9.2 V and 11.1 V (about 4.6 MV/cm and 5.6 MV/cm) for the gate-first devices with HT Ti/Al/Ni/Au and LT Ta/Al/CuW ohmic contacts, respectively. These results illustrate that the gate-first device with LT Au-free ohmic contacts has great potential in high-voltage applications.

The DC Performance and RF Characteristics of GaN-Based HEMTs Improvement Using Graded AlGaN Back Barrier and Fe/C Co-Doped Buffer

In this article, the impact of the graded AlGaN back barrier and Fe\C co-doping buffer structure on the AlGaN <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$/$ </tex-math></inline-formula> GaN high electron mobility transistors (HEMTs) is proposed and systematically investigated. Due to effective suppression of Fe tail in unintentionally doped GaN (uid-GaN) layer by the insertion of the thick graded AlGaN back barrier layer, a large maximum drain current density and a transconductance peak are achieved. Meanwhile, the breakdown voltage is significantly improved by the use of Fe\C co-doping GaN buffer design. More importantly, it is revealed that the graded-AlGaN design can reduce the range and intensity of the electrical potential distribution in uid-GaN layer and then effectively suppress the acceptor-induced trapping\detrapping effect under high drain voltage. The RF small-signal performance of Fe-doped GaN (GaN:Fe)\C co-doping buffer HEMT exhibits significant improvement. In addition, load-pull measurement at 8 GHz revealed that a saturation power increases from 38.04 to 41.07 dB, a power gain increases from 9.06 to 10.58 dB, and an associate power-added-efficiency (PAE) increased from 40.27% to 50.18%. Our proposed GaN-based epitaxial structure can not only suppress the gate lag by reduce AlGaN surface electric field, but it can also suppress the drain lag by reduce the amplitude and range of potential distribution. It indicates that our proposed device has great potential for future high-voltage RF power amplifier application.

Performance improvement in NiO x -based GaN MOS-HEMTs

We have illustrated the thermal oxidation of Ni as gate dielectrics to improve the characteristics of GaN-based metal oxide semiconductor high electron mobility transistors (HEMTs). The oxide is formed by a pre-deposition of a thin film followed by oxidation in pure O2 ambient. The formation and thickness of the oxides are confirmed through x-ray photoelectron spectroscopy and transmission electron microscopy. NiO x is found to have an energy band gap of 3.7 eV determined using O 1s energy loss spectra. NiO x is found to provide negative (1.7 eV) valence band offsets with AlGaN. The potential use of the oxides has been confirmed by the significant improvement in drive current, transconductance, subthreshold swing, unity current gain frequency, and gate current leakage over the Schottky barrier HEMTs (SB-HEMTs). We have observed a positive shift in threshold voltage for NiO x -based gate dielectric devices compared to that of the SB-HEMTs.

Radiation Effects in AlGaN/GaN HEMTs

An overview is presented of displacement damage (DD) effects, total-ionizing-dose (TID) effects, and single-event effects in AlGaN/GaN high electron mobility transistors (HEMTs). High-fluence proton-induced DD creates point defects and impurity complexes at fluences that are comparable to or higher than those encountered in space applications. Defect and impurity dehydrogenation also contributes significantly to the DD/TID response at fluences typical of realistic space environments. The bias applied during irradiation can affect the DD/TID response strongly. Bias stress before irradiation can lead to enhanced proton-induced degradation of AlGaN/GaN HEMTs. Low-frequency noise measurements and density functional calculations provide insight into defect microstructures and energy levels. GaN-based HEMTs can be quite vulnerable to single-event effects in space. Of particular concern is single-event burnout (SEB). The vulnerabilities of GaN-based devices to SEB at voltages below rated limits and significant device-to-device variations in SEB response lead to significant voltage derating for GaN-based power devices in space systems. Developing an improved understanding of the effects of defects and hydrogen on the radiation response of AlGaN/GaN HEMTs can improve the DD/TID response by reducing threshold-voltage shifts and transconductance degradation. Reducing defect densities may also reduce the variation in SEB response, enabling reliable device operation at higher voltages in future space systems.

A Novel GaN-Based Metal-2DEG-Metal Varactor With Cutoff Frequency of 3.13 THz

A novel metal-2DEG-metal (M-2DEG-M) varactor based on GaN high electron mobility transistor (HEMT) structures was designed and investigated. The novel varactor employed metal-2DEG direct contacts to form two back-to-back Schottky junctions, eliminating the threshold voltage and showing a strong nonlinear <i>CV</i> behavior at zero bias, which was more beneficial to terahertz (THz) multiplier circuits design compared with the conventional metal&#x2013;semiconductor&#x2013;metal (MSM) 2DEG varactors. The metal-2DEG direct contacts reduced the junction capacitance and the series resistance simultaneously. For the M-2DEG-M varactor with an electrode length of <inline-formula> <tex-math notation="LaTeX">$1 \mu \text{m}$ </tex-math></inline-formula>, the device capacitance at zero bias was determined to be 3.0 fF (without de-embedding the parasitic component), with the series resistance of <inline-formula> <tex-math notation="LaTeX">$25.4 \Omega $ </tex-math></inline-formula>, resulting in a record high cutoff frequency of 2.09 THz for GaN-based varactors. After de-embedding the parasitic pad-to-pad capacitance, the cutoff frequency and figure of merit (FOM) would be 3.13 and 7.14 THz, respectively. Additionally, the whole fabrication process of the novel varactor only needed two steps of ordinary UV lithography without elaborate nanoscale T-gates, totally compatible with GaN-based HEMT process.

RF Extraction of Thermal Resistance for GaN HEMTs on Silicon

In this article, an ac conductance method has been successfully employed to extract the thermal resistance of GaN-based high-electron-mobility transistors (HEMTs) on silicon. The resulting thermal resistances, when varying the channel length and gate width, are comparable to those obtained with pulsed measurements, by making use of positive drain-to-source pulsed voltages from a zero power dissipation quiescent bias point and 3-D thermal simulations. Furthermore, the gate geometry dependence of the thermal resistance of GaN-based HEMTs has been successfully modeled for circuit-design purposes.

The Sensing Mechanism of InAlN/GaN HEMT

The sensing mechanism of InAlN/GaN high electron mobility transistors (HEMTs) is investigated systematically by numerical simulation and theoretical analysis. In detail, the influence of additional surface charge on device performance and the dependence of surface sensing properties on InAlN barrier thickness are studied. The results indicate that the saturation output drain current Idsat and two-dimensional electron gas (2DEG) concentration increase with the increase of positive surface charge density, which decrease with the increase of negative surface charge. The influence of negative surface charge on device performance is more remarkable than that of positive surface charge. Additionally, the modulation ability of surface charge on device performance increases with the decrease ofInAlN barrier thickness. The modulation of surface charge on device performance and the influence of barrier thickness on surface sensing sensitivity are mainly attributed to the variation of the energy band structure, surface potential and 2DEG concentration in the HEMT heterostructure. This work provides important support for structural optimization design of GaN-based HEMT sensors.

Mechanistic influence on uniformity of sheet resistance of AlGaN/GaN HEMT grown on Si substrate with the graded AlGaN buffer layers

In this study, the relationship among the wafer bow, dislocations, and transport characteristics of aluminum gallium nitride/gallium nitride (AlGaN/GaN) high electron mobility transistor (HEMT) grown on the silicon substrate using conventional AlGaN buffer layers was comprehensively investigated. It is speculated herein that the mechanism that affects the uniformity of sheet resistance is the uneven distribution of stress in GaN-based HEMT and the wafer bow it generates. The bow can lead to the difference in mobility through affecting the threading dislocations, resulting in poor uniformity of resistance. This conjecture was supported by the results of high-resolution X-ray diffraction, non-contact Hall measurement, Raman spectroscopy, and sheet resistance measurements. To further investigate this problem, a model was proposed to explain it from the perspective of formation mechanism.

Cellular automaton approach for carrier degeneracy effects on the electron mobility of high electron mobility transistors

GaN-based high electron mobility transistors (HEMTs) are expected to have high performance in base station applications. Recently, it was reported that the combination of the Poisson–Schrödinger method and cellular automaton method is effective for predicting the mobility of channel two-dimensional electron gas of GaN HEMTs. In the operation condition of HEMT, the surface electron density of the channel is on the order of 1013 cm−2, and the effect of degeneracy cannot be ignored in calculating the mobility. Since the electron distribution function is always stably obtained by the cellular automaton method, the degeneracy effect can be considered stably. In this paper, through the comparison of different degeneracy evaluation methods, the anisotropy of the electron distribution function under the electric field acceleration is clarified to affect the HEMT mobility prediction significantly.

Ferroelectric domain modulated AlGaN/GaN field effect transistor

A two-dimensional electron gas (2DEG) in (Al, Ga) N/GaN heterojunction (AlGaN/GaN) is a key factor that affects the performance of GaN-based high electron mobility transistor (HEMT) devices. Previous studies have shown that the ferroelectric polarization can effectively control the density of the 2DEG at the AlGaN/GaN interface; however, the correlation between two-dimensional distribution of ferroelectric polarization (i.e., ferroelectric domains) and its ability to confine the 2DEG is yet to be investigated. In this work, ferroelectric domain-induced modulation of the 2DEG in the AlGaN/GaN heterostructure was characterized using microscopic as well as local transport measurement techniques. The results suggest direct evidence for effective ferroelectric domain engineering in GaN HEMTs, as predicted by theoretical calculations. Additionally, a prototype device was fabricated, where gating was realized by utilizing the polarization of the ferroelectric domain. Considering the nonvolatile and reconfigurable advantages of a ferroelectric domain, the E-mode, D-mode, and even multi-channel output characteristics were realized in the same device by artificially engineered ferroelectric domain structures. These results offer a promising solution for the contradiction between the 2DEG density and gate controllability in GaN HEMTs, thereby showing a great potential of GaN radio frequency devices with further scaled gate lengths down to a few nanometers in the future.

Study of Current Collapse Behaviors of Dual-Gate AlGaN/GaN HEMTs on Si

Surface traps on GaN-based HEMTs (high-electron-mobility transistors) usually result in the increase of channel on-resistance. It becomes worsen when short pulses are applied during high-frequency and high voltage switching. Here we present a dual-gate transistor structure to suppress the dynamic on-resistance increase. The auxiliary gate under a proper fixed voltage is able to induce additional electrons to compensate the channel carrier loss during main gate switching, leading to a lower dynamic on-resistance. In this work, we benchmarked the fundamental electrical properties of both single-gate and dual-gate HEMTs. We further extracted the dynamic electrical properties by stressing the devices with short pulses. The results suggest a significant mitigation of current collapse of a dual-gate HEMT under a proper bias applied on the auxiliary gate electrode. The physical mechanism based on the charge distribution in the channel is employed to explain the observations.

High interfacial thermal conductance across heterogeneous GaN/graphene interface

Gallium nitride (GaN)-based high-electron-mobility transistors (HEMTs) have attracted significant research attention because of their high-power and high-frequency electronics applications such as 5G wireless networks and light-emitting diodes. Meanwhile, the output power density of these HEMTs is particularly high, and strong Joule self-heating hot spots formed at the near-junction seriously restricts device performance and reliability. Hence, heat removal is in urgent demand for GaN-based HEMTs. Multilayer graphene, featuring high thermal conductivity and being easily prepared, is of interest for integration with GaN to improve the device thermal management. In this work, we have investigated the interfacial thermal conductance (ITC) across GaN/graphene interface using nonequilibrium molecular dynamics simulations. The results show that a 0.6% point-defect concentration results in 2.4-fold enhancement in ITC. Moreover, the ITC value can be increased up to 520.7 MWm−2 K−1 by applying ∼ 1GPa cross-plane pressure, which is close to the measurement result for epitaxially grown GaN/ZnO interface. Detailed analyses of vibrational spectra and spectral phonon transmission are performed to help understand the significant enhancement of ITC. Furthermore, the ITC could be also regulated by the external temperature and h-BN intercalation. Our findings presented here provide important guidelines for solving the thermal management issue in GaN-based electronic devices.

Wide-range-adjusted threshold voltages for E-mode AlGaN/GaN HEMT with a p-SnO cap gate

p-GaN cap layer has been recognized as a commercial technology to manufacture enhanced-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT); however, the difficult activation of Mg doping and etching damage of p-GaN limit the further improvement of device performance. Thus, the more cost-effective cap layer has attracted wide attention in GaN-based HEMT. In this paper, p-type tin monoxide (p-SnO) was firstly investigated as a gate cap to realize E-mode AlGaN/GaN HEMT by both Silvaco simulation and experiment. Simulation results show that by simply adjusting the thickness (50 to 200 nm) or the doping concentration (3 × 1017 to 3 × 1018 cm−3) of p-SnO, the threshold voltage (Vth) of HEMT can be continuously adjusted in the range from zero to 10 V. Simultaneously, the device demonstrated a drain current density above 120 mA mm−1, a gate breakdown voltage (VBG) of 7.5 V and a device breakdown voltage (VB) of 2470 V. What is more, the etching-free AlGaN/GaN HEMT with sputtered p-SnO gate cap were fabricated, and achieved a positive Vth of 1 V, VBG of 4.2 V and VB of 420 V, which confirms the application potential of the p-SnO film as a gate cap layer for E-mode GaN-based HEMT. This work is instructive to the design and manufacture of p-oxide gate cap E-mode AlGaN/GaN HEMT with low cost.

On-Chip Voltage-Controlled Oscillator Based on a Center-Tapped Switched Inductor Using GaN-on-SiC HEMT Technology

This study presents a voltage-controlled oscillator (VCO) in a cross-coupled pair configuration using a multi-tapped switched inductor with two switch-loaded transformers in 0.5 µm GaN technology. Two switch-loaded transformers are placed at the inner and outer portions of the multi-tapped inductor. All the switches are turned off to obtain the lowest sub-band. The outer transformer with three pairs of switches is turned on alternately to provide three sub-band modes. A pair of switches at the inner transformer provide a high-frequency band. Two switch-loaded transformers are turned on to provide the highest sub-band. Six modes are selected to provide a wide tuning range. The frequency tuning range (FTR) of the VCO is 27.8% from 3.81 GHz to 8.04 GHz with a varactor voltage from 13 V to 22 V. At a 1 MHz frequency offset from the carrier frequency of 4.27 GHz, the peak phase noise is −119.17 dBc/Hz. At a power supply of 12 V, the output power of the carrier at 4.27 GHz is 20.9 dBm. The figure of merit is −186.93 dB because the VCO exhibits a high output power, low phase noise, and wide FTR. To the best of the author’s knowledge, the FTR in VCOs made of GaN-based high electron mobility transistors is the widest reported thus far.