Forward Transit Time Research Articles

High-speed short-wave infrared Si-based GeSn MQW phototransistor: an alternative to existing photodetectors

This work demonstrates high-performance vertical GeSn multiple quantum well (MQW) heterojunction phototransistors (HPTs) on Si substrates for short-wave infrared (SWIR) applications. Estimated results show a strong dependence on the number of QWs (N), incident optical power and capture parameter . Enhanced carrier and gain confinement cause an increase in responsivity of the device with the QWs in the base layer. However, the frequency performance of the device degrades with more QWs due to the increased forward transit time. On the other hand, the 3 dB cut-off frequency is the highest for the lower value of . In addition, the detectivity and responsivity of the device decrease with an increase in incident optical power due to the change in base potential. The calculated results show that the 3 dB cut-off and maximum operating frequency are and , respectively for N = 1 at 300 K. The detectivity and noise equivalent power are and , respectively for N = 3 at 300 K under 0.4 applied bias voltage. These promising results of the presented GeSn MQW HPT can pave the way for efficient low-noise high-speed photodetection applications under a low applied bias voltage.

On the shape of forward transit time distributions in low-order catchments

Abstract. Transit time distributions (TTDs) integrate information on timing, amount, storage, mixing and flow paths of water and thus characterize hydrologic and hydrochemical catchment response unlike any other descriptor. Here, we simulate the shape of TTDs in an idealized low-order catchment and investigate whether it changes systematically with certain catchment and climate properties. To this end, we used a physically based, spatially explicit 3-D model, injected tracer with a precipitation event and recorded the resulting forward TTDs at the outlet of a small (∼6000 m2) catchment for different scenarios. We found that the TTDs can be subdivided into four parts: (1) early part – controlled by soil hydraulic conductivity and antecedent soil moisture content, (2) middle part – a transition zone with no clear pattern or control, (3) later part – influenced by soil hydraulic conductivity and subsequent precipitation amount, and (4) very late tail of the breakthrough curve – governed by bedrock hydraulic conductivity. The modeled TTD shapes can be predicted using a dimensionless number: higher initial peaks are observed if the inflow of water to a catchment is not equal to its capacity to discharge water via subsurface flow paths, and lower initial peaks are connected to increasing available storage. In most cases the modeled TTDs were humped with nonzero initial values and varying weights of the tails. Therefore, none of the best-fit theoretical probability functions could describe the entire TTD shape exactly. Still, we found that generally gamma and log-normal distributions work better for scenarios of low and high soil hydraulic conductivity, respectively.

Effect of High Performance SiGe HBT Design Parameters on the Minimum Gate Delay of an ECL Inverter

In this paper, we focus on ECL inverter delay analysis through approximate analytical equations. We highlight its dependence on design parameters of SiGe HBT device as well as on electrical parameters. The advantage of this approach is to correlate the physical device parameters to the dominant time constant of this ECL gate. The simulated results show that good performances were derived from well-balanced SiGe HBT characteristics achieved through the fully-self aligned SiGe base structure with a fast forward transit time and low collector capacitance. Strict control at all stages of the technological process in the development of the device, allows the control of all these factors, and it will be possible to optimize the switching performance. 

Optimal Doping Profiles via Geometric Programming

We first consider the problem of determining the doping profile that minimizes base transit time in a (homojunction) bipolar junction transistor. We show that this problem can be formulated as a geometric program, a special type of optimization problem that can be transformed to a convex optimization problem, and therefore solved (globally) very efficiently. We then consider several extensions to the basic problem, such as accounting for velocity saturation, and adding constraints on doping gradient, current gain, base resistance, and breakdown voltage. We show that a similar approach can be used to maximize the cutoff frequency, taking into account junction capacitances and forward transit time. Finally, we show that the method extends to the case of heterojunction bipolar junction transistors, in which the doping profile, as well as the profile of the secondary semiconductor, are to be jointly optimized.

Analysis and simulation of spectral regrowth in radio frequency power amplifiers

This work presents a novel method for efficiently analyzing the relationship between spectral regrowth and physical distortion mechanisms in radio frequency power amplifiers. It utilizes a Volterra series model whose coefficients are computed from basic SPICE parameters. The analysis uses a decomposition of the Volterra kernels into simpler subsystems in order to greatly reduce the computation times. The method is applied to the design of several bipolar-transistor power amplifiers after a series-based model is developed for representing the increase in active device forward transit time at high collector current densities. A number of single-stage SiGe power amplifiers have been designed, fabricated, and tested using the IEEE 802.11b and IS-95 modulation schemes at different carrier frequencies, and these results are compared with the theoretical analysis.

Stepping toward standard methods of small-signal parameter extraction for HBTs

An improved HBT small-signal parameter extraction procedure is presented in which all the equivalent circuit elements are extracted analytically without reference to numerical optimization. Approximations required for simplified formulae used in the extraction routine are revised, and it is shown that the present method has a wide range of applicability, which makes it appropriate for GaAs and InP-based single and double HBTs. Additionally, a new method is developed to extract the total delay time of HBTs at low frequencies, without the need to measure h/sub 21/ at very high frequencies and/or extrapolate it with -20 dB/dec roll-off. The existing methods of finding the forward transit time are also modified to improve the accuracy of this parameter and its components. The present technique of parameter extraction and delay time analysis is applied to an InGaP/GaAs DHBT and it is shown that: (1) variations of all the extracted parameters are physically justifiable; (2) the agreement between the measured and simulated S- and Z-parameters in the entire range of frequency is excellent; and (3) an optimization step following the analytical extraction procedure is not necessary. Therefore, we believe that the present technique can be used as a standard extraction routine applicable to various types of HBTs.

On the transit time of polysilicon emitter transistors

Polysilicon emitter transistors are now being widely used in high speed bipolar circuits because of their extremely low emitter transit time τ E. A model has been developed here to predict the relative contributions of the neutral polysilicon and monosilicon regions of the emitter to τ E, for various device parameters. Studies have been made for both uniform and exponential doping profiles in the mono-emitter region. Relative contributions of τ E and base transit time τ B towards the total forward transit time τ F for various device parameters have also been studied.

Modelling of collector signal delay effects in bipolar transistors

A detailed analysis of distributed delay effects related to carrier transport in the collector space-charge region is presented. The analysis is based on the extension of a recent formulation of minority-carrier transport in the base region which applies to nonuniform doping profiles and arbitrary injection levels. It is shown that these effects can be easily included in compact models by modifying the expression of the model parameters. Closed form analytical expressions for the forward transit time, base charge-partitioning factor and excess phase-shift time constant are derived, and the relevance of delay effects in the collector space-charge region is investigated in detail.

Effects of pad and interconnection parasitics on forward transit time in HBTs

A new analytical expression using Y-parameters is derived from the full heterojunction bipolar transistor (HBT) equivalent circuit including probe-pattern parasitics, in order to extract the forward transit time accurately without a conventional de-embedding procedure. The correction procedure of this Y-parameter method does not require the measurement of extra test patterns such as open or short structures, thus being free of the possible de-embedding errors attributed to the inaccuracy of test structures. To compare the de-embedding effect on /spl tau//sub F/ in the Y-parameter method with that in the previous f/sub T/ method, C/sub /spl pi///g/sub mo/ versus 1/I/sub c/ curves are plotted with 1/2/spl pi/f/sub T/ versus 1/I/sub c/ in the cases of de-embedding and no de-embedding. This comparison clearly exhibits that the contribution of the probe-pattern parasitics to /spl tau//sub F/ in the Y-parameter method is much smaller than that in the conventional f/sub T/ method. The smaller contribution to /spl tau//sub F/ may result in the enhancement of the de-embedding accuracy in the Y-parameter method.

Method for BJT transit time evaluation

A new method is presented for calculating the forward transit time of bipolar junction transistors. The method uses three easily extractable SPICE parameters from the Gummel Poon model. No S parameter measurements are necessary to determine the forward transit time, only DC and C(V) measurements need to be performed, and no technological information is needed.

Delay time sensitivity analysis of multi-generation BiCMOS digital circuits

The speed sensitivity of BiCMOS circuits to changes in the key MOS/BJT device parameters is analysed. The study takes into account the changes in the forward transit time, the knee current, the collector resistance, the base resistance, and the current gain of the bipolar transistor and the channel length and width, threshold voltage, and oxide thickness of the MOS transistor. The relationships between the key process parameters and the overall speed sensitivity are reported. The analysis also covers the effects of the output load capacitance, scaling the technology, and the quality of the bipolar device on the delay sensitivity. Sensitivity coefficients are defined and generated for the conventional BiCMOS circuit as well as two recently reported circuits designed for low-voltage operation. A method to calculate the worst case speed degradation for a given set of device and process parameters' tolerances is described. HSPICE is used to generate the numerical results for the three technologies (5 V, 0.8 µm), (3.3 V, 0.5 µm), and (2.2 V, 0.2 µm).

Effects and modeling of simultaneous switching noise for BiCMOS off-chip drivers

A model of simultaneous switching noise (SSN) for the conventional BiCMOS driver including the influence of negative feedback is presented. Level 1 SPICE-type MOSFET and Gummel-Poon BJT device models are used for the analysis. The model accounts for a reduction in forward current gain, /spl beta//sub F/, that is attributed to high-level injection effects. Closed-form expressions are presented that predict the maximum SSN encountered in low-level and high-level injection. Solutions of the first equation are combined with the second in order to model the complete SSN transient. Model predictions are compared to SPICE simulation results for 5 V, 1 /spl mu/m drivers and 3.5 V, 0.5 /spl mu/m drivers with close agreement. The effects of BJT parasitic resistance, junction capacitance, and forward transit time on reducing induced ground noise are also explored. With the introduction of these parasitics, SPICE predictions of the maximum SSN are approximately 20% lower than closed-form model results. Immunity of the quiet BiCMOS driver to noise present at the ground and power connections is also investigated. It is found that the quiet driver is highly immune to adverse effects caused by SSN at the power connection and partially immune to SSN present at the ground. Coupling between ground noise and the output occurs when the ground noise is greater than two forward diode drops above ground, in which case the output tracks the ground noise with a negative offset of one diode drop.

Forward transit time measurement for heterojunction bipolar transistors using simple Z parameter equation

A novel extraction technique that is performed without f/sub T/ measurement is developed for determining the forward transit time of heterojunction bipolar transistors (HBT's), based on a simple equation with Z parameters in the low-frequency range. This technique is simpler and more accurate than conventional f/sub T/ method, because only collector resistance is needed to be determined.

An analytical transient model for a 1.5 V BiCMOS dynamic logic circuit for low-voltage deep submicrometer BiCMOS VLSI

This paper presents an analytical transient model for the 1.5 V BiCMOS dynamic logic circuit using Gummel-Poon charge control model for deep submicrometer BiCMOS VLSI. Based on the analysis, the switching time of the 1.5 V BiCMOS dynamic circuit is sensitive to the forward transit time with a large load capacitance. With a small load capacitance, its switching time is related to the threshold voltage. >

2D device-level simulation study on d.c. and transient behavior of a SiGe-base HBT with a graded germanium profile in an ECL buffer operating at 77 K

This paper reports 2D device-level simulation study on d.c. and transient analysis of a SiGe-base heterojunction bipolar device with a graded germanium profile in an ECL buffer circuit operating at 77 K. According to the simulation results, the difference in the current gain and the forward transit time between the BJT devices with Ge and without it, operating at 77 K, is much larger than that at 300 K. In addition, at 77 K, the ECL circuit using SiGe-base HBTs shows a consistent shorter fall time regardless of its load.

Sidewall effects on maximum cutoff frequency and forward transit time in downscaled bipolar transistors

A quantitative analysis of the effects causing the maximum cutoff frequency reduction as horizontal device dimensions are downscaled is carried out. By means of the well-known area-perimeter partitioning approach, simple analytical expressions describing the geometry dependence of the maximum cutoff frequency f T and forward transit time are derived. These expressions allow to evaluate the f T decrease occurring as the emitter width is reduced and suggest a simple method to extract the values of the maximum cutoff frequency and forward transit time of the internal and peripheral transistors. Moreover, the influence of significant technological parameters on maximum cutoff frequency, forward transit time and propagation delay is investigated.

Analytical modeling of polycrystalline silicon emitter bipolar transistors under high-level injection

We derived an analytical model, focused on injected charge storage, for electron current density J n , hole current density J ps , current gain β, and forward transit time τ f for heavily doped base and emitter with non-uniform band structures. This model can apply in high-level injection regions before the onset of the Kirk effect. By comparing with those results obtained from Sukuki's low-level injection model, it is observed that a new high-level injection term, proportional to the square of the hole current density, appears in the injected hole concentration in the polycrystalline silicon emitter and this term vanishes in the limit of low-level injection. As bias increases, J n and J p s of high-level injection model are less than those of the low-level injection model. In addition, for low-level injection model, β, τ f, the base transit time τ b, the crystalline silicon emitter transit time τ se, and the polycrystalline silicon emitter transit time τ pe keep constant for all injection region. However, for high-level injection model, β and τ b decreases as bias increases, while τ se and τ pe increase with increasing bias. τ f reaches a minimum and then increases. We conclude that the high-level injection model offers significant information for device operations at various electron current levels.

Analysis of the switching speed of BiCMOS buffer under high current

A nonlinear analytical transient response model that is suitable for BiCMOS driver circuits operating under the Kirk and Van der Ziel effect is presented. The model accounts for both base vertical push-out and lateral stretching phenomena where the forward transit time /spl tau//sub f/ has a square law dependence on the collector current. Based on the new transient model, a closed-form BiCMOS delay expression is derived that shows excellent agreement with measured gate delay from a 0.8-/spl mu/m BiCMOS technology. The comparison is made for a wide range of circuit parameters. The delay model can be used to develop timing analyzers, timing simulators, and circuit optimization tools for ULSI circuit design. As an application of the delay model, a circuit design algorithm is derived to optimize the speed-area performance of the BiCMOS buffers. >

Effect of Interfacial Oxide on Static and High-Frequency Performance in Poly-Emitter Bipolar Transistors Under High-Level Injection

We report on a theoretical investigation of the effect of interfacial oxide on both static and dynamic performance in polycrystalline silicon emitter bipolar transistors. The calculation is carried out up to 0.9 V, before the onset of the Kirk effect. From the model, it is found that the current gain increases and the forward transit time decreases as interfacial oxide thickness increases. Furthermore, both the current gain and the forward transit time decrease as recombination velocity increases. In addition, the intrinsic base resistance remains almost constant as interfacial oxide thickness increases, and increases as recombination velocity increases. Compared with the conventional low-level injection model, the improved model provides much more accurate expressions for electrical characteristics of bipolar transistors operating under high-level injection.

An analytical SiGe-base HBT model and its effects on a BICMOS inverter circuit

Reports an analytical model for SiGe-base HBTs with a graded germanium profile in the base region and its effects on the rise time in a related BiCMOS inverter circuit. According to the model results, for an HBT with a graded germanium profile, a peak germanium concentration of 15% at the base/collector junction is sufficient to generate an optimized forward transit time. For a BiCMOS inverter using linearly graded SiGe-base HBT's with a peak germanium concentration larger than 15% at the base/collector, its rise time is not strongly correlated to its peak germanium concentration.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>