Abstract
A quantitative analysis of the effects causing the maximum cutoff frequency reduction as horizontal device dimensions are downscaled is carried out. By means of the well-known area-perimeter partitioning approach, simple analytical expressions describing the geometry dependence of the maximum cutoff frequency f T and forward transit time are derived. These expressions allow to evaluate the f T decrease occurring as the emitter width is reduced and suggest a simple method to extract the values of the maximum cutoff frequency and forward transit time of the internal and peripheral transistors. Moreover, the influence of significant technological parameters on maximum cutoff frequency, forward transit time and propagation delay is investigated.
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