This article reports a novel ferroelectric field-effect transistor (FeFET)-based crossbar array cascaded with an external resistor. The external resistor is shunted with the column of the FeFET array, as a current limiter and reduces the impact of variations in drain current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{d}$ </tex-math></inline-formula> ), especially in a low threshold voltage (LVT) state. We have designed crossbar arrays of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$8\times8$ </tex-math></inline-formula> sizes and performed multiply-and-accumulate (MAC) operations. Furthermore, we have evaluated the performance of the current limited FeFET crossbar array in system-level applications. Finally, the system-level performance evaluation was done by neuromorphic simulation of the resistor-shunted FeFET crossbar array. The crossbar array achieved software-comparable inference accuracy (~97%) for National Institute of Standards and Technology (MNIST) datasets with multilayer perceptron (MLP) neural network, whereas the crossbar arrays built solely with FeFETs failed to learn, yielding only 9.8% accuracy.