ESD Device Research Articles

Total Ionizing Dose Effect and Radiation Hardness Analysis on Low-Leakage ESD Devices Fabricated on Double SOI Technology

Total Ionizing Dose Effect and Radiation Hardness Analysis on Low-Leakage ESD Devices Fabricated on Double SOI Technology

A Self-Biased Triggered Dual-Direction Silicon-Controlled Rectifier Device for Low Supply Voltage Application-Specific Integrated Circuit Electrostatic Discharge Protection

A direct bidirectional current discharge path between the input/output (I/O) and ground (GND) is essential for the robust protection of charging device models (CDM) in the tightly constrained design parameters of advanced low-voltage (LV) processes. Dual-direction silicon controlled rectifiers (DDSCRs) serve as ESD protection devices with high efficiency unit area discharge, enabling bidirectional electrostatic protection. However, the high trigger voltage of conventional DDSCR makes it unsuitable for ASICs used for the preamplification of biomedical signals, which only operate at low supply voltage. To address this issue, a self-biased triggered DDSCR (STDDSCR) structure is proposed to further reduce the trigger voltage. When the ESD pulse comes, the external RC trigger circuit controls the PMOS turn-on by self-bias, and the current release path is opened in advance to reduce the trigger voltage. As the ESD pulse voltage increases, the SCR loop opens to establish positive feedback and drain the amplified current. Additionally, the junction capacitance is decreased through high-resistance epitaxy and low-concentration P-well injection to further lower the trigger voltage. The simulation results of LTspice and TCAD respectively demonstrate that ESD devices can clamp transient high voltages earlier, with low parasitic capacitance and leakage current suitable for ESD protection of high-speed ports up to 1.5 V under normal operating conditions.

Design of Bi-Directional ESD Protection Circuit With Uni-Directional ESD Device in BCD Technology

Design of Bi-Directional ESD Protection Circuit With Uni-Directional ESD Device in BCD Technology

A Novel High Holding Voltage ESD device based on SCR and SiGe

As a kind of efficient electrostatic protection device, SCR has been extensively used in on-chip electrostatic discharge protection for its strong current discharge ability and favorable internal radiating heat characteristic [1-7]. But there are low holding voltage and easy latch up happening two restrictions. A novel high-holding voltage ESD device based on SCR and SiGe is proposed in this paper. By introducing Ge composition in the P + region in the N-well of ordinary SCR, the holding voltage of the device is enhanced for that the current gain of the PNP parasitic transistor is reduced then the conductivity modulation is inhibited. The simulation results based on TCAD indicate that when Ge percentage composition is 30%, the holding voltage of new SCR with SiGe P+ region promotes four times from 2.06V to 10.32V. Therefore, there is no enlarging of the layout area of the novel structure when promoting the holding voltage and enhancing the anti-latch ability of SCR.

Optimizing the on-chip electrostatic discharge protection device by Taguchi's methodology

The study presents the use of Taguchi method to obtain the best ESD performance devices and compares the performance with other methods. A full-factor method to obtain the best ESD performance devices can achieve all experimental factor effects, but at a significant cost. Through silicon data validation and analysis, Taguchi's method has been shown to save two-thirds of the cost for optimal ESD devices compared to the full-factor approach. In addition, if the layout area is very concerned in advanced technologies such as 40 nm and 28 nm, a tentative method called the single-factor-middle-level method is proposed as another ESD device optimization method.

Novel ESD Compact Modeling Methodology Using Machine Learning Techniques for Snapback and Non-Snapback ESD Devices

Novel ESD compact modeling methodology using machine learning techniques is proposed for the first time in this paper. ESD compact modeling for snapback and non-snapback ESD protection devices are discussed. Comparisons between conventional, novel fitting methodology and different machine learning models are discussed. The advantages of this novel methodology are introduced and methods to further improve the model accuracy are also discussed.

Pitfalls for transient response analysis with VF-TLP

Analyzing transient ESD device behavior with TLP equipment requires more attention for implementation and measurement details than the classical quasi-static TLP approach. Minimizing hardware parasitics reduces the de-embedding effort and optimizes the quality of the voltage and current measurements. We explore different methods and hardware options and highlight potential pitfalls.

ESD and Pit Pattern Diagnosis: Lessons from a Japanese Endoscopist Working in the United States.

Endoscopic submucosal dissection (ESD) was developed in 2000s to overcome the limitations of endoscopic mucosal resection (EMR), especially to accomplish en-bloc resection, and it has been accepted worldwide in the past decades. Many ESD devices and diagnosis modalities are currently available, which include pit pattern and narrow band imaging (NBI) diagnoses to evaluate the depth of the tumor preoperatively with sensitivities of 70 to 90%. Depending on the Japanese colorectal guideline, the intramucosal cancer and shallow invasion of the submucosal layer are the main good indications of ESD; however, the ESD practices between Japan and Western countries still vary, including pathologic definition of cancer, tumor/node/metastasis classification, and handling of ESD specimen. In the United States, despite the large demand for treatment of colorectal neoplasm, pit pattern and magnified NBI diagnoses are not widely accepted yet, and piecemeal EMR is still the major method in most of the institutions. Moreover, the specific guideline of ESD is also not available yet. More new technologies are being developed other than conventional ESD methods in Eastern and Western countries, and ESD is now expected to change in the next generation. It is recommended that not only gastroenterologists but also colorectal surgeons have appropriate knowledge of colorectal lesions and their management to ensure current treatments is applied to patients.

Optimization of deep well gate-controlled dual direction SCR device for ESD protection in 0.5 μm CMOS process

Both traditional dual direction SCR (TDDSCR) and deep well gate-controlled dual direction SCR (DGC-DDSCR) are designed and fabricated in a 0.5 μm CMOS process. The ESD performance of the DDSCR device is predicted and verified by two-dimensional device simulation and transmission line pulse test results. The results show that when the TDDSCR changes the distance between the electrode N+ and the trigger surface P+(D4), the holding voltage increased from 10.1 V to 13.53 V, and the failure current remains stable (13.9A). The RS485 bus requires that the trigger voltage and the holding voltage of the ESD device be greater than 14.4 V, while TDDSCR is still unable to meet the on-chip ESD protection requirements for RS485 bus. However, when DGC-DDSCR increases the gate length (D4) of the anode and cathode, the holding voltage increases from 10.21 V to 15.18 V, and the failure current remains 14.63A. The test data has met the on-chip ESD protection requirements of the RS485 bus, and the size optimization problem of the DGC-DDSCR is discussed. The device has a strong current handling capability (91.25 mA/μm).

Erratum to: Design and theoretical comparison of input ESD devices in 180 nm CMOS with focus on low capacitance

Erratum to: Elektrotechnik & Informationstechnik (2018) 135/1: 69–75 Following Acknowledgement was missing: The financial support of the presented research work by the Austrian Science Fund (FWF) under the project number T 756-N20 is gratefully acknowledged.

Splash M-knife versus Flush Knife BT in the technical outcomes of endoscopic submucosal dissection for early gastric cancer: a propensity score matching analysis

BackgroundEndoscopic submucosal dissection (ESD) is a standard treatment for early gastric cancer. A new multi-functional ESD device was developed to achieve complete ESD with a single device. A metal plate attached to its distal sheath achieves better hemostasis during the procedure than the other needle-knife device, Flush Knife BT®, that has been conventionally used. The aim of this study was to compare the technical outcomes of ESD for early gastric cancer using the Splash M-Knife® with those using the Flush Knife BT.MethodsWe conducted a retrospective review of the case records of 149 patients with early gastric cancer treated with ESD using the needle-type ESD knives between January 2012 and August 2016 at Kitakyushu Municipal Medical Center. Lesions treated with ESD using the Splash M-knife (ESD-M) and the Flush Knife BT (ESD-F) were compared. Multivariate analyses and propensity score matching were used to compensate for the differences in age, gender, underlying disease, antithrombotic drug use, lesion location, lesion position, macroscopic type, tumor size, presence of ulceration, operator level and types of electrosurgical unit used. The primary endpoint was the requirement to use hemostatic forceps in the two groups. The secondary endpoints of procedure time, en bloc and complete resection rates, and adverse events rates were evaluated for the two groups.ResultsThere were 73 patients in the ESD-M group, and 76 patients in the ESD-F group. Propensity score matching analysis created 45 matched pairs. Adjusted comparisons between the two groups showed a significantly lower usage rate of hemostatic forceps in the ESD-M group than in the ESD-F group (6.7% vs 84.4%, p < 0.001). Treatment outcomes showed an en bloc resection rate of 100% in both groups; complete resection rate of 95.6% vs 100%, p = 0.49; median procedure time of 74.0 min vs 71.0 min, p = 0.90; post-procedure bleeding of 2.2% vs 2.2%, p = 1, in the ESD-M and ESD-F groups, respectively. There were no perforations in either group.ConclusionsESD-M appeared to reduce the usage of hemostatic forceps during ESD for early gastric cancer without increasing the adverse effects. Thus, it may contribute to a reduction in the total ESD cost.

Design of Virtual Endoluminal Surgery Simulator (VESS): Colorectal Endoscopic Submucosal Dissection Training Module

Introduction: ESD is an endoscopic technique for the en bloc resection of gastrointestinal lesions. ESD is a widely-used technique in Asia, but not as prevalent in Europe or the US. The procedure is technically challenging and has higher adverse events (bleeding, perforation) compared to endoscopic mucosal resection. Inadequate training platforms and lack of established training curricula has restricted its wide acceptance in the US. Thus, we aim to develop the VESS for ESD procedures. The VESS platform will aim to provide a training and assessment platform by highly realistic visualization and high fidelity of simulating the colorectal ESD procedure. The goal of the ESD simulation is to deliver realistic haptic (touch) feedback to provide a more immersive virtual experience. This abstract describes the design and task analysis study performed to date. Methods: Based on the ESD videos, we performed a detailed colorectal ESD task analysis to determine the critical procedural steps for the design of the VESS. Through the task analysis, the critical ESD steps including lesion identification, lesion marking, injection, circumferential cutting, dissection, intraprocedural complication management and post-procedure examination were detailed. Furthermore, endoscopic devices were allocated to each step of the task analysis. Results: Using our task analysis, we constructed a hierarchical task tree that elaborates the order of tasks in these steps (Figure 1). Furthermore, we developed quantitative ESD performance metrics for each phase in the task tree. For the VESS design, we generated three dimensional (3D) virtual models for various colorectal mucosal lesions (Figure 2), using the Paris and Japanese tumor classifications. 3D models of ESD devices were created. We developed realistic ESD instrument-lesion interactions with our custom-designed haptic device. We designed the electromechanical interface with 2-degrees of freedom to manipulate a dummy endoscope to provide the users with haptic feedback (Figure 3).Figure: Hierarchical task tree.Figure: (a) Paris type 0 + Is tumor and (b) Japanese type 0 + ls tumor.Figure. 3D: Design of the simulator.Conclusion: We describe the initial phases of the design of the VESS for colorectal ESD. Through a task analysis, simulation software and Hardware-software interface developments will allow for the manipulation of virtual colorectal lesions using 3D endoscopic accessories with haptic feedback. Our quantitative ESD metrics will be used in future validation studies of the VESS simulator for performance score computation of trainees.

Evaluating the CDM-Robustness of the input buffer with very fast transmission line pulse

In this paper, a scheme for how to utilize VFTLP (very fast transmission line pulse) data to design an input buffer circuit for CDM (charged-device model) ESD protection is reported. The impedance of the ESD device under VFTLP stress is nearly 120Ω at the beginning of turn-on transient, and decreases with time toward 10Ω prior to the voltage falling below 0V. In this work, the fact that the dynamic-characteristic impedance of the ESD device under VFTLP testing is independent of the stress current is found. Since both VFTLP zapping and the CDM are nanosecond events, the dynamic-characteristic impedance of the ESD device can be used to evaluate the CDM threshold voltage of the input buffer based on the equivalent and simplified RLC circuit.

(Invited) Reliability Aspects of Advanced IC Technology with ESD and Anti-Radiation Capabilities

Today's IC design squeezes millions of gates and 100s ofproven blocks into a single SoC chip, huge efforts have ever been put together into aftermath chip verifications, testing and debugging processes. Failure analysis such as ESD damages, and/or together with SEU (single event upset) by outer space radiations has also become rather impractical. Killer issues arising from intrinsic and extrinsic charge built ups can no longer be prevented by embedded ESD devices of I/O circuit itself. This work will first summaries the rising trend of ESD damages other than human body model (HBM) and machine model (MM) from external sources, also the intrinsic defects from the silicon materials and the associated malfunctions caused by design and backend integrations, then it intends to address a much overlooked 'design for reliability' in line with the DFM and DFY on 65nm technology and below with focus on the less reported CDM (charged device model) ESD damages. Capabilities of anti-radiation effect will be discussed in this work.

Signal Sensing By The Architecture Of Embedded I/O Pad Circuits

Abstract In this study, the detecting structures in an embedded CUP wafer, which are called sensors, are investigated through a contactless sensing analysis. These novel sensing structures, which were designed using the ADS 2009 platform and the design rules for the TSMC 0.18-μm CMOS process, were placed under bonding pads. However, signals would still pass through these I/O sensing structures (i.e., ESD devices or circuits) and become coupled up to the pads of the top-layer metal as square, sinusoidal, or ESD pulse waveforms are injected. Through the resulting sensing relationship, we could then judge whether or not the bottom circuit is a good candidate for EMI consideration. Eventually, it was found that during an ESD occurred situation, a strong signal coupling can be sensed by the ESD protection circuits, especially by gate-coupled ESD protection circuitry.

Transition Metal Complexes of 3-Amino-1-nitroguanidine as Laser Ignitible Primary Explosives: Structures and Properties

3-Amino-1-nitroguanidine (ANQ, 2) was synthesized via hydrazinolysis of nitroguanidine. By dissolving 2 in solutions containing transition metal salts, several complexes M(2+)(ANQ)2X2(H2O)y with M(2+) = Co, Ni, Cu, Zn as well as M(ANQ)2X(H2O)y with M = Ag could be isolated. In these cases, nitrate as well as perchlorate and chloride served as the respective anions X. Additionally, the ANQ complexes of Co, Ni, and Ag with dinitramide as the anion were synthesized from ANQ and silver dinitramide and by reacting the cobalt and nickel ANQ perchlorate complexes with ammonium dinitramide. The crystal structures of all described complexes were determined by low temperature single-crystal X-ray diffraction. Additionally, they were characterized using IR spectroscopy and elemental analysis. The decomposition temperatures were determined by differential scanning calorimetry and the sensitivities toward impact and friction were assessed using a BAM drophammer and a BAM friction tester (BAM = Bundesanstalt für Materialforschung und -prüfung). Additionally, the sensitivity toward electrostatic discharge was determined on a small-scale ESD device. The potential use of the nitrate, dinitramide and perchlorate containing species as primary explosives was investigated in a laser ignition test.

Investigation of high voltage SCR-LDMOS ESD device for 150 V SOI BCD process

In this paper, two types of ESD devices, LDMOS and SCR-LDMOS (SCR embedded in LDMOS), are investigated for 150V HV SOI BCD process. The results show that the SCR-LDMOS structures have better ESD protection capability than LDMOS. The SCR-LDMOS structure is achieved by inserting P+ diffusion in the drain of LDMOS structure with different N+/P+ ratios. Impact of different N+/P+ ratios’ on Ron (on-resistance), holding voltage and holding current is studied. Considering the tradeoff between holding current and Ron, one optimized SCR-LDMOS structure is presented and adopted for the full chip high voltage power clamp, which indicates 3500V (HBM) ESD withstand voltage without latch up risk.

Electrical Characteristics of SCR - based ESD Device for I/O and Power Rail Clamp in 0.35um Process

Electrical Characteristics of SCR - based ESD Device for I/O and Power Rail Clamp in 0.35um Process

A novel co-design and evaluation methodology for ESD protection in RFIC

ESD design of RFIC is a great issue due to the lack of ESD device models and the interactions between ESD protection and core circuits of RFIC. In this paper, a novel co-design methodology incorporating device-level simulation of ESD device and RF circuit design is proposed. In this methodology, the ESD protection is incorporated into RFIC core circuit design by extracting S parameters and constructing table-lookup model of the ESD matching network. By comparing the RF performances with expected targets, the parameters of matching components and ESD device structures are rectified. In addition, the critical parameters of ESD protection are obtained by simulation. The RF-ESD design of a 5.25GHz LNA is used to demonstrate the implementation of this novel approach.

Diode string with reduced clamping-voltage for ESD-protection of RF-circuits

A new diode string based ESD device is proposed. This device, realised in a 0.13 µm SiGe BiCMOS process, features a reduced clamping voltage compared to a conventional diode string topology. The addition of extra stages improves the relative reduction in clamping voltage of the device further and, as for a regular diode string, reduces the parasitic capacitance of the device. Hence the proposed circuit constitutes an excellent candidate for double-diode configurations commonly used to protect RF-pads. The proposed architecture is verified by means of simulation and transmission-line pulse tests. Measurement results of a four-stage version of the proposed diode string show a reduction of 28.5% in clamping voltage, realising an absolute clamping-voltage lower than that of a three-stage diode string.