Abstract
In this paper, two types of ESD devices, LDMOS and SCR-LDMOS (SCR embedded in LDMOS), are investigated for 150V HV SOI BCD process. The results show that the SCR-LDMOS structures have better ESD protection capability than LDMOS. The SCR-LDMOS structure is achieved by inserting P+ diffusion in the drain of LDMOS structure with different N+/P+ ratios. Impact of different N+/P+ ratios’ on Ron (on-resistance), holding voltage and holding current is studied. Considering the tradeoff between holding current and Ron, one optimized SCR-LDMOS structure is presented and adopted for the full chip high voltage power clamp, which indicates 3500V (HBM) ESD withstand voltage without latch up risk.
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