Epitaxial Growth Of Si Research Articles

Ordered High‐Density Si [100] Nanowire Arrays Epitaxially Grown by Bottom Imprint Method

Ordered High‐Density Si [100] Nanowire Arrays Epitaxially Grown by Bottom Imprint Method

Selective Epitaxy of Si and SiGe for Future MOS Devices

Selective epitaxial growth of Si and SiGe films has been applied to the fabrication of many high-performance MOSFETs, because new device structures can be realized by selective epitaxial growth. Selective growth of Si and SiGe at the source/drain region is the most well-known example. Selective growth on S/D region is especially important for FinFETs, which is one of the most promising candidate for future MOS devices. By using selective epitaxy of Si:C, precise device design can be realized. Multi-stacked structure, which is also a candidate for next-generation devices, can be fabricated with SiGe epitaxial growth.

Epitaxial growth of Si:C/Si/SiGe into cavity formed by selective etching of SiGe

Epitaxial growth of Si:C, Si or SiGe in the cavity formed by selective vapor phase etching of sacrificial SiGe layer by HCl using a RPCVD system was investigated. The sacrificial SiGe layer was etched with very high selectivity. Epitaxial Si was deposited into the selectively etched cavity by non-selective and selective deposition processes. Weak strain contrast was observed by TEM at the interface where the growthfronts from top and bottom of the cavity were meeting each other. No or weak strain contrast was observed in the Si cap layer at middle to shallow part of the cavity. By non-selective SiGe growth, the SiGe layer was deposited on the Si cap layer only. The Si cap layer on the cavity seems to be bended and pressed down in the early stage of non-selective SiGe growth. On the other hand, in the case of selective SiGe growth, the cavity was filled. Strain contrast was observed by TEM in the Si cap layer on selectively grown SiGe. Bending of Si cap layer after selective SiGe growth was increased with increasing Ge concentration, indicating that tensile strain was generated by SiGe growth in the cavity.

Heavy B atomic-layer doping characteristics in Si epitaxial growth on B adsorbed Si(1 0 0) by ultraclean low-pressure CVD system

Heavy B atomic-layer doping is performed by B atomic-layer formation on Si(1 0 0) using B 2H 6 and subsequent Si capping layer deposition using SiH 4. By B 2H 6 exposure on Si(1 0 0) at 180 °C, the B atom amount tends to saturate self-limitedly at around 1.4 × 10 15 cm −2 (two atomic layers (AL)). In the case of exposure at 500 °C, the B atom amount increases with time and exceeds two AL. Additionally, B oxide formation by air exposure is observed for 500 °C but not for 180 °C. Therefore, it is suggested that the H adsorption on the B AL is kept at 180 °C and H desorption from the B AL proceeds at 500 °C. It is also found that the SiH 4 exposure on the B AL at low temperatures such as 180–300 °C effectively improves the electrical activity of B and suppresses lattice strain generation even with the subsequent Si capping at 500 °C. These results demonstrate that the low temperature reaction of SiH 4 as well as B 2H 6 open the way to extremely heavy B atomic-layer doping.

New method to calibrate the pattern dependency of selective epitaxy of SiGe layers

Selective epitaxial growth (SEG) of Si 1− x Ge x layers on patterned substrates containing isolated, grouped and global chips has been investigated. The interaction between chips on a wafer was studied, and the results are explained by kinetic gas theory for CVD techniques. A test pattern was designed with a series of grouped chips to calibrate the pattern dependency of SEG (both growth rate and Ge content). The amount of exposed Si coverage on chips in the test pattern ranged between 0.05 and 37%. The layer profile of the calibration pattern was compared to profiles on wafers having a global chip design. A model was developed to estimate the Ge content on substrates with a global design.

Stressed multidirectional solid-phase epitaxial growth of Si

The study of the solid-phase epitaxial growth (SPEG) process of Si (variously referred to as solid-phase epitaxy, solid-phase epitaxial regrowth, solid-phase epitaxial crystallization, and solid-phase epitaxial recrystallization) amorphized via ion implantation has been a topic of fundamental and technological importance for several decades. Overwhelmingly, SPEG has been studied (and viewed) as a single-directional process where an advancing growth front between amorphous and crystalline Si phases only has one specific crystallographic orientation. However, as it pertains to device processing, SPEG must actually be considered as multidirectional (or patterned) rather than bulk in nature with the evolving growth interface having multiple crystallographic orientations. Moreover, due to the increasingly ubiquitous nature of stresses presented during typical Si-based device fabrication, there is great interest in specifically studying the stressed-SPEG process. This work reviews the progress made in understanding the multidirectional SPEG and, more importantly, stressed multidirectional SPEG process. For the work reviewed herein, (001) Si wafers with ⟨110⟩-aligned, intrinsically stressed Si3N4/SiO2 patterning consisting of square and line structures were used with unmasked regions of the Si substrate amorphized via ion implantation. It is revealed that the stresses generated in the Si substrate from the patterning, both in line and square structures, alter the kinetics and geometry of the multidirectional SPEG process and can influence the formation of mask-edge defects which form during growth to different degrees as per differences in the substrate stresses generated by each type of patterning. Likewise, it is shown that application of external stress from wafer bending during SPEG in specimens with and without patterning can also influence the geometry of the evolving growth interface. Finally, the effect of the addition of SPEG-enhancing impurities during multidirectional stressed growth is observed to alter the evolution of the growth interface, thus suggesting that stress influences on growth are much less than those from dopants. Within the context of prior work, attempts are made to correlate the prior observations in single-directional stressed SPEG with the observations from patterned stressed SPEG reviewed herein. However, as is argued in this review, it ultimately appears that much of the research performed on understanding the single-directional stressed-SPEG process cannot be reasonably extended to the multidirectional stressed-SPEG process.

Si epitaxial growth on LaAlO 3(0 0 1)

We report on the growth of Si on c(2 × 2) reconstructed LaAlO 3(0 0 1) surfaces at high substrate temperature (700 °C) by molecular beam epitaxy. An initial Volmer–Weber mode is evidenced using reflection high energy electron diffraction (RHEED), X-ray photoelectron diffraction (XPD) and atomic force microscopy. After the deposition of a few monolayers, the islands coalesce. Using X-ray photoelectron spectroscopy, we demonstrate that Si islands exhibit an abrupt interface with the LaAlO 3 substrate without formation of silicate or silica. Finally, combined RHEED and XPD measurements show the epitaxial growth of Si with a unique Si(0 0 1)//LaAlO 3(0 0 1) and Si<1 0 0>//LAO<1 1 0> relationship.

新しいシリコン系混晶材料Si1-x-yGexCyの成長

新しいシリコン系混晶材料Si1-x-yGexCyの成長

Stressed solid-phase epitaxial growth of (011) Si

The solid-phase epitaxial growth kinetics of amorphized (011) Si with application of in-plane uniaxial stress to magnitude of 0.9 ± 0.1 GPa were studied. Tensile stresses did not appreciably change the growth velocity compared with the stress-free case, whereas compression tended to retard the growth velocity to approximately one-half the stress-free value. The results are explained using a prior generalized atomistic model of stressed solid-solid phase transformations. In conjunction with prior observations of stressed solid-phase epitaxial growth of (001) Si, it is advanced that the activation volume tensor associated with ledge migration may be substrate orientation-dependent.

Influence of boron on the initial stages of Si molecular beam epitaxy on Si(1 1 1) studied by reflection high-energy electron diffraction

The influence of boron as a function of coverage on molecular beam epitaxial Si growth on Si(1 1 1) surface was systematically studied by reflection high-energy electron diffraction. At boron coverage above 0.3 monolayer regular oscillations occur with a period typically for two-bilayers, whereas at lower boron coverage a transient behaviour with irregular intensity oscillations was observed in the initial growth stages. This behaviour can be attributed to a superposition of a bilayer and a two-bilayer dominated growth mode. The appearance of these two growth modes is discussed in terms of an initial surface defect-induced nucleation of bilayer-high Si islands and the formation of two-bilayers-high Si islands on top of the van der Waals like boron-covered surface, respectively. We suggest that these surface defects are of intrinsic nature, and their number only depends on the amount of boron at the surface. The oscillations become regular during further Si deposition with a bilayer period, indicating a diminishing influence of the layer/substrate interface on the growth processes.

Investigation of the relaxation behavior of Si 1− xC x alloys during epitaxial UHV-CVD growth

In this work, the epitaxial growth of Si 1− x C x alloys using an Ultra High Vacuum Chemical Vapor Deposition (UHV-CVD) system was studied. Si 1− x C x layers were grown in a temperature range of 550–650 °C and characterized using rocking curve X-ray diffraction (XRD), atomic force microscopy (AFM) as well as Fourier transform infrared spectroscopy (FT-IR). It was found that with increasing carbon precursor flow (Methylsilane) the amount of substitutional carbon rises up to a critical value. After a maximum in substitutional carbon content is reached, a further increase of carbon fraction leads to a reduction of the strain. By FT-IR, the non-substitutional carbon was determined to form 3C-SiC precipitates already during growth. A strong correlation between the increase of Methylsilane flow and the formation of coherent precipitates even at low carbon fractions was observed. A low deposition temperature was found to promote the precipitation of 3C-SiC.

NI (PT) SI Thermal Stability Improvement by Carbon Implantation

The thermal stability of Ni(Pt)-silicides by carbon implantation was evaluated. The Ni(Pt)-silicide morphology and phase formation were studied by means of sheet resistance (Rs) measurements, scanning electron microscopy (SEM) and transmission electron microscopy (TEM) inspection, energy dispersive spectroscopy (EDS) and X-ray diffraction (XRD) analysis. The substrate crystallinity, carbon implantation dose and energy and the anneal conditions determine the stability of the silicide. Platinum and carbon increase the phase stability of Ni-silicide at high temperatures by increasing the disilicide nucleation temperature. The dominant degradation mechanism is morphological degradation for the NiPtSi:C films whereas transition to the NiSi2 phase is the dominant degradation mechanism for NiSi:C films. As compared to carbon incorporation by epitaxial growth of Si:C, the carbon implant has the advantage of being a simple technique that can also be applied to pMOS devices.

Application Of HCl Gas Phase Etch In The Production Of Novel Devices

Multigate MOSFET and epi-tip transistors are promising device concepts which are currently actively investigated. Being attractive from the performance point of view they present certain technological challenges. One of them is the difficulty to control poly-gate encapsulation during the HF removal of native SiO2 prior to the epitaxial Si deposition of raised sourse/drains. Failed poly-Si encapsulation results in the growth of poly-Si during selective epitaxial growth (SEG) of Si, which shortcuts the source/drain areas. Further it might lead to shadowing effects during post epi implantation steps. These issues can be solved by HCl gas phase etch which effectively removes poly-Si with minimal Source/Drain removal. In this paper, we first discuss the HCl gas phase etch selectivity between poly-Si and crystalline Si (c-Si) in the temperature range of 575 - 8500C as measured on blanket wafers. Further, we show how this selectivity can be implemented in the production scheme of FinFET devices and epi-tip transistors and as a surface preparation for the epi deposition. Difficulties which can arise due to the HCl gas phase etch are also presented and discussed.

Material Aspects and Challenges for SOI FinFET Integration

FinFET is a promising device concept towards the 32 nm CMOS technology node and beyond as it combines the benefits of multi-gated architecture, intrinsically having superior scaling behavior, with a highly manufacturable process. The present paper will deal with material aspects of the SOI FinFET integration. We investigate scalability, performance and variability of high aspect ratio trigate FinFETs fabricated with 193nm immersion lithography and conventional dry etch. The effect of gate stack conformality on device performance is studied. The use of ion implantation for extension and the selective epitaxial growth of Si to achieve larger contact area on the source/drain areas are discussed from a materials perspective.

Epitaxial Growth of Si:C by means of Gas Source MBE

Si:C films have been successfully grown by the gas-source molecular beam epitaxy. The thermal stability of Si:C was comprehensively studied, and the formation of SiC and the diffusion of carbon atoms from the substitutional sites were observed when the film was annealed higher than 800 C. It was shown that the SOI substrate was very promising substrate in order to realize the strained Si/strain-relaxed Si:C structure, which is applicable to the vertical MOSFETs. Finally, the relaxation mechanism of Si:C was studied. It was shown that the Si:C was hard to form the misfit dislocations at the interface and that the stress was released by the cusp formation. The phenomenon is suitable for the application of Si:C to the source/drain stressor.

Selective Epitaxial Growth of Si(Ge) for High Performance MOSFET Applications

Selective epitaxial growth of Si and SiGe films has been applied to the fabrication of many high-performance MOSFETs, because new device structures can be realized by selective epitaxial growth. Selective growth of Si(Ge) at the source/drain region is the most well-known example. Precise control of the selective epitaxial process enables the best performance with the desired structure. Control of the selectivity is also important for a robust manufacturing process. Selective epitaxial growth is essential for next-generation MOSFETs, such as FinFETs. Innovation of selective epitaxial growth will spur the continuous progress of MOSFETs.

Selective Polycrystalline Si and SiGe Deposition on Epitaxial Si Induced by B-Atomic Layer Doping

Selective polycrystalline growth is obtained by incorporation of high level of B concentration at the interface between the Si substrate and the deposited Si layer using atomic layer doping (ALD). The high doping concentration of B at the interface is covering the crystal information of the Si lattice resulting in polycrystalline growth. B diffusion into deposited Si layer is pronounced by the transition from epitaxial Si growth to polycrystalline growth. Effective activation energy of the selective polycrystalline Si growth on Si is not different from that on SiO2. The transition from epitaxial growth to polycrystalline growth is observed for B doses in the range of 2-4×1015 cm-2 as well for selective Si as for selective Si0.8Ge0.2 growth.

Impacts of noble gas dilution on Si film structure prepared by atmospheric-pressure plasma enhanced chemical transport

To control the structure of poly-Si films prepared by the atmospheric-pressure plasma enhanced chemical transport (APECT) method, we have investigated the effects of noble gas (He or Ar) dilution on film structure and plasma characteristics. The deposition rate in the noble gas dilution APECT method depends mainly on the hydrogen concentration in the process gas mixture. Diluting with noble gas changes the Si film morphology dramatically. When is decreased, the ring-like RHEED pattern becomes strongly spotty, indicating the epitaxial Si growth. It is found that the film structure can be modified by varying not only but also the noble gas element.

High strain amount in recessed junctions induced by selectively deposited boron-doped SiGe layers

This work presents the selective epitaxial growth (SEG) of Si 1− x Ge x ( x = 0.15–0.315) layers with high amount of boron (1 × 10 20–1 × 10 21 cm −3) in recessed or unprocessed (elevated) openings for source/drain applications in CMOS has been studied. The influence of the growth rate and strain on boron incorporation has been studied. A focus has been made on the strain distribution and boron incorporation in SEG of SiGe layers.

In situ scanning tunnelling microscopy investigations of Si epitaxial growth on pit-patterned Si (001) substrates

Si growth on pit-patterned Si (001) substrates fabricated by electron beam lithography and reactive ion etching was studied by in situ scanning tunnelling microscopy. After reactive ion etching, the pits have cylindrical shape with vertical side walls, which begins to change from the bottom already after annealing at 740 °C. During Si overgrowth, the pit shape evolves into inverted pyramid-like or into multi-facetted inverted dome-like geometries depending on the growth conditions as well as thickness of the deposited Si layer. High-resolution STM images clearly show that the walls of the pits after overgrowth are composed predominantly of D B-type of steps.