Electrothermal Coupling Analysis Research Articles

Power Loss and Electrothermal Characterization of Hybrid Power Integrated Modules for Industrial Servo Motor Drives

This study aims to facilitate the assessment of the electromagnetic-electrical-thermal coupled response of a developed 30 kHz/12 kW silicon carbide (SiC)/silicon (Si) hybrid power-integrated module (hPIM) during load operation. To achieve this goal, an efficient electromagnetic-circuit-thermal coupling (ECTC) analysis methodology is introduced. This ECTC methodology incorporates a fully integrated electromagnetic-circuit coupling (EMCC) analysis model for parasitic extraction in order to addressing their effects on power losses, and a simplified electrothermal coupling (SETC) analysis model for temperature evaluation in order to consider the coupling influence of the instantaneous junction temperature on instantaneous power losses. The SETC model couples a simple lookup table that maps the power loss (P) in terms of the temperature (T) constructed using the developed EMCC model, and an equivalent Foster thermal network model established through three-dimensional (3D) computational fluid dynamics (CFD) thermal flow analysis. This PT lookup table, replacing the tedious and time-consuming EMCC simulation, is responsible for fast estimation of temperature-dependent power losses. The proposed analysis models, namely the CFD, EMCC, and SETC analysis models, are validated through thermal experiments and detailed modeling. Finally, the influence of various operation conditions on the power losses of the hPIM during the power conversion operation is explored through parametric analysis.

Bi-level modeling and multi-energy flow calculation of main grid and microgrid cluster based on electro-thermal coupling analysis

In this study, considering the characteristics of multi-energy coupling and multi-level interconnection, a bi-level steady-state physical model is developed. Both decomposed and unified solution methods are employed for the energy flow calculation under the bi-level and multi-energy coupling structure. A numerical study is executed to examine the validity of the algorithms. In addition, the load change within the microgrid and the system operation state under both on-grid and off-grid modes are examined. According to the simulation results, compared with the unified solution method, the decomposed method has faster solution speed and higher data privacy protection, and is more adaptive to the further expansion of the scale of the interconnected microgrids. The microgrids can realize energy interaction and energy mutual aid through grid-connecting operation or inter-network interconnection.

Transient Electro-Thermal Coupled Modeling of Three-Phase Power MOSFET Inverter during Load Cycles.

This study introduces an effective and efficient dynamic electro-thermal coupling analysis (ETCA) approach to explore the electro-thermal behavior of a three-phase power metal–oxide–semiconductor field-effect transistor (MOSFET) inverter for brushless direct current motor drive under natural and forced convection during a six-step operation. This coupling analysis integrates three-dimensional electromagnetic simulation for parasitic parameter extraction, simplified equivalent circuit simulation for power loss calculation, and a compact Foster thermal network model for junction temperature prediction, constructed through parametric transient computational fluid dynamics (CFD) thermal analysis. In the proposed ETCA approach, the interactions between the junction temperature and the power losses (conduction and switching losses) and between the parasitics and the switching transients and power losses are all accounted for. The proposed Foster thermal network model and ETCA approach are validated with the CFD thermal analysis and the standard ETCA approach, respectively. The analysis results demonstrate how the proposed models can be used as an effective and efficient means of analysis to characterize the system-level electro-thermal performance of a three-phase bridge inverter.

Theoretical Analysis of Electric Heating Field and Insulation Accident of High Voltage AC Basin Insulator

Basin insulator is widely used in GIS equipment. It is an important insulating part to realize electrical isolation between central conductor and grounding flange. In this paper, the insulation properties of the materials used for the basin insulator are analyzed experimentally, and the distribution of the electric field of the basin insulator is obtained through the electro-thermal coupling analysis process, and the relationship between the hottest spot temperature and the current carrying capacity is calculated. The heating curve of the basin insulator is obtained by using the theoretical model, and the basin insulation accident is analyzed by using the curve. Considering that the basin insulator is in the SF6 gas atmosphere for a long time, the local temperature rise caused by overheating fault of the basin insulator, and then the variation law of SF6 gas pressure and density caused by the overheating fault of the basin insulator are theoretically analyzed in this paper. Research shows: there is significant non-linear relationship between the insulation performance parameters of the basin body and the temperature. The eddy current field and harmonic field analysis method based on the finite element method can effectively calculate the heating of the center guide rod and the basin body under the power frequency condition. The maximum electric field intensity appears at the interface between the basin and the center conductor, with the value of 6.033kV/mm. The maximum temperature is near center conductor side of the basin, with value of 0.033kV/mm. When the current carrying capacity is higher than 1.5 times of the rated value, the thermal breakdown phenomenon of sudden temperature rise occurs. The calculation process of thermal electric coupling proposed in this paper provides way for verification of thermal electric performance of basin insulator design scheme, and also provides theoretical guidance for its on-site maintenance and accident analysis.

Electrothermal coupling analysis of three-dimensional integrated microsystem based on dual cell method

With the improvement of the integration and power density of three-dimensional integrated microsystem, it is imperative to simultaneously investigate the multi-field coupling analysis of electrical design and thermal management. This paper is to investigate a three-dimensional integrated microprocessor system and realize the rapid electrothermal analysis of the system through an improved dual cell method (DCM). This method decomposes the constitutive matrix into a constant matrix and a temperature-dependent matrix by introducing the coupling of leakage power and material coefficients with temperature. In the calculation, only the temperature-dependent matrix needs to be updated and assembled, which makes the calculation speed faster than the traditional finite element method. The simulation results show that the speed of the proposed algorithm is improved by about 30% compared with that of the traditional finite element method. After considering the thermal coupling factors of material coefficient and leakage power, the hot spot temperature of the system increases by 20.8 K compared with before coupling. Finally, the algorithm proposed in this paper is used to study the layout of three-dimensional integrated microprocessor system. The influence of TSV array conventional layout and centralized layout under the processor core(core-layout) on the hot spot temperature of upper and lower chips are compared, and the influences of uneven power distribution on the two layouts are studied. The results show that compared with the conventional layout of TSV array, the core-layout can reduce the hot spot temperature of processor, but it will aggravate the hot spot problem of DRAM at the same time. And when the power is not evenly distributed on the four cores, the hot spot of DRAM under the core-layout will be more seriously affected. In conclusion, the algorithm model proposed in this paper can quickly analyze the electrothermal coupling problem of 3D integrated microsystem, realize the hot spot prediction of the system, and provide theoretical guidance for designing the chip layout of 3D integrated microsystem.

EM-Electrothermal Analysis of Semiconductor Power Modules

We present in this paper an advanced electromagnetic (EM)-electrothermal analysis approach for the semiconductor power devices, with illustration on the insulated-gate bipolar transistor (IGBT) modules. This method distinguishes itself by dynamically integrating the EM domain into the circuit-type electrothermal coupling analysis, thus enabling the multi-dimensional simulation that spans in time from nanoseconds to seconds, and in space from chip level to system level. In particular, it contains a parametric-extracted electrothermal model of the IGBT chip and a comprehensive 0-D thermal network as well as an EM network extracted from the 3-D module packaging structure for each paralleling chip. The incorporation of the EM, as well as thermal networks representing the 3-D packaging structure, reveals essential information about the current imbalance, power dissipation imbalance, and thermal imbalance inside the IGBT module with paralleling chips, which have a strong influence on the module reliability. To demonstrate the application of this approach, an unfavorably designed 1700-V/450-A half-bridge IGBT power module is evaluated in the simulation circuit, with experimentally verified electrothermal IGBT chip model and thermal as well as EM networks. The results have shown that the EM-electrothermal analysis can successfully reveal the dynamic interaction among different physical domains and, thus, the current as well as temperature imbalance among the paralleling chips inside the power module. The predicted current imbalance also agrees with that from the experimental test.

Electrothermal coupling analysis and experimental verification for wirebond devices

The thermal performance of a powered wirebond device with package level and board level test specimens was investigated by both analytical and experiment methods. The effects of thickness and thermal conductivity of the molding compound and heat spreader attached to the top surface of the molding compound on the performance of the Au wire and silicon die were modeled and evaluated by three-dimensional electrothermal coupling analysis. An advanced quad flat no-lead (QFN) sample was selected to experimentally measure the maximum allowable current in Au wire for packages either with or without molding compound. Two failure modes, namely the fusing of the wire and the decomposition temperature of the molding compound, were established in analysis. A board level test specimen with a thermal test die was also employed to measure the real time package thermal performance. The major achievement of this work is in the complete combination of modeling, experiment, and optimization for thermal performance evaluation purpose of a powered wirebond device. Results of this physical analysis can provide a reliable and useful guide to estimate the maximum allowable currents in Au wires for a wirebond device under practical application conditions.

Investigation of electromigration reliability of redistribution lines in wafer-level chip-scale packages

Wafer-level chip-scale packages (WLCSPs) have become subject to the same drive for miniaturization as all electronic packages. The I/O count is increasing and ball pitch is shrinking at the expense of trace pitch and in turn, current densities are increasing. This leads to current crowding and Joule heating in the vicinity of solder joints and under bump metallurgy (UBM) structures where resistance values change significantly. These phenomena are responsible for structural damage of redistribution line (RDL)/UBM and UBM/solder interconnects due to ionic diffusion or electromigration. In this work, sputtered Al and electroplated Cu RDLs were examined and quantified by three-dimensional electrothermal coupling analysis. Results provide a guideline for estimating maximum allowable currents and electromigration lifetime.

Electro-thermal coupling analysis methodology for RF circuits

In this paper an electro-thermal co-simulation methodology suitable for RF circuits is presented. It circumvents traditional transient simulation drawbacks that arise when signals or magnitudes whose frequencies are separated orders of magnitude are present simultaneously in the simulated circuit. The accuracy of the proposed technique is verified experimentally by comparing simulation and measurements of the thermal coupling between an integrated power amplifier (PA) and a differential temperature sensor embedded in the same silicon die, using a 65nm CMOS technology.

Calibration of Electromigration Reliability of Flip-Chip Packages by Electrothermal Coupling Analysis

Electromigration reliability of solder interconnects is dominated by current density and temperature inside the interconnects. For flip-chip packages, current densities around the regions where the traces connect a solder bump increase significantly due to the differences in feature sizes and electric resistivities between the solder bump and its adjacent traces. This current-crowding effect along with induced Joule heating accelerates electromigration failures. In this paper, the effects of current crowding and Joule heating in a flip-chip package are examined and quantified by three-dimensional electrothermal coupling analysis. We apply a volumetric averaging technique to cope with the current-crowding singularity. The volumetrically averaged current density and the maximum temperature in a solder bump are integrated into Black’s equation to calibrate the experimental electromigration fatigue lives.

Effect of electromigration in the anodic Al interconnect on melting of flip chip solder joints

Melting of eutectic SnPb flip chip solder joints has been observed to occur frequently in dc electromigration tested with current density above 1.5×104A∕cm2 at an ambient temperature of 100°C. It has been found that it is not due to the Joule heating of the solder bump itself, but rather due to the Joule heating of the on-chip Al interconnects. The current density in the Al approaches 2×106A∕cm2 and electromigration has especially generated voids at the anode of the Al. The damage has greatly increased the resistance of the Al, which produces the heat needed to melt the solder joint. The results of electrothermal coupling analysis show that when the resistance of the Al line changed threefold, the solder bump melted.

Electromigration of Sn–37Pb and Sn–3Ag–1.5Cu/Sn–3Ag–0.5Cu composite flip–chip solder bumps with Ti/Ni(V)/Cu under bump metallurgy

We examine electromigration fatigue reliability and morphological patterns of Sn–37Pb and Sn–3Ag–1.5Cu/Sn–3Ag–0.5Cu composite solder bumps in a flip–chip package assembly with Ti/Ni(V)/Cu UBM. The flip–chip test vehicle was subjected to test conditions of five combinations of applied electric currents and ambient temperatures, namely, 0.4 A/150 °C, 0.5 A/150 °C, 0.6 A/125 °C, 0.6 A/135 °C, and 0.6 A/150 °C. The electrothermal coupling analysis was employed to investigate the current crowding effect and maximum temperature in the solder bump in order to correlate with the experimental electromigration reliability using the Black’s equation as a reliability model. From available electromigration reliability models, we also present a comparison between fatigue lives of Sn–37Pb solder bumps with Ti/Ni(V)/Cu and those with Al/Ni(V)/Cu UBM under different current stressing conditions.

Effect of Test Conditions on Electromigration Reliability of Sn-Ag-Cu Flip-Chip Solder Interconnects

The high-temperature operation life test (HTOL) was conducted in this paper to study electromigration phenomena of solder interconnects in a flip-chip package assembly. We examined the fatigue reliability and morphological patterns of three solder compositions: Sn-4Ag-0.5Cu, Sn-3.5Ag-1Cu, and Sn-3Ag-1.5Cu, subjected to two test conditions consisting of different average current densities and ambient temperatures (5kA∕cm2 at 150°C and 20kA∕cm2 at 30°C). It is interesting to realize that as the Cu weight content of the solder composition increases, the fatigue life increases under 5kA∕cm2 at 150°C but decreases under 20kA∕cm2 at 30°C. Observed electromigration morphologies along with computed current density and temperature distributions on solder interconnects from the electrothermal coupling analysis were examined, correlated, and discussed.

Calibration of electromigration reliability of flip-chip packages by electrothermal coupling analysis

Calibration of electromigration reliability of flip-chip packages by electrothermal coupling analysis

Electrothermal coupling analysis of current crowding and Joule heating in flip-chip packages

Solder bumps serve as electrical paths as well as structural support in a flip-chip package assembly. Owing to the differences of feature sizes and electric resistivities between a solder bump and its adjacent traces, current densities around the regions where traces connect the solder bump increase in a significant amount. This current crowding effect along with the induced Joule heating would accelerate fatigue failure due to electromigration. In this paper we apply the three-dimensional electrothermal coupling analysis to investigate current crowding and Joule heating in a flip-chip package assembly carrying different constant electric currents under different ambient temperatures. Experiments are conducted to calibrate temperature-dependent electric resistivities of solder alloy, Al trace, and Cu trace, and to verify the numerical model by comparing calculated and measured maximum temperatures on the die surface. Through the electrothermal coupling analysis, effects of current crowding and Joule heating induced by different solder bump structures are examined and compared.