Electromigration Void Research Articles

Phase-field modelling of electromigration-induced intergranular slit propagation in metal interconnects

We use a phase-field method to elucidate grain-boundary grooving as a mechanism of genesis and subsequent propagation of intergranular slit in metal interconnects under concurrent surface and grain boundary diffusion. Surface diffusion is assumed to be the rate limiting transport mechanism. Accelerated grain-boundary grooving induced by electromigration is shown to ensue a narrow channel-like slit which advances at a steady state along the grain-boundary preserving its shape near the tip region. The slit characteristics namely the width and velocity dependence on electric field derived are shown to be in excellent agreement with the sharp interface calculations which treat the tip region of the slit independently. Furthermore, the simulations reveal that for the same magnitude of electric field, a slit conceived from a smaller grain exhibits a slower kinetics and delay damage dissemination. The apparent discrepancy from the sharp interface description is resolved on the basis of curvature gradient and electromigration-induced surface flux which heal the root during groove to slit transition and is predominant in smaller grains. Finally, drawing analogy from the nucleation and growth models of electromigration voids, failure due to intergranular slit is divided into serial process of initial grooving followed by slit propagation stage. The lifetime analysis suggests the grooving stage to be the rate determining step in the failure process, yielding an exponent of 1.33 in Black’s law.

Robust power grid network design considering EM aging effects for multi-segment wires

This paper presents a number of power grid network design and optimization techniques that consider the electromigration (EM) effects for multi-segment interconnect wires. First, we consider a new EM immortality constraint due to EM void saturation volume for multi-segment interconnects. It helps reduce conservativeness in the EM-aware on-chip power grid design. Along with the EM nucleation phase immortality constraint, we show that both EM immortality constraints can be naturally integrated into the existing programming based power grid optimization framework. Second, to mitigate the overly conservativeness of the immortality constrained optimization methods, we further explore three strategies: we first size up failed wires to meet one of the immortality conditions subject to the design rules; second, we consider the EM-induced aging effects on power supply networks for a target lifetime, which allows some short-lived wires to fail and optimizes the remaining wires; third, we propose a large change sensitivity-based optimization scheme to perform localized fixing based on recently proposed coupled EM-IR drop analysis method. Numerical results on a number of IBM-format power grid networks demonstrate that the new method can reduce more power grid area compared to the existing EM immortality constrained optimizations. Moreover, the new method is able to optimize power grids with nucleated wires, which would not be possible with the existing methods. Results also show the sensitivity-based localized power girds fixing can fix EM-induced IR drop violations in a few minutes for synthesized power grid networks from ARM core designs.

A phase field computational procedure for electromigration with specified contact angle and diffusional anisotropy

Electromigration in electrical interconnects with high current density causes voids to form and grow near the cathode. These voids can possibly grow large enough to cause open circuit failure. The simulation of electromigration void nucleation and growth is challenging because of the complex interaction of electrical, thermal and mechanical fields that lead to the observed voids. In this paper, a phase-field approach is developed to study void growth due to electromigration taking into account diffusional anisotropy and specified contact angle. Consideration of anisotropy and contact angle is critical in applications including electronic assemblies that most commonly use Sn-based solder interconnects. In such systems, Sn exhibits significant anisotropy in its self-diffusivity, which assumes importance in small solder joints that are known to contain only a few grains. Furthermore, the contact angle at the void-bonding pad-solder triple junction is known to influence the void size and shape. To the best of the authors’ knowledge, only anisotropy in surface diffusivity has been considered in phase-field electromigration literature, whereas the contact angle at a triple junction has not been considered. The developed phase-field model incorporates effects of both contact angle and anisotropy in self-diffusivity. The model is used to simulate systems with different contact angles and dominant directions of diffusion. It is observed that diffusional anisotropy plays a more dominant role in failure, while the contact angle dictates evolution of the shape of voids.

Interface balance laws, phase growth and nucleation conditions for multiphase solids with inhomogeneous surface stress

In this paper, the thermodynamic configurational force associated with a moving interface is used to derive the conditions for phase growth and nucleation in bodies with multiple diffusing species and arbitrary surface stress at the phase interface. First, the mass, momentum and energy balances are derived on the evolving phase interface. The thermodynamic conditions that result from free energy inequality at the interface are derived leading to the analytical form of the configurational force for bodies subject to mechanical loads, heat and multiple diffusing species. The derived second law condition naturally extends the Eshelby energy–momentum tensor to include species diffusion terms. The above second law restriction is then used to derive the condition for the growth of new phases in a body undergoing finite deformation subject to inhomogeneous as well as anisotropic interface stress, and multiple diffusing species. The growth conditions are derived in both current and reference configurations. The statistical temperature-dependent growth velocity is next derived using the Boltzmann distribution. The derived finite deformation form of growth requirement is simplified to obtain the small deformation diffusive void growth condition. Next, a general, finite deformation, arbitrary surface stress form of phase nucleation condition is derived by considering uncertainty in growth of a small nucleus. The probability of nucleation is shown to naturally depend on a theoretical estimate of critical volumetric energy density, which is directly related to the surface stress. The classical nucleation theory is shown to result from a simplified special case of the general criterion. As an application of the developed theory, the classical Blech electromigration experiment is simulated to estimate the critical energy density corresponding to the onset of electromigration voids at Al–TiN interface.

Microprocessor Aging Analysis and Reliability Modeling Due to Back-End Wearout Mechanisms

Back-end wearout mechanisms are major reliability concerns for modern microprocessors. In this paper, a framework that contains modules for back-end time-dependent dielectric breakdown, electromigration, and stress-induced voiding is proposed to analyze circuit layout geometries and interconnects to estimate state-of-the-art microprocessor lifetime due to each mechanism. Our methodology incorporates the detailed electrical stress temperature, linewidth, and cross-sectional areas of each interconnect/via within the microprocessor system. Different workloads are considered to evaluate aging effects in single-core microprocessors running applications with realistic use conditions.

Comprehensive reliability and aging analysis on SRAMs within microprocessor systems

A framework is proposed to analyze the impact of both Front End of the Line (FEOL) and Back End of the Line (BEOL) wearout mechanisms on memories embedded within state-of-art microprocessors. Our methodology finds the detailed electrical stress and temperature of each SRAM cell within a memory by running a variety of standard benchmarks. Combining the stress/thermal profiles and the wearout models, the performance degradation of SRAM cells for each wearout mechanism is studied. The lifetimes of the SRAM cells are then obtained when the performance metric degrades to a predefined threshold. The proposed work introduces a method to deal with the large volume of SRAM cells whose stress is non-uniform by partitioning the SRAM cells into different stress states, and generates the lifetime distribution of the memory system due to each wearout mechanism by combining the lifetimes of the cells, whose distributions vary with the stress received. Seven wearout mechanisms have been studied, namely, negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), hot carrier injection (HCI), gate oxide breakdown (GOBD), backend dielectric breakdown (BTDDB), electromigration (EM), and stress-induced voiding (SIV).

Role of W and Mn for reliable 1X nanometer-node ultra-large-scale integration Cu interconnects proved by atom probe tomography

We used atom probe tomography (APT) to study the use of a Cu(Mn) as a seed layer of Cu, and a Co(W) single-layer as reliable Cu diffusion barriers for future interconnects in ultra-large-scale integration. The use of Co(W) layer enhances adhesion of Cu to prevent electromigration and stress-induced voiding failures. The use of Cu(Mn) as seed layer may enhance the diffusion barrier performance of Co(W) by stuffing the Cu diffusion pass with Mn. APT was used to visualize the distribution of W and Mn in three dimensions with sub-nanometer resolution. W was found to segregate at the grain boundaries of Co, which prevents diffusion of Cu via the grain boundaries. Mn was found to diffuse from the Cu(Mn) layer to Co(W) layer and selectively segregate at the Co(W) grain boundaries with W, reinforcing the barrier properties of Co(W) layer. Hence, a Co(W) barrier coupled with a Cu(Mn) seed layer can form a sufficient diffusion barrier with film that is less than 2.0-nm-thick. The diffusion barrier behavior was preserved following a 1-h annealing at 400 °C. The underlayer of the Cu interconnects requires a large adhesion strength with the Cu, as well as low electrical resistivity. The use of Co(W) has previously been shown to satisfy these requirements, and addition of Mn is not expected to deteriorate these properties.

Characterization of nanoscale temperature fields during electromigration of nanowires

Quantitative studies of nanoscale heat dissipation (Joule heating) are essential for advancing nano-science and technology. Joule heating is widely expected to play a critical role in accelerating electromigration induced device failure. However, limitations in quantitatively probing temperature fields—with nanoscale resolution—have hindered elucidation of the role of Joule heating in electromigration. In this work, we use ultra-high vacuum scanning thermal microscopy to directly quantify thermal fields in nanowires during electromigration. Our results unambiguously illustrate that electromigration begins at temperatures significantly lower than the melting temperature of gold. Further, we show that during electromigration voids predominantly accumulate at the cathode resulting in both local hot spots and asymmetric temperature distributions. These results provide novel insights into the microscopic details of hot spot evolution during electromigration and are expected to guide the design of reliable nanoscale functional devices.

Cu配線の信頼性と界面： EM，SIV，TDDBにおける界面の寄与と制御

The contributions of the “interface” on interconnect reliability are investigated in some previous work. For electromigration and stress-induced voiding, Cu/dielectrics interface has a key role as a dominant diffusion path of Cu. A surface treatment after chemical mechanical polishing affects lifetime distribution of time-dependent dielectric breakdown. The defect density on the interface is a key factor to control the early failure. In this paper, some advanced metallization process and its effects to suppress the reliability issues are introduced. To adapt the novel process technologies successfully in product line, these results will provide valuable information.

An unfitted finite element method for the numerical approximation of void electromigration

Microelectronic circuits usually contain small voids or cracks, and if those defects are large enough to sever the line, they cause an open circuit. We present a numerical method for investigating the migration of voids in the presence of both surface diffusion and electric loading. Our mathematical model involves a bulk-interface coupled system, with a moving interface governed by a fourth-order geometric evolution equation and a bulk where the electric potential is computed. Thanks to a novel approximation of the interface, equidistribution of its vertices is guaranteed, and no remeshing is necessary. In addition, the used curvature approximation means that our method is unconditionally stable for the evolution by surface diffusion only. Various examples are performed to demonstrate the accuracy of the method.

Lattice dependent motion of voids during electromigration

The influence of the crystal lattice configuration to electromigration processes, e.g., void formation and propagation, is investigated in suitable test structures. They are fabricated out of self-assembled, bi-crystalline Ag islands, grown epitaxially on a clean Si(111) surface. The μm-wide and approximately 100 nm thick Ag islands are a composition of a Ag(001) and a Ag(111) part. By focused ion beam milling, they are structured into wires with a single grain boundary, the orientation of which can be chosen arbitrarily. In-situ scanning electron microscopy (SEM) allows to capture an image sequence during electrical stressing and monitors the development of voids and hillocks in time. To visualize the position and motion of voids, we calculate void maps using a threshold algorithm. Most of the information from the SEM image sequence is compressed into one single image. Our present electromigration studies are based on in-situ SEM investigations for three different lattice configurations: Ag(001) (with electron current flow in [1¯1¯0] direction), Ag(111) (with electron current flow in [112¯] direction), and additionally 90∘ rotated Ag(111) (with electron current flow in [1¯10] direction). Our experimental results show that not only the formation and shape but also the motion direction of voids strongly depends on the crystal orientation.

Microstructural void environment characterization by electron imaging in 45nm technology node to link electromigration and copper microstructure

The work presented in this paper illustrates the link between electromigration (EM) and microstructure in copper interconnects. For this study, 70nm wide copper interconnects from 45nm technology node are considered. Microstructure and grain orientation have been obtained in the vicinity of EM induced voids at early stage. Electron Backscattered Diffraction (EBSD) characterization is used to get microstructure and grain orientation. Then Transmission Electronic Microscope (TEM) imaging provides unambiguous location of void on EBSD map. Finally, the comparison of EBSD technique with its equivalent in TEM (commercialized as ASTAR by NanoMEGAS) shows that EBSD limitations are reached and that TEM should soon replace EBSD for local analyses. The results confirm that EM voids are nucleated at high angle misoriented grain boundaries (grain boundary with misorientation higher than 15^o) and does not show link between grain orientation and electromigration phenomenon.

Study of electromigration void nucleation time in Cu interconnects with doping elements

This study shows that in Cu interconnects with different doping elements (e.g., Al, Co, Mn) electromigration failure times may be significantly increased because of an incubation time prior to the usual void formation. The presence of a significant incubation time provides a change from the common value of 1 to a value of 2 of the current exponent of Black’s equation, mostly used for lifetime extrapolation at use conditions. Moreover, an increase of the activation energy up to 1.4 eV has been experimentally obtained. This gives additional room for reliability lifetime extension.

Influence of dopants on atomic migration and void formation in molten Ge2Sb2Te5 under high-amplitude electrical pulse

This study systemically investigates the retardation of electrical-stress-induced degradation in Ge2Sb2Te5 (GST) by modifying its material properties through doping. The effects of doping on the electromigration and void formation in molten GST are explored by studying the model of a large and symmetric line-shaped GST cell doped with nitrogen, oxygen and bismuth, using high-amplitude electrical pulse stress. The electromigration rate, which is represented by the product of the diffusion coefficient and effective charge number (DZ*), and the amount of void formation in doped GST are quantified and compared with undoped GST. The DZ* and void area in Bi-doped GST increased by ∼10% compared with those in undoped GST; these values decreased by 30% and 45% in the O- and N-doped GST, respectively. The results suggest that the interstitial-type dopant could suppress the electromigration rate and void formation by decreasing the free volume; however, the substitutional-type dopant could not. The change in the free volume of molten GST due to dopants led to the change in the electromigration rate and the area of void formation. Understanding how the atomic-bonding type of dopants affects the degradation phenomena helps in designing phase-change material that is more stable against device failures.

205 放射光X線CT観察による半導体微細はんだ接続部のエレクトロマイグレーション現象の解明(OS2-2 オーガナイズドセッション《材料強度と構造設計》)

Recently, it is reported that electromigration failures occur in flip-chip solder joints because of joint structure miniaturization and high-density packaging. However, growth behavior of electromigration void in solder joint is not clarified. We observed the void shape of micro-solder joint with high degree of accuracy by using the synchrotron radiation X-Ray microtomography in SPring-8 in order to clarify behavior of electromigration void in solder joint. Moreover, we found that the failure life of Cu-cored solder joint was about 4 times as long as the life of conventional joint, and we clarified long-life mechanism of Cu-cored solder joint.

Cu-Cu Thermocompression Bonding using Ultra Precision Cutting of Cu Bumps for 3D-SIC

We have developed a new Cu-Cu thermocompression bonding technique by using cut Cu bumps in order to achieve high density 3D-stacked IC (3D-SIC). Currently, Sn layer is formed between Cu bumps, and then solid-liquid bonding is made by tin melting to connect Cu bumps. But using Sn layer can cause undesirable issues, such as electro-migration and Kirkendall voids formation between Cu/Sn interfaces, which could decrease bonding reliability. Therefore we believe that Cu-Cu thermocompression bonding is an essential technology especially in 3D interconnection. In the present study, cut Cu bumps were obtained by ultra-precision cutting using a single crystal diamond bite that would give a highly smooth Cu surface (Ra:7nm). A major advantage of cut Cu bumps is that they have an amorphous-like layer on the surface. In TEM observation, it was found that about 120nm thick amorphous-like layer was formed after cutting of Cu bumps. This layer has a potential to connect bumps each other at a low temperature similar to solder bonding because amorphous-like layer accelerates a recrystallization reaction of Cu crystal. Cut Cu bumps on both sides of LSI and substrate have been successfully bonded at 250 degrees C condition. From the analysis of crystal orientation by EBSD, it was found that the bonding interface had disappeared, which means solid diffusion was occurred and crystal grain grew across the interface.

Electromigration Simulation for Metal Lines

As the electronics industry continues to push for high performance and miniaturization, the demand for higher current densities, which may cause electromigration failures in an IC, interconnects. Electromigration is a phenomenon that metallic atoms constructing the line are transported by electron wind. The damage induced by electromigration appears as the formation of voids and hillocks. A numerical simulation method for electromigration void incubation, and afterwards, void propagation, based on commercial software ANSYS Multiphysics and FORTRAN code, is presented in this paper. The electronic migration formulation considering the effects of the electron wind force, stress gradients, temperature gradients, and the atomic concentration gradient has been developed for the electromigration failure mechanisms. Due to introducing the atomic concentration gradient driving force in atomic flux formulations, the conventional atomic flux divergence method is no longer valid in electromigration (EM) simulation. Therefore, the corresponding EM atomic concentration redistribution algorithm is proposed using FORTRAN code. Finally, the comparison of voids generation through the numerical example of a standard wafer electromigration accelerated test (SWEAT) structure with the measurement result is discussed.

Scaling effects on microstructure and reliability for Cu interconnects

Abstract Continuous scaling of Cu interconnect structures can significantly impact reliability-limiting processes such as electromigration and stress-induced voiding. Prior to the 65 nm technology node, mass transport under electromigration is dominated by diffusion along the Cu/dielectric cap interface and the electromigration lifetime will degrade by about half for every generation, even with the same current density. Beyond the 65 nm node, small grains were found to mix with bamboo grains in the 90 nm Cu damascene lines and the contribution of the grain boundary transport degraded the electromigration lifetime. The scaling effects on microstructure and electromigration reliability are examined in this paper with the objective of identifying the key issues and exploring potential solutions for sub-100 nm Cu interconnects. We discuss first the scaling effect on electromigration lifetime and the effect due to the small grains on electromigration lifetime and statistics. This is followed by a discussion on grain growth studies focusing on the formation of small grains and a recent simulation study on small grain effect on electromigration reliability. This paper concludes with a discussion of some recent developments in analytical techniques to investigate grain structure and electromigration reliability in sub-100 nm Cu lines.

Temperature measurement at flip chip solder joint during electromigration test

Measuring the real temperature of a flip chip solder joint during an electromigration test has been a problem because of its small size and the local Joule heating due to a large applied current. A unique method that employs the electrical resistance change in the junction line between two solder joints was introduced to determine the temperature of the solder joint. The change in resistance was converted into temperature using a thermal coefficient of resistance of the junction line. The method accurately measured temperatures of the solder joint within 2 K until the solder joint resistance change ratio reached 100% due to growth of an electromigration void.

Finite Element Approximation of a Three Dimensional Phase Field Model for Void Electromigration

We consider a finite element approximation of a phase field model for the evolution of voids by surface diffusion in an electrically conducting solid. The phase field equations are given by the nonlinear degenerate parabolic system $$\gamma\frac{\partial u}{\partial t}-\nabla.(b(u)\nabla[w+\alpha\phi])=0,\qquad w=-\gamma\Delta u+\gamma^{-1}\Psi'(u),\qquad\nabla.(c(u)\nabla\phi)=0$$ subject to an initial condition u 0(?)?[?1,1] on u and flux boundary conditions on all three equations. Here ???>0, ????0, ? is a non-smooth double well potential, and c(u):=1+u, b(u):=1?u 2 are degenerate coefficients. On extending existing results for the simplified two dimensional phase field model, we show stability bounds for our approximation and prove convergence, and hence existence of a solution to this nonlinear degenerate parabolic system in three space dimensions. Furthermore, a new iterative scheme for solving the resulting nonlinear discrete system is introduced and some numerical experiments are presented.