Electromigration Void Research Articles

Microscopic Estimates for Electromigration Velocities of Intragranular Voids in Thin Aluminum Lines

AbstractWe explore the effect of faceting on possible mechanisms for mass transport around electromigration voids in aluminum interconnects. Motivated by linear response estimates which suggest that particle flux would be much higher along steps than across terraces on a clean aluminum surface, we study step nucleation in the presence of a small driving force along a surface. We find that step nucleation, even on a nearly defect-free void surface, would be slow if the step energy is equal to that calculated for a clean aluminum surface. In the presence of a uniform electromigration force, the creation of new steps between existing ones should not occur unless the free energy cost of a step is much less than thermal energies. We conclude that voids cannot move intragranularly at μm/hr rates without help from other factors such as local heating and impurities.

Experimental study of electromigration at bamboo grain boundaries with a new test structure using the single-crystal aluminum interconnection

Electromigration (EM) voids in the bamboo structure interconnect were observed by a new test structure with single-crystal aluminum leads. The new test structure consists of a single grain connected to single-crystal aluminum leads formed by lateral-solid phase epitaxial growth (L-SPE). The grain was formed by suppressing L-SPE of the single-crystal aluminum leads. Since the void nucleation sites were confined to the grain boundaries, the voids were easily located and observed. In addition, the crystal orientation of single-crystal aluminum leads could be controlled by L-SPE, and so the analysis could be performed more accurately than using traditional test structures that have a series of grains with random crystal orientation. The accelerated EM test was carried out under ideal conditions similar to that of real devices, because the temperature gradients around the test site of the bamboo grain boundaries were negligible. In our preliminary experiment, a void was observed in the grain, located next to the positive voltage lead. This seems to be contradictory to general understandings, we think this is because of the grain boundary configuration difference and/or EM induced vacancy fluxes difference.

Chemical vapour deposition of thin copper films using a new metalorganic precursor

Because of concerns about its reliability and its effects on the speed of electronic devices, serious questions have been raised regarding the adaptation of aluminium-based interconnection schemes to subhalf-micron level VSLI technology. With the downscaling of metal interconnect line widths, an increased electrical current density has resulted in greater RC delay along with enhanced electromigration and stress-induced void failures. An intense research effort has therefore been focused on copper metallization due to the lower resistivity (1.7 $\mu\Omega$ cm for Cu, versus 2.7 $\mu\Omega$ cm for A1) and better electromigration resistance achievable. Further, the demands in VLSI technology, such as conformal coverage, damage-free surface, and selective area deposition make chemical vapour deposition (CVD) a better alternative than processes like sputtering and evaporation.

Numerical Simulation of Surface Diffusion Controlled Motion and Shape Change of Electromigration Voids

AbstractIn order to simulate void motion and shape change of electromigration voids a numerical model was developed in which electromigration-driven diffusion on the void surfaces is assumed to act as the primary transport mechanism. The simulation describes the motion and shape evolution of a "two-dimensional void" having a simple initial shape in an isotropic medium. The current density distribution in the vicinity of a void was calculated by the application of a finite element method. Subsequently, the void shape changes by surface diffusion were examined using a finite difference scheme which includes the influence of gradients in curvature along the void surface. The model has been extended to allow other diffusion pathways, such as grain boundaries. The often observed faceting of voids and the formation of slit-like voids are discussed on the basis of simulations in which anisotropic surface tension and anisotropic surface diffusivity were assumed.

Molecular dynamics simulation of void electromigration under a high‐density electric current stress in an aluminum interconnection

AbstractThree‐dimensional molecular dynamics simulation of behaviors of a void in an Al interconnection under high current stress has been accomplished employing empirical two‐body potential and the Huntington‐Grone ballistic model for an electron wind force. Stability of a void under a uniform strain field was first investigated; it was shown that a void was stable under a tensile strain, while it was unstable under a compressive strain. Then, a void movement into cathode direction was clearly demonstrated in the single‐crystalline Al interconnection at the high current density of 1 × 1010 A/cm2. The activation energy of the drift velocity of the void was 0.76 eV. Next, behaviors of a void in [111] bicrystal grains with a periodic boundary condition which resembled a bamboo structure interconnection was investigated. A void was stabilized at the grain boundary at low current density conditions; however, it could go across the grain boundary and move further to the cathode direction when the current density was high enough. It was shown that when a void comes close to the grain boundary, it suddenly annihilates into vacancies and rapid movement of vacancies into the grain boundary occur. A void was formed again at the grain boundary. This model will explain the void annihilation phenomena, reported by the in situ scanning electron microscope (SEM) observations. After stopping the current, a backflow of a void was observed as a consequence of the strain energy relaxation when the current density was high. These obtained results explained well the experimental observations qualitatively; furthermore, new predictions were obtained with quantitative analysis based on total potential energy analysis.

In situ observations of electromigration induced void behavior

Electromigration and stress voiding have been active areas of research in the microelectronics industry for many years. While accelerated testing of these phenomena has been performed for the last 25 years[1-2], only recently has the introduction of high voltage scanning electron microscopy (HVSEM) made possible in situ testing of realistic, passivated, full thickness samples at high resolution.With a combination of in situ HVSEM and post-testing transmission electron microscopy (TEM) , electromigration void nucleation sites in both normal polycrystalline and near-bamboo pure Al were investigated. The effect of the microstructure of the lines on the void motion was also studied.The HVSEM used was a slightly modified JEOL 1200 EX II scanning TEM with a backscatter electron detector placed above the sample[3]. To observe electromigration in situ the sample was heated and the line had current supplied to it to accelerate the voiding process. After testing lines were prepared for TEM by employing the plan-view wedge technique [6].

Observations of electromigration induced void nucleation and growth in polycrystalline and near-bamboo passivated Al lines

Electromigration voiding in passivated pure Al lines was observed in situ using high voltage scanning electron microscopsy. Two different types of lines were investigated; one deposited under high purity conditions with a near-bamboo microstructure, and one deposited under conventional conditions with a polycrystalline microstructure with stress voids present. The samples were observed while being tested under accelerated electromigration conditions. Samples were then thinned and analyzed with transmission electron microscopy techniques to investigate the relationship between line microstructure and void nucleation. Electromigration voids and stress voids were seen to nucleate at very specific, unique, microstructural sites that require the intersection of a grain boundary with the line sidewall. Void movement after initiation is also dictated by microstructure, with voids only growing into and causing failure in grains oriented with a {111} plane near perpendicular to the line. The conditions for void nucleation suggest that heterogeneities at the line sidewall are necessary for void nucleation.

Electromigration and stress-induced voiding in fine Al and Al-alloy thin-film lines

Physical phenomena underlying failure due to electromigration and stress-induced voiding in fine Al and Al-alloy thin-film conducting lines are examined in the context of accelerated testing methods and structures. Aspects examined include effects due to line isolation (the absence of reservoirs at conductor ends), solute and precipitate phenomena, conductor critical (Blech) length, microstructure, film deposition conditions, and thermal processing subsequent to film deposition. Emphasis is on the isolated, submicron-wide, Al(Cu)-based thin-film interconnection lines of IBM VLSI logic and memory chips.

The Effects of Test Condition, Microstructure and Linewidth on Electromigration Void Morphology

AbstractIn this paper, experimental results for electromigration void morphology and failure time distribution are presented as a function of test condition, grain size distribution and conductor linewidth. Unpassivated Al-Cu(1.5%)-Si(1.5%) conductors with linewidths in the range lum ≤W ≤l0μm were subjected to accelerated temperature stresses of T=150° C and 250°C and current stresses in the range j= 0.5-4X106 A-cm-2, for each temperature stress. Unlike previous reports, erosion-like voids dominated at all current densities and temperatures for both W/D50≤1 and W/D50 > 1. The void distribution within a line was strongly dependent on test conditions and linewidth. The critical current density was extracted from electromigration lifetimes measured as a function of current density. The results show that the linewidth dependence of electromigration lifetimes depend strongly on the Blech relation.

Barriers Against Copper Diffusion into Silicon and Drift Through Silicon Dioxide

The Semiconductor Industry Association (SIA) roadmap calls for the incorporation of Cu plugs (vias) integrated with interconnects in 1997. Copper is being evaluated for ULSI metallization because of its lower bulk electrical resistivity and its superior resistance to electromigration and stress voiding as compared to commonly used aluminum and its alloys. One of the major drawbacks of Cu is its fast diffusion in Si and drift in SiO2-based dielectrics, resulting in the deterioration of devices at low temperatures. Hence a diffusion barrier is necessary between Cu and Si or SiO2. Figure 1 is a cross section ofa three metal level interconnect structure using Cu as the conductive material. The interlevel dielectrics (ILD) could be conventional SiO2-based materials or more ideally, materials with low dielectric constants such as polyimide. If conventional SiO2 is used, then Cu plugs and interconnects have to be enclosed in diffusion/drift barriers so that Cu will not move into Si or SiO2 under thermal stress or biased temperature stress (BTS).This article reviews the published studies on conductive diffusion barriers between thin Cu films and Si substrates. In addition, the work on diffusion and drift of Cu into commonly used inorganic dielectric systems is also summarized. Finally, some concerns involving diffusion/drift barriers between Cu and Si or SiO2 for sub-0.5 μm feature size with high aspect ratios are discussed.

In Situ SEM Observations of Electromigration Voids in Al Lines under Passivation

Since the early work of Ilan Blech and Gene Meieran more than 20 years ago, electromigration (mass transport produced in a metallic conductor by current flow) has been recognized as an important reliability hazard for solid-state electronic devices. The continuing shrinkage of dimensions in VLSI devices has resulted in a continuing increase in the current density in the interconnection lines and a corresponding increase in the potential electromigration hazard. Although there have been improvements in the materials and structures used for interconnections, notably the addition of copper to aluminum and the use of layered structures, the provision of an adequate margin of safety has become increasingly difficult and is an important constraint on both device design and process development.

Impact of Microstructure of Alternative Al-Si-V-Pd Alloy Films on Interconnect Reliability, Compared to Al-Si-Cu

ABSTRACTDifficulty during plasma etching and post-etch corrosion are major drawbacks of Al-Si-Cu alloy films, when used for integrated circuit interconnect. Moreover, the relatively large solute mobility of Cu in Al may lead to void formation by precipitate coarsening. As integrated circuit dimensions decrease reliability issues, such as electromigration and mechanical stress voiding, are becoming increasingly important. At present several types of Al alloys are considered as possible alternatives for Al-Si-Cu: Al-Pd, Al-Sc, Al-Pd-Cu, Al-Si-Pd, Al-Si-V, Al-Si-Sc, Al-Si-Pd-Nb, and Al-Si-V-Pd. The latter quaternary alloy has been designed such as to combine the positive aspects of both Pd and V. In comparison with Cu in Al, a) the (low temperature) solid solubility is negligible for Pd and small for V, and b) the mobility is similar for Pd, but very small for V.With transmission-electron microscopy, passivated Al-Si-Cu alloy films have been studied after thermal stressing at 200 °C: ө-Al2Cu coarsening was observed together with void condensation. Lifetests on unpassivated Al-Si-V-Pd alloys at 180 °C and 2xl06A/cm2 have shown an extremely high resistance to electromigration. Electromigration and microstructural data on these quaternary alloys will be presented. These findings suggest how the microstructure is stabilized by the combined action of the V and Pd solute atoms, a) by nm-scale (A1,V) precipitates within the Al grains and b) by small (Al,Pd) particles at the Al grain boundaries. Furthermore, the key issues in terms of reliability related microstructural phenomena are both solute and solvent mobilities in grain interiors as well as along interfaces and grain boundaries. Arguments will be given showing that at low solute concentrations the metals (V and Pd) each by themselves are not effective enough to influence the solvent motion of aluminium along interfaces and grain boundaries significantly. The combination of the two metals, however, was found to be very effective.

Designing and Building Reliability Into VLSI Interconnect Systems

ABSTRACTThe optimization of electromigration (EM) and stress-induced voiding (SV) properties of advanced interconnects impacts many critical system design parameters. In particular, the choice of materials and manufacturing processes must be carefully planned during the early phases of product development. In layered metallizations, both the barrier and capping layers design can affect electromigration resistance and stress-relaxation behavior, while electrical performance often constitutes a trade-off. This is shown specifically in a study of titanium diffusion into Al-Cu from TiN barrier layers, and in initial stress-relaxation tests characterizing the effect of Ti addition in the capping layer. The development of advanced characterization techniques supports the trial-and-error experimental optimization process, but models predicting EM and SV reliability are needed and should include complex sets of microstructural and design parameters.

Geometric Characterization of Electromigration Voids

ABSTRACTThe areas, perimeters, lengths, and widths of 998 electromigration induced voids on 38 test stripes have been measured by SEM and digital image analysis. Virtually all of the voids occurred along the passivation-conductor interface on the side of the stripe. Plots of number of voids or total void area versus time to failure do not extrapolate to zero voids at zero time to failure which suggests there is a certain number of active nucleation sites predisposed to voiding.

Growth kinetics of Al2Cu in an Al-1.5Cu thin film by in Situ TEM

Cu alloying in Al interconnection lines on semiconductor chips improves their resistance to electromigration and hillock growth. Excess Cu in Al can result in the formation of Cu-rich Al2Cu (θ) precipitates. These precipitates can significantly increase corrosion susceptibility due to the galvanic action between the θ-phase and the adjacent Cu-depleted matrix. The size and distribution of the θ-phase are also closely related to the film susceptibility to electromigration voiding. Thus, an important issue is the precipitation phenomena which occur during thermal device processing steps. In bulk alloys, it was found that the θ precipitates can grow via the grain boundary “collector plate mechanism” at rates far greater than allowed by volume diffusion. In a thin film, however, one might expect that the growth rate of a θ precipitate might be altered by interfacial diffusion. In this work, we report on the growth (lengthening) kinetics of the θ-phase in Al-Cu thin films as examined by in-situ isothermal aging in transmission electron microscopy (TEM).

Dependence of electromigration damage on current density

Detailed analysis of electromigration damage, voids and hillocks, formed in layered conductors of aluminum over tungsten, revealed the following: (i) The number densities (numbers of voids and hillocks formed per unit conductor length) by electromigration are proportional to the current density; (ii) even when the void number density changes, the average growth rate of each void is still proportional to the current density; (iii) the positions of all the voids are uniformly distributed on a line; however, there is a regularity in intervals between one void to the next void and one void to the next hillock. From these results, especially from (i) and (ii), it is suggested that the dependence of void number density on the current density contributes to the higher than expected dependence of electromigration lifetime on the current density.

Physical analysis of electromigration damage under non-d.c. conditions

Physical failure analysis has been performed on Al-Si metal interconnects stressed for Electromigration (EM) under Bidirectional (BC) and Pulsed Unidirectional (PDC) currents. Electrically measured resistance changes due to void formation have been compared to estimates obtained from direct void observation under the Scanning Electron Microscope (SEM) and a correlation between them has been established. The results provide support to the average current model proposed for EM by Maiz [8]. The influence of microstructural and geometrical parameters in EM void generation has also been studied and it has been concluded that the type and location of the PDC and BC EM generated voids are similar to that observed under DC conditions.

Mechanical Stress Effects on Electromigration Voiding in a Meandering Test Stripe

ABSTRACTEarlier experimental findings concluded that electromigration voids in these meandering stripe test structures were not randomly distributed and that void nucleation frequently occurred sub-surface at the metal/thermal oxide interface. The data showed a strong correlation between void area, void growth rate and stripe segment length [1]. The influence of mechanical stress on electromigration damage in these test structures has been examined by applying tensile stresses to both passivated and unpassivated samples. The stress distributions are calculated using finite element analysis for each of the test conditions. The resulting impact on electromigration voiding, as well as mechanical stress voiding, and lateral hillock formation is discussed.

Mechanical Stress Effects on Electromigration Voiding in a Meandering Test Stripe

AbstractEarlier experimental findings concluded that electromigration voids in these meandering stripe test structures were not randomly distributed and that void nucleation frequently occurred sub-surface at the metal/thermal oxide interface. The data showed a strong correlation between void area, void growth rate and stripe segment length [1]. The influence of mechanical stress on electromigration damage in these test structures has been examined by applying tensile stresses to both passivated and unpassivated samples. The stress distributions are calculated using finite element analysis for each of the test conditions. The resulting impact on electrornigration voiding, as well as mechanical stress voiding, and lateral hillock formation is discussed.

The Microstructural Nature of Electromigration and Mechanical Stress Voids in Integratedcircuit Interconnect

AbstractIt is well known that stress and electromigration induced voiding is of major concern for integrated circuit interconnect reliability. However, there has been little systematiccharacterization of void morphology and crystallography in ever more technologically important narrow, “near-bamboo” conducting lines. Prior reports indicate thatvoids are typically wedge or slit shaped, with failure often associated with slit voids.Void face habit plane is most often reported to be {111}. Wedge and slit void morphology and crystallography have been studied in comb/serpentine and parallel line array test structures. In virtually all cases, void faces are {111} oriented. In contrast to earlier studies, intragranular wedge stress voids have been observed. All electromigration opens were due to slit voids; these were typically intragranular, in contradiction to current theories of void formation, and likely are mechanical fractures. Under accelerated test conditions, non-grain boundary diffusion paths appear to operate at distances of tens of micrometers. Relative displacement between wedge voids and attached grain boundaries occurs where a wedge face lies on a near common {111} plane for the two grains. It is suggested that slit voids are intragranular under both stress and electromigration conditions and likely associated with local interconnect depassivation. Based solely on appearance and crystallography, no void can uniquely be identified as due to stress alone or electromigration alone.