Effect Of Dielectrics Research Articles

The Impact of AI on Contact Resistance and Its Suitability in Fine Pitch Interconnects

Integration issues for a three-dimensional (3D) interconnect in a Face-to-Face (F2F) configuration are discussed. In particular, the effect of AI and organic dielectrics under the bump and their effect in chip-package-interaction (CPI) stresses as well as AI contact resistance issues that arise as the interconnection pitch is decreased. This paper will present a finite-element model created to study the stresses in advanced 3D microelectronic package. To assess the reliability of the 3D packages a submodeling approach is used to capture the CPI stresses. The modeling study presented indicates that it is beneficial to continue using AI pads as it has significatly lower stresses compared to copper pads/vias. In the second portion of the paper, the effect of PBO developer on AI corrosion is presented. Reactive ion etching (RIE) chemistries and wet chemistries were optimized using contact resistance as the success metric. Process robustness was achieved by decoupling the hard dielectric opening from the PBO via opening. Time of Flight Secondary Ion Mass Spectrometry (ToF-SIMS), Scanning Electron Microscopy (SEM), X-ray Photoelectron Spectroscopy (XPS) analysis were used to add clarity to the bump contact resistance values.

Ultrahigh Energy Storage Density and Efficiency of Lead-Free Dielectrics with Sandwich Structure.

Lead-free dielectric capacitors have attracted significant research interest for high-power applications due to their environmental benefits and ability to meet the demanding performance requirements of electronic devices. However, the development of lead-free ceramic dielectrics with outstanding energy storage performance remains a challenge. In this study, environmentally friendly ceramic dielectrics with sandwich structures are designed and fabricated to improve energy storage performance via the synergistic effect of different dielectrics. The chemical compositions of the outer and middle layers of the sandwich structure are 0.35BiFeO3 -0.65SrTiO3 and Bi0.39 Na0.36 Sr0.25 TiO3 , respectively. The experimental and theoretical simulation results demonstrate that the breakdown strength is over 700kVcm-1 for prepare sandwich structure ceramics. As a result, an ultrahigh recoverable energy storage density of 9.05Jcm-3 and a near-ideal energy storage efficiency of 97% are simultaneously achieved under 710kVcm-1 . Furthermore, the energy storage efficiency maintains high values (≥ 96%) within 1-100Hz and the power density as high as 188MWcm-3 under 400kVcm-1 . These results indicate that the designed lead-free ceramics with a sandwich structure possess superior comprehensive energy storage performance, making them promising lead-free candidates in the energy storage field.

A review of electrical discharge machining (EDM) and its optimization techniques

Non-traditional machining processes replace outdated manufacturing processes for machining hard metal matrix composite materials. Electrical Discharge Machining (EDM) is a non-conventional process that carries out machining depending on the materials’ thermal conductivity, melting point and electric resistivity. Stainless steel is used to produce nearly half of the world’s production units, and this process ensures the machining of stainless steel effectively. Various EDM processes are used to carry out various machining processes, which otherwise would not have been possible by any other machining operation. This paper provides an insightful review of existing literature, focusing on the techniques and associated parameters. In particular, input parameters, such as peak current, pulse on time, and pulse off time, are studied, along with the effect of dielectrics against the output parameters, such as metal removal rate and surface rudeness. Researchers in the past intensely focus on tool wear ratio. From this review, it is evident that researchers emphasized the material removal rate, surface finish and marching efficiency of the process under consideration.Besides, it is concluded that researchers did not seem to emphasize on study of different optimization techniques in this regard.

Deriving a novel methodology for nano-BioFETs and analysing the effect of high-k oxides on the amino-acids sensing application

In this paper, we present simulation results of a BioFET using methodology based on the Gouy-Chapman-Stern and the Site-binding models. The derived simulation approach is used to sense different amino acids, such as Arginine (R), Aspartic Acid (D) and Proline (P), functionalized with the help of a linker connected to the gate-oxide. The performance of the BioFETs is optimized while analyzing the effect of high-k dielectrics as the gate oxide. In general, the channel oxides are responsible for tuning the parameters such as sensitivity, surface potential and intrinsic buffer capacity. The variation of total surface capacitance, the second derivative of drain current and surface potential are used to uniquely identify the signatures of different amino acids. The proposed method can be helpful in defining an efficient method for label-free protein sequencing.

Circuit Analysis and Optimization of GAA Nanowire FET Towards Low Power and High Switching

The main aim of this work is to study the effect of symmetric and asymmetric spacer length variations towards source and drain on n-channel SOI JL vertically stacked (VS) nanowire (NW) FET at 10 nm gate length (LG). Spacer length is proved to be one of the stringent metrics in deciding device performance along with width, height and aspect ratio (AR). The physical variants in this work are symmetric spacer length (LSD), source side spacer length (LS) and drain side spacer length (LD). The simulation results give the highest ION/IOFF ratio with LD variation compared to LS and LSD, whereas latter two variations have similar effect on ION/IOFF ratio. At 25 nm (2.5 × LG) of LD, the device gives appreciable ON current with the highest ION/IOFF ratio (2.19 × 108) with optimum subthreshold slope (SS) and ensures low power and high switching drivability. Moreover, it is noticed that among optimal values of LS and LD, the device ION/IOFF ratio has an improvement of 22.69% as compared to other variations. Moreover, the effect of various spacer dielectrics on optimized device is also investigated. Finally, the CMOS inverter circuit analysis is performed on the optimized symmetric and asymmetric spacer lengths.

Carrier transport mechanism in bottom gate thin‐film transistor with SnO as active layer for CMOS displays

AbstractIn this work, we report on four tin monoxide (SnO) thin‐film transistor (TFT) grain boundary (GB) models of carrier transport considering the native defects in the thin film, interface traps, and GB deep/tail states. The changes in the activation energy and the GB barrier potential on the application of gate electric field are thoroughly investigated. The shift in Fermi level and the charge carrier transport mechanisms are examined for the two‐channel model by the application of external potential. Four models are developed to study the impact of phase transformation of SnO material on the TFT characteristics. Among the four developed models which are considered as four different cases, Case (iv) shows excellent performance and the simulation results revealed that the location of Fermi level closer to the mid gap are suggested to favor the ambipolar behavior. Also, the influence of SnO material thickness and the effect of different dielectrics on the ambipolar device characteristics are examined aiming at optimized performance of the device. The developed optimized model will help the process engineers in tuning the SnO material parameters for achieving better performance in both p‐type and n‐type TFTs when employed in CMOS based displays.

Effect of dielectrics on the field emission characteristics in the diode system modeling

In this article diode emission system with dielectrics on the field emitter basis is simulated. The diode system is a rotationally symmetrical electron gun with a field emission cathode on a flat substrate and a flat anode parallel to the substrate. The interior of the system domain is filled with three dielectrics. The effect of the field cathode on the electrostatic potential distribution is replaced by the effect of a finite charged line that is located at the axis of the system. The potential distribution is determined over the entire area of an electron gun. Fowler–Nordheim equation is used to calculate the emission characteristics values. The effect of dielectrics on the emission characteristics is presented.

Recent Advances in Atherosclerotic Disease Screening Using Pervasive Healthcare.

Atherosclerosis screening helps the medical model transform from therapeutic medicine to preventive medicine by assessing degree of atherosclerosis prior to the occurrence of fatal vascular events. Pervasive screening emphasizes atherosclerotic monitoring with easy access, quick process, and advanced computing. In this work, we introduced five cutting-edge pervasive technologies including imaging photoplethysmography (iPPG), laser Doppler, radio frequency (RF), thermal imaging (TI), optical fiber sensing and piezoelectric sensor. IPPG measures physiological parameters by using video images that record the subtle skin color changes consistent with cardiac-synchronous blood volume changes in subcutaneous arteries and capillaries. Laser Doppler obtained the information on blood flow by analyzing the spectral components of backscattered light from the illuminated tissues' surface. RF is based on Doppler shift caused by the periodic movement of the chest wall induced by respiration and heartbeat. TI measures vital signs by detecting electromagnetic radiation emitted by blood flow. The working principle of optical fiber sensor is to detect the change of light properties caused by the interaction between the measured physiological parameter and the entering light. Piezoelectric sensors are based on the piezoelectric effect of dielectrics. All these pervasive technologies are noninvasive, mobile, and can detect physiological parameters related to atherosclerosis screening.

Effect of gate dielectrics on characteristics of high-energy proton-irradiated AlGaN/GaN MISHEMTs

The effects of high energy (57 MeV) proton irradiation on the electrical characteristics of AlGaN/GaN MISHEMTs were investigated. The MISHEMTs were fabricated with two different types of gate dielectrics, atomic layer deposited (ALD)-Al2O3 and plasma enhanced chemical vapor deposited (PECVD)-SiNx. It was found that the proton irradiation induces negative charges in gate dielectric layers, which would degrade performances of the MISHEMTs, such as threshold voltage shift and reduction of drain current. After proton irradiation, the increase of the induced charge density in the MISHEMT with Al2O3 gate dielectric layer was not severe, which resulted in less degradation of DC characteristics of the device, but the increase of the induced charge density was seven times higher in the MISHEMT with SiNx gate dielectric layer to cause a larger positive shift of threshold voltage in the transfer characteristic of the device. These results indicated that the Al2O3 dielectric layer is more suitable as the rad-hard gate insulator for AlGaN/GaN MISHEMTs in the space environment.

Improvement in Electrical Characteristics of BE-SONOS Using High-k Dielectrics in Tunneling Barrier

In this paper, we have analyzed the effect of high-k dielectrics in the tunneling barrier of bandgap engineered Silicon Oxide Nitride Oxide Silicon (BE-SONOS). The high-k materials used, hereby, are scandates and aluminates of the rare earth materials such as GdScO, LuAlO, and LaAlO. These materials have high permittivity and low valence band offset that helps in improving the erase speed and retention trade-off. Also, lower conduction band offset of these high-k dielectrics leads to the improvement of program speed. Here, scandate of the rare earth material, GdScO, substitutes the nitride (SiN) layer and the aluminates of the rare earth material, LuAlO and LaAlO, are used in place of top oxide (SiO2) layer in tunneling barrier (SiO2/SiN/SiO2) of BE-SONOS. Further, with the scaling of the gate length; for the same effective oxide thickness, it has been observed that the investigated stacks encompass the same memory dynamics as before the gate length scaling. Consequently, the investigated tunneling barrier stacks represent robustness in terms of retention (at room temperature and 150 oC) and enhanced program speed as well as erase speed and retention trade-off.

Review and Mechanism of the Thickness Effect of Solid Dielectrics.

The thickness effect of solid dielectrics means the relation between the electric breakdown strength (EBD) and the dielectric thickness (d). By reviewing different types of expressions of EBD on d, it is found that the minus power relation (EBD = E1d −a) is supported by plenty of experimental results. The physical mechanism responsible for the minus power relation of the thickness effect is reviewed and improved. In addition, it is found that the physical meaning of the power exponent a is approximately the relative standard error of the EBD distributions in perspective of the Weibull distribution. In the end, the factors influencing the power exponent a are discussed.

The effect of multilayer dielectrics on electrical characteristics of thin film capacitors for high energy density application

Hydrogenated diamond-like carbon and aluminum oxide thin films were used in combination to fabricate capacitors in order to investigate the effect of multiple dielectrics on dielectric constant, breakdown strength, and energy density. It was found that capacitors made by combining the two materials exhibited significantly higher breakdown strength and energy density than capacitors made with either dielectric material alone. In addition, the model for calculating the combined dielectric constant for multiple dielectrics was validated. The highest energy density (U <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</sub> = 5.2 J/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) capacitor made for this investigation had a breakdown strength of 5.3 MV/cm and an effective dielectric constant of 5.3.

Effect of Secondary Emission Yield and Initial Charge of Dielectric Material on Multipactor in Parallel-Plate Dielectric-Loaded Waveguide

In this study, the charge polarity on a dielectric surface and the effect of initial charge on the multipactor threshold in a parallel-plate dielectric-loaded waveguide are investigated through 1-D particle-in-cell (PIC) simulation. The numerical results show that owing to different dielectric materials, two kinds of multipactor mechanisms exist on the dielectric multipactor. For analyzing the effect of charged dielectrics on the multipactor threshold, the single-sided (SS) and double-sided (DS) impacts on metal and dielectric surfaces are considered. As a result, the multipactor threshold could be suppressed by adding some initial charges on the dielectric surface, satisfying a certain condition.

The Effect of Crystalline Aluminum Oxide on Device Performance of Solution-Processed Indium-Gallium-Zinc-Oxide Thin-Film Transistors Operating at Low Voltage.

High dielectric constant (high-k) materials have been extensively investigated for low-voltage operating electronics. In recent years, solution-processed high-k dielectrics have been of technological interests in low fabrication cost, large area process and good film quality, compared to the vacuum-process technology. In this paper, we demonstrate solution-processed aluminum oxide (Al2O3) dielectrics for high performance solution-processed indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) operating at low voltage. The material and electrical properties of Al2O3 dielectrics fabricated at different post-annealing temperatures were analyzed by atomic force microscopy, scanning electron microscopy, X-ray diffraction and capacitance-voltage measurements. We also investigate the effect of crystalline Al2O3 dielectrics on the device performance of solution-processed IGZO TFTs. It is concluded that improved interfacial characteristics of crystalline Al2O3 dielectrics enhance the device performance of solution-processed IGZO TFTs operating at 3 V.

Electrical and surface properties of SiO2 films modified by ultraviolet irradiation and used as gate dielectrics for pentacene thin-film transistor applications

The effect of ultraviolet (UV) treatment on the electrical and surface properties of SiO2 is studied. UV treatment leads to the formation of the silicon peroxide in SiO2 near the surface, thus increasing the capacitance of SiO2. The effect of SiO2 gate dielectrics with UV treatment on carrier transport for a pentacene-based organic thin-film transistor (OTFT) is also studied. Experimental identification confirms that the shift of the threshold voltage towards positive gate-source voltages for OTFTs is due to an increase in the number of trap states in SiO2 near the pentacene/SiO2 interface. The existence of a peroxidation layer between pentacene and SiO2 serves to strengthen the pentacene-SiO2 interaction, reducing the field-effect carrier mobility and the leakage current in OTFTs.

Highly sensitive NO2 sensors based on organic field effect transistors with Al2O3/PMMA bilayer dielectrics by sol-spin coating

Abstract NO2 gas sensors based on organic field effect transistors (OFETs) with alumina/poly(methyl methacrylate) (Al2O3/PMMA) bilayer dielectrics were prepared by sol-spin coating method. The sensors with 0.8 mol/L Al2O3-sol dielectric layer show a high NO2 response, low baseline drift, stable sensing performance, and fast response/recovery time at room temperature. The sensitivity is over 129%/ppm and the limit of detection is below 1 ppm (134%). The results are comparable to most organic devices. The high sensor properties were attributed to the more ordered films on the dielectric layer and better electrical properties with bilayer dielectric devices than those with single dielectric devices. Compared to OFETs with PMMA single dielectric, the mobility was improved above 23 times, threshold voltage was reduced by 32.47 V, and both on-off current radio and saturation current were improved above an order of magnitude for OFETs with Al2O3/PMMA bilayer dielectrics at 0.8 mol/L Al2O3-sol. Moreover, the mechanism of organic film growth and the effect of bilayer dielectrics on sensing properties were analyzed. It is revealed that the highly electrical and NO2 sensing properties are closely relate. A simple and effective method, the sol-spin coating method, was provided to obtain high performance NO2 gas sensors based on OFETs.

Influence of solid-state electrolyte on 2D SnS2 field effect transistors

Transition metal-dichalcogenides (TMDs) have attracted considerable interests due to their unique combination of gate-tunable charge carriers, high mobility, and sizable band gap. Here, we report the effect of solid-state ionic liquid top-gate on SnS2 field effect transistors (FETs). The transport measurements indicate that the threshold voltage Vth in transport curves shifts significantly in the positive Vtg direction. By utilizing a hybrid solid-state ionic liquid/solid electric dual-gate geometry acting on the SnS2 channel, an enhancement of carrier mobility is observed due to the reduction of barrier height by band bending and the increase of carrier concentration. Our study provides a framework for understanding the effect of different dielectrics on SnS2 FETs and paves the way for further exploration of their prospects for electronic and optoelectronic devices.

Dual-material gate dual-stacked gate dielectrics gate-source overlap tri-gate germanium FinFET: analysis and application

This study proposes a novel dual-material-gate dual-stacked-gate dielectrics gate–source overlap Ge FinFET and compares its characteristics with conventional FinFET. The proposed device shows very less leakage current (IOFF) (~ 10−17 A), significant on drain current (~ ION) (~ 10−4 A), very high ratio of ION to IOFF (ION/IOFF) (~ 1013) and less subthreshold swing of (SS) (71 mV/dec). This study presents the effect of different dielectrics, oxide thicknesses (tox) and back-gate voltages (VGB) on transfer characteristics of the proposed device. The effect of channel concentration on ION/IOFF, threshold voltage (Vth), transconductance (gm) and SS is also investigated. The effect of overlap length (Lov) on analog parameter, gate–source capacitance (Cgs), is also analyzed. Moreover, the effect of fin thickness (Tfin) on Vth and SS is also studied. The height of the BOX plays an important role in reducing IOFF. Moreover, with emphasis on digital application, by using the proposed device a digital inverter circuit is implemented, and this study investigates the characteristics using mixed-mode simulation.

Self-Assembly of Pentacene on Sub-nm Scale Surface Roughness-Controlled Gate Dielectrics

Surface roughness (Rq) of dielectric materials plays an important role in the ordering and charge-carrier transport of organic semiconductors, and is directly involved in the development of nuclei and crystal grains on a surface. To investigate the effect of Rq-controlled dielectrics with similar surface energy (γ) on the development of nuclei and crystal grain, a series of triethoxysilane-terminated polystyrene (PSTES) polymers with different molecular weights (MW) values is synthesized using reversible addition-fragmentation chain transfer polymerization. The different MW PS-TES films are spun-cast on a hydroxyl (-OH)-rich SiO2 dielectric surface, and chemically coupled with -OH moieties at 110 °C. Some films are also rinsed with an excess of toluene to remove unreacted polymer residue, increasing the average Rq values of the treated SiO2 surfaces. The resulting polymer-treated dielectrics show similar surface energy values of 41.6-42.5 mJ m-2 but different Rq values ranging from 0.29 to 1.07 nm. On the nanoscale roughness-controlled dielectric surfaces, 40-nm-thick pentacene films show discernible types of crystal grains with different phases, shapes, sizes, and ordering, all of which significantly affect charge-carrier transport along π-conjugated semiconductors in organic field-effect transistors (OFETs). Pentacene OFETs show large variations in field-effect mobility (μFET) from 0.89 to 0.19 cm2 V-1 s-1. Specifically, at Rq=0.40 nm the μFET value suddenly decreases to 0.30 cm2 V-1 s-1. On polymer treated SiO2 dielectrics with an Rq value greater than 0.40 nm, polymorphic, less-ordered, and smaller grains of pentacene containing large number of charge trap sites developed, resulting in significantly degraded charge-carrier transport along the intra- and inter-grains in OFETs, in comparison to the well-ordered grains on smooth polymer-treated surfaces (Rq<0.40 nm).

Effect of gate dielectric on the performance of ZnO based thin film transistor

The paper report the fabrication and characterization of two different sets of bottom gate top contact ZnO thin film transistors (TFTs) using SiO2 and Al2O3 dielectric layers in an attempt to compare and contrast the effect of gate dielectrics on performance of the two devices. ZnO thin film and dielectric layers were deposited at room temperature by radio frequency (RF) sputtering method. The results were validated by those obtained using commercial software tool ATLAS and an analytical model reported by others. The ZnO TFT with Al2O3 dielectric exhibited superior electrical performance as compared to the ZnO TFT with SiO2 dielectric. The study also revealed that the performance of ZnO/Al2O3 based TFTs are far more consistent and reliable as compared to their ZnO/SiO2 counterpart.