Abstract

Integration issues for a three-dimensional (3D) interconnect in a Face-to-Face (F2F) configuration are discussed. In particular, the effect of AI and organic dielectrics under the bump and their effect in chip-package-interaction (CPI) stresses as well as AI contact resistance issues that arise as the interconnection pitch is decreased. This paper will present a finite-element model created to study the stresses in advanced 3D microelectronic package. To assess the reliability of the 3D packages a submodeling approach is used to capture the CPI stresses. The modeling study presented indicates that it is beneficial to continue using AI pads as it has significatly lower stresses compared to copper pads/vias. In the second portion of the paper, the effect of PBO developer on AI corrosion is presented. Reactive ion etching (RIE) chemistries and wet chemistries were optimized using contact resistance as the success metric. Process robustness was achieved by decoupling the hard dielectric opening from the PBO via opening. Time of Flight Secondary Ion Mass Spectrometry (ToF-SIMS), Scanning Electron Microscopy (SEM), X-ray Photoelectron Spectroscopy (XPS) analysis were used to add clarity to the bump contact resistance values.

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