Self-Assembly of Pentacene on Sub-nm Scale Surface Roughness-Controlled Gate Dielectrics

Abstract

Surface roughness (Rq) of dielectric materials plays an important role in the ordering and charge-carrier transport of organic semiconductors, and is directly involved in the development of nuclei and crystal grains on a surface. To investigate the effect of Rq-controlled dielectrics with similar surface energy (γ) on the development of nuclei and crystal grain, a series of triethoxysilane-terminated polystyrene (PSTES) polymers with different molecular weights (MW) values is synthesized using reversible addition-fragmentation chain transfer polymerization. The different MW PS-TES films are spun-cast on a hydroxyl (-OH)-rich SiO2 dielectric surface, and chemically coupled with -OH moieties at 110 °C. Some films are also rinsed with an excess of toluene to remove unreacted polymer residue, increasing the average Rq values of the treated SiO2 surfaces. The resulting polymer-treated dielectrics show similar surface energy values of 41.6-42.5 mJ m-2 but different Rq values ranging from 0.29 to 1.07 nm. On the nanoscale roughness-controlled dielectric surfaces, 40-nm-thick pentacene films show discernible types of crystal grains with different phases, shapes, sizes, and ordering, all of which significantly affect charge-carrier transport along π-conjugated semiconductors in organic field-effect transistors (OFETs). Pentacene OFETs show large variations in field-effect mobility (μFET) from 0.89 to 0.19 cm2 V-1 s-1. Specifically, at Rq=0.40 nm the μFET value suddenly decreases to 0.30 cm2 V-1 s-1. On polymer treated SiO2 dielectrics with an Rq value greater than 0.40 nm, polymorphic, less-ordered, and smaller grains of pentacene containing large number of charge trap sites developed, resulting in significantly degraded charge-carrier transport along the intra- and inter-grains in OFETs, in comparison to the well-ordered grains on smooth polymer-treated surfaces (Rq<0.40 nm).