Diode Clamped Inverter Research Articles

A Novel Hybrid Multilevel PWM Technique for Power Rating Enhancement in Improved Hybrid Cascaded Diode Clamped Multilevel Inverter

In this article, an improved hybrid topology called cascaded diode clamped half bridge multi-level inverter is proposed upon a conventional cascaded H-bridge (CHB) multi-level inverter (MLI) which has the limitation to withhold a specific cell voltage due to the constraint on the device voltage stress. The proposed topology will ensure the enhancement of cell voltage capability double times, reduces the device stress, modularity in structure, and allows even power distribution. As a result, the user can now integrate two numbers of active dc sources to a cell. This ensures the efficiency of power enhancement in the applications like on/off grid-connected renewable energy system which require the power to be converted from dc to ac or vice versa. The proposed topology is compared extensively with the conventional CHB MLI at different loads. Hybrid pulse width modulation technique allows to operate the individual half bridge. The simulation and experimental results confirm the performance and efficiency of this proposed topology. A mathematical model of the proposed topology has been derived for the better feasibility of this topology extension to various other applications.

Performance evaluation and comparison of diode clamped multilevel inverter and hybrid inverter based on PD and APOD modulation techniques

<p>The popularity of multilevel inverters have increasing over the years in various applications without use of a transformer and has many benefits. This work presents the performance and comparative analysis of single phase diode clamped multilevel inverter and a hybrid inverter with reduced number of components. As there are some drawbacks of diode clamped multilevel inverter such as requiring higher number of components, PWM control method is complex and capacitor voltage balancing problem, an implementation of hybrid inverter that requires fewer components and less carrier signals when compared to conventional multilevel inverters is discussed. The performance of single phase diode clamped multilevel inverter and hybrid multilevel inverter for seven, nine and eleven levels is performed using phase disposition, alternate phase opposition disposition sinusoidal pulse width modulation techniques. Both the multilevel inverter are implemented for the above mentioned multicarrier based Pulse Width Modulation methods for R and R-L loads. The total harmonic distortion is evaluated at various modulation indices. The analysis of the multilevel inverters is done by simulation in matlab / simulink environment.</p>

Simulated topology of doubly powered asynchronous motor with diode clamped inverter

This paper deals with the problem of modelling, control and analysis of a doubly-powered induction machine (DPIM) using a three-level three-phase voltage source inverter known simply as diode clamped inverter (DCI) with a three-phase diode rectifier and a DC link in between. A mathematical model of DPIM and the associated DCI circuit is developed. The stator circuit of the DPIM is supplied directly from an ac system network while its rotor side is supplied via a variable frequency DCI. A multi-loop nonlinear field controller is developed to meet an accurate motor speed, regulation of the mechanical load torque and the overall system power. The results obtained from the simulation in the environment of Simplorer 7 show that the proposed DCI inverter offers great optimisation, little overshoot, and reduced voltage ripples. Consequently, the dynamic behaviour of the motor and the energy efficiency of the overall system are progressively improved and a complete suppress of the influence of the variation in the motor load on the speed of the motor is achieved.

Simulated topology of doubly powered asynchronous motor with diode clamped inverter

This paper deals with the problem of modelling, control and analysis of a doubly-powered induction machine (DPIM) using a three-level three-phase voltage source inverter known simply as diode clamped inverter (DCI) with a three-phase diode rectifier and a DC link in between. A mathematical model of DPIM and the associated DCI circuit is developed. The stator circuit of the DPIM is supplied directly from an ac system network while its rotor side is supplied via a variable frequency DCI. A multi-loop nonlinear field controller is developed to meet an accurate motor speed, regulation of the mechanical load torque and the overall system power. The results obtained from the simulation in the environment of Simplorer 7 show that the proposed DCI inverter offers great optimisation, little overshoot, and reduced voltage ripples. Consequently, the dynamic behaviour of the motor and the energy efficiency of the overall system are progressively improved and a complete suppress of the influence of the variation in the motor load on the speed of the motor is achieved.

A simplified and generalised SVPWM method including over modulation zone for seven level diode clamped inverter - FPGA implementation

This paper presents simplified and generalised SVPWM technique for a neutral point clamped multilevel inverter of any level. This modulation technique provides a simplistic strategy for transition between various modulation indexes with linear transfer characteristic which provides a general solution for over modulation zone. The proposed technique is based on 60° coordinate system with all the computational work is carried out online, generating the desired switching states and their sequences through simplified expressions without any additional storage requirement. This modulation technique combines the concept of reference vector modification and on duration modification during over modulation zones. The performance of the proposed technique is tested through FPGA spartan3A processor experimentally for seven level diode clamped inverter. The simulation and experimental results are validated at various modulation indexes and are in well agreement with each other.

A simplified and generalised SVPWM method including over modulation zone for seven level diode clamped inverter - FPGA implementation

A simplified and generalised SVPWM method including over modulation zone for seven level diode clamped inverter - FPGA implementation

A novel PEMFC power conditioning system based on the interleaved high gain boost converter

Abstract Power converter units are crucial components in proton exchange membrane fuel cell (PEMFC) energy generation systems. For this reason, and also motivated by the demands in high quality power conditioning for PEMFC systems, we propose the application of an interleaved high gain boost converter topology with a diode clamped multilevel inverter as power interface. The main advantages of the proposed scheme encompass: high voltage conversion ratio, input current ripple mitigation, and voltage balancing across output capacitors. These characteristics make this converter ideal for grid-connection purposes, acting as an interface for renewable energy sources that provide low voltages and demand low current ripples. The underlying theoretical analysis as well as simulation and experimental validation are presented in this paper.

Multicarrier SPWM Control Techniques for Three Phase Eleven Level Diode Clamped Multilevel Inverter and Hybrid Inverter with Reduced Number of Components

<p class="Els-Abstract-text">A comparative analysis of three phase eleven level diode clamped multilevel inverter (DCMLI) and hybrid inverter is performed in this paper in which the later requires fewer carrier signals, less number of devices and gate drive circuits. The performance is evaluated using phase disposition (PD), alternate phase opposition disposition (APOD) and carrier overlapping (CO) sinusoidal pulse width modulation (SPWM) methods. The hybrid multilevel inverter has superior features over diode clamped multilevel inverters and is more efficient since the positive levels of the inverter that are generated by high frequency switches (level generation part), are reversed by low frequency switches (polarity generation part) when the voltage polarity is required to be changed for negative polarity. Therefore, the overall cost and complexity of the hybrid inverter are greatly reduced particularly for higher inverter output voltage levels. Simulation is performed for three phase eleven level diode clamped multilevel inverter and hybrid multilevel inverter using MATLAB/Simulink for induction motor load and the total harmonic distortion is evaluated at different load torques.</p>

Modeling and Simulation of Photovoltaic Grid-connected Inverter

Based on the topology of diode clamped three-level inverter, this paper introduces the working principle and control method of the inverter. This paper focuses on the midpoint potential balance problem and PWM control method of Diode-clamped three-level inverter and the SVPWM control method developed thereby. In this paper, the analysis of inverter topology and control method is focused on the maximum power point tracking problem and phase-locked loop problem in photovoltaic grid-connected process. This paper proposes a complete system for photovoltaic grid connection using inverters. At the end of this paper, the results of simulation and analysis of the system using computer software are given.

A NEW STRUCTURE OF FIVE-LEVEL DIODE CLAMPED INVERTER WITH REDUCING ITS ELEMENTS

At the high power switching circuit's applications, when the harmonic distortion is harmful, a multi-level diode clamped inverter is useful, especially when reduced total harmonic distortion and high power are desired. But when the levels get a rise, number of semiconductors are also rising, which leads to many problems such as increasing cost, losses, installation area, and total harmonic distortion. Many researchers have tried to find solutions to these problems. In this sense, this paper focuses on: a) build a new structure of five level diode clamped inverter. b) Increase the efficiency of the inverter by reducing the number of switches. c) Reduce the total harmonic distortion. The theoretical calculation and simulation results are performed for five level diode clamped inverter by MATLAB/ SIMULINK.

Integrating multilevel converters application on renewable energy sources—A survey

Multilevel inverters emerged as the solution for overcoming the limitations of two level inverters, such as total harmonic distortion, high magnetic interference, and high dv/dt in high power voltage applications. The ability to generate sinusoidal output voltage is another speciality of multilevel inverters. The wide range of applications in fields such as power grids, motor drives, and Volt-Ampere Reactive compensation enhances the visibility of multilevel inverters. This paper identifies the conventional multilevel inverter topologies such as diode clamped multilevel inverters, flying capacitor multilevel inverters, and cascaded H bridges and presents a literature review on the topologies considering the facts of structural and functional diversities over the ages which have been adapted right from the beginning of its emergence. It also details the various optimization technologies that are used in multilevel inverters to obtain the optimal switching angle for harmonic elimination. This paper also explains the modulation techniques that are in effect for a specific purpose in different applications to get the best possible result.

Operation of Direct Power Control Scheme in Grid-Connected Mode Using Improved Sliding Mode Observer and Controller

Abstract This paper introduces the direct power control (DPC) scheme controlled by a new version of the 1st order sliding mode control to operate a distributed generator. This distributed generator is a core of the distributed generation system (DGS), which injects active and reactive power to the distribution system in a grid-connected mode. The presented 1st order sliding mode control based direct power scheme is very efficient in terms of chattering at steady-state and its dynamic performance. The superior performance of the presented control scheme results from a novel combination of an integral form for the sliding surface along with an innovative power-rate reaching law. The feedback power of the direct power scheme is estimated using an accurate developed formulation of the sliding mode observer. The distributed generator is based on the 5-level diode clamped inverter to minimize the injected harmonics. To prove the accurate performance of this new combination of the sliding mode control with sliding mode observer, the developed sliding mode observer is compared to Luenberger observer and the traditional virtual-flux based power estimation. Also, the whole control scheme is compared to other schemes for the same application such as conventional direct power control and conventional sliding mode control based direct power control.

Soft-Switched Interleaved DC/DC Converter as Front-End of Multi-Inverter Structure for Micro Grid Applications

An isolated four channel dc/dc converter with zero voltage switching is proposed as the front-end of multiple inverter structures to integrate renewable and other low voltage energy sources to micro grids. The interleaving technique is adopted to connect each module of proposed converter to a common dc source. This dc source can be a fuel cell stack, PV panels, battery, or any other low voltage dc source. All four channels are interleaved and a phase shift of 90° is provided between the gate signals of each channels, which reduces the input current ripple. The output port of the proposed converter provide four isolated and regulated dc voltages. These isolated dc sources can be connected in series or parallel or series-parallel manner to obtain required dc-link voltage of various inverter structure. Issues like capacitor voltage balancing of diode clamped multilevel inverters can overcome through the proposed converter. By incorporating a coupled inductor for isolation and energy storage along with voltage multiplier circuit, the proposed converter can achieve higher voltage step up with lower turns ratio and lower voltage stress at moderate duty ratio. Hence, mosfets of low voltage rating (low R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> (ON)) can be utilized to reduce conduction loss. A 2 kW prototype of the proposed interleaved dc/dc converter is developed and tested with diode clamped three-level inverter, five-level inverter, and three-phase two-level inverter to verify the design.

Design and software implementation of solid state transformer

The work presented in this paper concerned with the analysis, design and software implementation of the Solid State Transformer as an alternative to the conventional power transformer. The proposed transformer aims to perform the same task as the conventional one with additional facilities and advantages. Three stages are considered to configure the Solid State Transformer. The first stage which is known as input stage and implemented using Vienna rectifier which converts the AC voltage of the main supply to a DC voltage. The second stage (isolation stage) step down the DC voltage to a lower level DC voltage. This stage consists of a single – phase five-level diode clamped inverter, 1 KHz step – down transformer and fully controlled bridge rectifier. The output stage (third stage) is a three-phase three-level diode clamped inverter which converts the low level DC voltage to a three-phase, 50 Hz AC voltage. Model Predictive Current Control has been employed for driving transformer’s stages. The gating signal is produced directly when the given cost function is minimized, therefore there is no need of any modulator. Behavior of the proposed structure is achieved by simulation which shows high quality power conversion with low Total Harmonic Distortion.

Comparative Study of Total Harmonic Distortion in Multilevel Inverters Based WECS

This paper presents comparative study of Total Harmonic Distortion (THD) and its individual harmonic contents without grid and with grid for Diode clamped multi level inverter (DCMLI) and Flying capacitor clamped multilevel inverter (FCMLI) based Doubly Fed Induction Generator (DFIG) employing PI and Fuzzy logic controller (FLC). Simple method to control for a variable speed wind energy conversion system with a DFIG is connected to the grid through a diode rectifier and a diode clamped multilevel inverter (DCMLI). The DC-link voltage is controlled through a DC-DC boost converter to keep the DC voltage at constant value. Inverter is controlled by sinusoidal pulse width modulation technique, which supplies power to the grid. The THD and its harmonic content are studied for different wind speeds. DFIG fed flying capacitor multi level inverter (FCMLI) based WECS connected to load as well as grid. FCMLI is controlled through sinusoidal pulse width modulation. Voltage and current harmonics are studied. The results of both multilevel inverters are compared. It shows that the level of harmonic content of two types of multilevel inverters working at different wind speeds indicates that Total Harmonic Distortion (THD) for DCMLI has given best results.

Modelling and performance analysis of different multilevel inverter topologies using PSO-MPPT technique for grid connected photovoltaic systems

This paper proposes a new control structure for two multilevel three-phase inverter topologies for photovoltaic (PV) systems connected to the grid. This control scheme includes the use of the space vector pulse wide modulation (SVPWM) technique to control the Diode Clamped Inverter (DCI) and cascade inverter topologies and the integration of the particle swarm optimisation (PSO) technique to operate the PV system at the Maximum Power Point (MPP). A Field-Programmable Gate Array (FPGA) implementation of PSO based Maximum Power Point Tracking (MPPT) is proposed to overcome the problem of MPP tracking under partial shading conditions. This MPPT technique is validated under various PV array configurations in order to evaluate the behaviour of each PV configuration under non-uniform irradiance. A SVPWM control strategy is used in order to generate gate control signals for the inverter and implemented for both DCI and cascade inverter topologies. Then, a comparative study of photovoltaic systems with these inverter topologies is carried out in the Matlab/Simulink environment and evaluated on the basis of MPPT, harmonic distortion, cost, advantages, and disadvantages. In order to test the practical implementation of the proposed control structure, FPGA/Simulink-based Hardware in the Loop approach has been used to bring the obtained results as close as possible to reality and with a minimum of constraints. Based on the analysis of the obtained results, some experimental parameters are summarized and a comparison table is obtained.

Decoupled State-Feedback Based Control Scheme for the Distributed Generation System

This article presents a new development for the decoupled state-feedback control to operate the distribution generation unit (DGU) within an efficient distribution generation system (DGS). The developed decoupled state-feedback is better than the conventional voltage vector control and sliding mode control for dealing with active and reactive power. Therefore, it is embraced to form a new control scheme, which is employed to effectively decouple and precisely control the injected active and reactive power to the distribution system. A five-level diode-clamped inverter is adopted to build the DGU in order to minimize the injected harmonics, facilitate the operation of the proposed control scheme, and ease the design of its passive filter. The proposed control scheme enables the DGS to be functional in several operational modes such as grid-connected, intentional islanding, unintentional islanding, anti-islanding, and ride-through modes. The effectiveness of the proposed control scheme is proved through the simulation results for all foregoing modes. Experimental results are provided to show how the proposed concepts are practically implemented to control the voltage of the DGU so that the active power and reactive power are exchanged between the power grid and the DGS in the grid-connected mode.

Single‐phase hybrid cascaded H‐bridge and diode‐clamped multilevel inverter with capacitor voltage balancing

Diode-clamped and cascaded H-bridge multilevel inverters are two of the main multilevel inverter topologies; each has its distinct advantages and drawbacks. Regarding the latter, cascaded H-bridge inverters require multiple separate dc sources, whereas (semi-active) diode-clamped inverters contain capacitors that require a means to balance their voltages. This paper investigates a hybrid-topology inverter, comprising a single-phase five-level semi-active diode-clamped inverter and a single-phase cascaded H-bridge inverter with their outputs connected in series, as one way to mitigate the drawbacks of each topology. The proposed control scheme for this inverter operates the switches at fundamental frequency to achieve capacitor voltage-balancing while keeping the switching losses low. Moreover, the step-angles are designed for the 13-level and 11-level output voltage waveform cases (as examples) for a fixed modulation index to achieve optimal total harmonic distortion. Furthermore, the scheme also achieves capacitor voltage-balancing for modulation indices that are close to the optimal modulation index, and for a wide range of load power factors, albeit at the cost of increased output voltage distortion. Simulation results are presented to help explain the processes of capacitor recharging and voltage-balancing, while experimental results are shown as verification of the expected behaviour of this inverter and the proposed control scheme.

Commutation Torque Ripple Reduction in the BLDC Motor Using Modified SEPIC and Three-Level NPC Inverter

This paper presents a new power converter topology to suppress the torque ripple due to the phase current commutation of a brushless dc motor (BLDCM) drive system. A combination of a three-level diode clamped multilevel inverter (3-level DCMLI), a modified single-ended primary-inductor converter (SEPIC), and a dc-bus voltage selector circuit is employed in the proposed torque ripple suppression circuit. For efficient suppression of torque pulsation, the dc-bus voltage selector circuit is used to apply the regulated dc-bus voltage from the modified SEPIC during the commutation interval. In order to further mitigate the torque ripple pulsation, the 3-level DCMLI is used in the proposed circuit. Finally, simulation and experimental results show that the proposed topology is an attractive option to reduce the commutation torque ripple significantly at low- and high-speed applications.

Evaluation of level-shifted carrier PWM technique for neutral-point stabilisation of five-level DCMLI

The persistent issue with diode-clamped multilevel inverter is unbalance in DC-link capacitor voltages. These variations become predominant at load power factor near to unity. Evolved techniques exist to balance capacitor voltages for three-level inverter. But for the inverters above three level, the problem still persists. In this paper, a novel level-shifted carrier pulse width modulation technique is proposed. As per this technique, carriers are level shifted based on the difference in capacitor voltage and phase currents. This leads to variation in duty cycle of the switches and thereby adjusting the charging and discharging of capacitors to balance capacitor voltages. The proposed technique is mathematically modelled and verified for five-level inverter using MATLAB SIMULINK.