Evaluation of level-shifted carrier PWM technique for neutral-point stabilisation of five-level DCMLI

Abstract

The persistent issue with diode-clamped multilevel inverter is unbalance in DC-link capacitor voltages. These variations become predominant at load power factor near to unity. Evolved techniques exist to balance capacitor voltages for three-level inverter. But for the inverters above three level, the problem still persists. In this paper, a novel level-shifted carrier pulse width modulation technique is proposed. As per this technique, carriers are level shifted based on the difference in capacitor voltage and phase currents. This leads to variation in duty cycle of the switches and thereby adjusting the charging and discharging of capacitors to balance capacitor voltages. The proposed technique is mathematically modelled and verified for five-level inverter using MATLAB SIMULINK.