Diode Clamped Inverter Research Articles

Direct Power Control Applied on 5-Level Diode Clamped Inverter Powered by a Renewable Energy Source

Direct Power Control Applied on 5-Level Diode Clamped Inverter Powered by a Renewable Energy Source

Seven-level diode clamped inverter fed IPMSM drive for high power applications

In recent years, multilevel inverters have become popular and widely accepted for high-power and high-voltage applications. Their performance is much superior to conventional two-level inverter as the level of the inverter increases. They produce superior quality output with less harmonic distortion. In this paper, simulation analysis of seven-level diode clamped inverter fed to interior permanent magnet synchronous motor (IPMSM) drive has been done for higher power applications. Two modulation techniques such as sinusoidal pulse width modulation (SPWM) and unified space vector pulse width modulation (USVPWM) are used. The carrier space vector pulse width modulation gives the same output reference wave as space vector pulse width modulation (SVPWM) without the actual calculation of the angle and sector location of space vector as in case of space vector modulation. The inverter output is fed to interior PMSM drive and the closed loop operation has been done using field oriented control (FOC). Speed-torque characteristics for various load conditions are studied. The output voltage and current harmonics are analysed for seven-level diode clamped inverter using SPWM and USVPWM techniques in MATLAB Simulink software.

Simplified Fault Detection Algorithm for Voltage Source Fed Induction Motor

Industrial applications of induction motor were increased these days due to robust construction. When a three-phase diode clamped inverter is driving this induction motor, the knowledge of inverter performance is very much necessary for the proper operation of induction motor drive. Conventional three-level inverter can drive the induction motor for its speed control. Out of various configurations of MLI, Diode clamped MLI is popular. It has the advantages of simple configuration and requires less number of individual DC sources. But the basic knowledge of faults in the inverter circuit can be very handy for the effective design of induction motor drive system. For the fault mitigation basically the fault detection is to be known. This paper introduces a simple algorithm for the fault identification. This algorithm is very much useful in finding the faulty phase. Out of different faults in the inverter circuit, gate driver faults are common and this paper discusses the gate open fault which is very often fault in the inverter circuit. The simple algorithm also can detect the switch in a leg where this fault occurs. This algorithm is very handy for the fault mitigation. The analysis was carried out using Matlab/Simulink software.

Seven-level diode clamped inverter fed IPMSM drive for high power applications

Seven-level diode clamped inverter fed IPMSM drive for high power applications

Performance Analysis of FPGA based Diode Clamped Multilevel Inverter Fed Induction Motor Drive using Phase Opposition Disposition Multicarrier Based Modulation Strategy

<p>Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter. This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load. Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.</p>

A Simplified Spam Algorithm for Three Level Diode Clamped Inverter

A Simplified Spam Algorithm for Three Level Diode Clamped Inverter

Comparative Analysis of Carrier based techniques for Single phase Diode Clamped MLI and Hybrid inverter with reduced components

<p>The multilevel inverters have highly desirable characteristics in high power high voltage applications. The multilevel inverter was started first with diode clamped multilevel inverter. Later, various configurations have been came into existence for many applications. However the multilevel inverters have some demerits such as requiring higher number of components, PWM control method is complex and capacitor voltage balancing problem. The hybrid multilevel inverter presented in this paper has superior characteristics over conventional multilevel inverters. The hybrid multilevel inverter employs fewer components and less carrier signals when compared to conventional multilevel inverters. It consists of level generation and polarity generation stages which involves high frequency and low frequency switches. The complexity and overall cost for higher output voltage levels are greatly reduced. Implementation of single phase 7-level, 9-level and 11-level diode clamped multilevel inverter and hybrid multilevel inverter has been performed using sinusoidal pulse width modulation (SPWM) strategies i.e., phase disposition (PD), alternate phase opposition disposition (APOD). Also these techniques are compared in terms of total harmonic distortion (THD) for various modulation indices and observed to be greatly improved in case of hybrid inverter when compared to diode clamped inverter. The comparative study of performance for single phase diode clamped multilevel inverter and hybrid inverter is analyzed with different loads. Simulation is performed using MATLAB/ SIMULINK. </p>

Investigation of TTMC-SVPWM Strategies for Diode Clamped and Cascaded H-bridge Multi-level Inverter Fed Induction Motor Drive

This paper presents a concept of two types multilevel inverters such as diode clamped and cascaded H-bridge for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. This paer focused on the performance and analysis of a three phase seven level inverter including diode clamped and cascaded H-bridge based on new tripizodal triangular space vector PWM technique approaches. TTMC based modified Space vector Pulse width modulation technique so called tripizodal triangular Space vector Pulse width modulation (TTMC-SVPWM) technique. In this paper the reference sine wave generated as in case of conventional off set injected SVPWM technique. It is observed that the TTMC-Space vector pulse width modulation ensures excellent, close to optimized pulse distribution results and THD is compared to seven level, diode clamped and cascaded multi level inverters. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software.

Investigation of TTMC-SVPWM Strategies for Diode Clamped and Cascaded H-bridge Multi-level Inverter Fed Induction Motor Drive

This paper presents a concept of two types multilevel inverters such as diode clamped and cascaded H-bridge for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. This paer focused on the performance and analysis of a three phase seven level inverter including diode clamped and cascaded H-bridge based on new tripizodal triangular space vector PWM technique approaches. TTMC based modified Space vector Pulse width modulation technique so called tripizodal triangular Space vector Pulse width modulation (TTMC-SVPWM) technique. In this paper the reference sine wave generated as in case of conventional off set injected SVPWM technique. It is observed that the TTMC-Space vector pulse width modulation ensures excellent, close to optimized pulse distribution results and THD is compared to seven level, diode clamped and cascaded multi level inverters. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software.

Fuzzy Logic Control of Wind Turbine Storage System Connected to the Grid Using Multilevel Inverter

This paper aimed to evaluate the use of wind turbine storage systems to provide electricity in the electrical grid through a five-level inverter. The proposed system is composed of four wind turbine generators based on permanent magnet synchronous generator (PMSG), four battery storage systems connected to each capacitor of the DC link and a five level diode clamped inverter connected to the grid by three phase transformer. The control algorithm proposed is based on fuzzy logic to tracks and extract the maximum wind power by controlling the rotational speed of wind turbine, which is most appropriate when there is a lack of information on the characteristic Cp (λ,β) of the turbine. The system operator controls the power production of the four wind turbine generators by sending out reference power signals to each input side regulation unit, the input side regulation units regulate the voltage of each capacitor of the DC link, regulate the voltage and the state of charge of each battery storage system. The inverter is controlled by simplified space vector modulation which allows us to reduce the computational time and reduce the algorithm complexity compared to the conventional five levels space vector modulation, the grid side control level regulate the power and the current injected to the grid.

Artificial neural controller for torque ripple control and maximum power extraction for wind system driven by switched reluctance generator

Abstract Torque ripples and maximum power tracking form the most important problems facing Wind Energy Conversion System (WECS). This paper presents modified toque ripple minimization algorithm of four phases 8/6 poles Switched Reluctance Generator (SRG) using Artificial Neural Network (ANN) control. This control algorithm is based on optimum profiling of the generator phase currents during overlapping periods. The paper, also, introduces new Maximum Power Point Tracking (MPPT) for SRG by modifying the classical Hill Climb Searching (HCL) technique using ANN which is designed to emulate the PI controller for closed loop operation under different wind speeds. Moreover multi level diode clamped inverter is used for connecting SRG to the grid in order to reduce Total Harmonic Distortion (THD) to about 1.45% and reduce filter size. The simulation results show good agreement and support the feasibility of the proposed torque ripple minimization and MPPT techniques.

Direct Current Control for Grid-Connected Diode-Clamped Inverters

The accurate control of the line current, robust and dynamic behavior even under distorted grids and other system faults are the most important requirements for grid-connected inverters. Applying direct current control to multilevel inverters combines the advantages of both and is an enabling step towards improved inverter performance. Direct current controllers suffer from high complexity at increased level count, which is resolved by using geometrical principles and simple analytical calculations for switching vector selection within the space vector diagram. The simplified, novel parametric controller concept is scalable to inverters with arbitrary level count, which does not require any switching tables and the new fully symmetric setup guarantees equal switching frequencies among the three phases. The hypotheses are further confirmed on a real hardware test setup on the example of a three-level NPC inverter hardware and a Xilinx development platform. Experimental results prove the expected behavior of the direct current control under various conditions, which shows a general approach to balance the dc-link capacitors of diode-clamped inverters within the theoretical limits and demonstrates the benefits of using field programmable gate arrays as a controller platform.

Reduction of Common Mode Voltage in Three Level Diode Clamped Inverter

Reduction of Common Mode Voltage in Three Level Diode Clamped Inverter

A New Modeling and Control of a Five Level Three-Phase Diode Clamped Inverter with Self-Stabilization of the DC Link Voltage

In this paper, the direct modulation strategy of a three-level inverter with self stabilization of the DC link voltage is extended to a five-level inverter. Therefore, a new modeling and control strategy of a five-level three-phase Diode Clamped Inverter (DCI) is presented. The obtained modeling shows that modulated multilevel voltages are obtained by combination of eight different three-level functions, which are called modulation functions. Therefore, a space vector scheme without using a Park transform is explained. Based on this algorithm, the location of the reference voltage vector can be easily determined. Then, the voltage vectors are selected to generate corresponding levels and simultaneously their durations are calculated. Moreover, the redundancies of different switch configurations for the generation of intermediate voltages are used to limit the deviation of capacitor voltages. Simulation results for a five-level three-phase Diode Clamped Inverter are presented to show the good performance of the proposed balancing modulation.

Neutral‐point voltage deviation control for three‐level inverter‐based shunt active power filter with fuzzy‐based dwell time allocation

Three-level inverters have emerged as the main alternative to replace the use of standard two-level inverters in current harmonics mitigation. Neutral-point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral-point voltage deviation problems have always been the most troublesome features of NPC inverter. Hence, voltage balancing of DC-link capacitors is highly essential, where it is usually achieved through proper switching control. Space vector pulsewidth modulation is the most desirable switching scheme, where the voltage balancing control is mostly accomplished by decently allocating the dwell time for all the switching states. In this study, a fuzzy logic controller is incorporated to systematically control the dwell time allocation for all the switching states based on the instantaneous voltage of splitting DC-link capacitors. The proposed method is called the fuzzy-based dwell time allocation algorithm. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilising TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental results are presented, confirming effectiveness of the proposed algorithm in reducing the inherent voltage deviation problems of NPC inverter to a minimum level.

Hysteresis SVM for Coupled Inductor Z Source Diode Clamped 3-level Inverter based Grid Connected PV System

Due to its advantages such as it can defeat problems such as leakage current and insertion of DC in the grid and provides low stress on power devices, Diode clamped three-level inverter (DCTLI) is habitually used in transformerless photovoltaic (PV) connected to grid network. But it still has a problem of shoot-through which dwells in its legs, so its operation not reliable. Z source network is employed to permit operation without shoot through risk and improve its reliability. Coupled inductors are replace line transformers in to attain lower cost, reduced size, and improved its reliability and efficiency. Coupled inductor which avoids leakage current problem and losses. It employs coupled inductor z source diode clamped three level inverter (CI-Z-DC-TLI) to boost the voltage and further improve the reliability of the system by preventing the shoot through the problem. The proposed system assures that common-mode voltage and shoot-through risk is avoided. Moreover, controlling DC-TLI with Hysteresis SVM algorithm which improves output voltage and current control. Simulation and experimental results of this proposed system were analyzed using MATLAB environment and FPGA hardware.

Adaptive Space-Vector Hysteresis-Based Control with Constant Switching-Frequency for Three-Level Shunt Active Power Filters

This paper proposes a new constant-frequency space-vector hysteresis current control (CF-SVHCC) technique for three-level neutral-point diode-clamped (TL-NPC) inverters in shunt active power filter applications when applied to three-phase isolated neutral point (INP) systems. The proposed techniques is developed based on two recognized modulation methods, space-vector pulsewidth modulation and adaptive hysteresis-band current control. The proposed technique consists of two alternating adaptive hysteresis-band strategies around the error-current vector in the $$\alpha \beta $$ stationary reference frame (SRF). The first strategy is designed with the purpose of utilizing the medium- and large-voltage vectors of the TL-NPC inverter to keep the error-current vector within the adaptive hysteresis boundary, while the second one is designed according to the small-voltage vectors of the TL-NPC inverter to balance its neutral point voltage. The main part of this proposed technique is a supervisory controller that operates in SRF to effectively avoid inter-phase dependency. This smart controller systematically uses the zero-voltage vectors and the nonzero-voltage vectors associated with the alternating adaptive hysteresis-band strategies in order to prevent high switching frequency and maintain the switching frequency constant in INP systems, respectively. The proposed CF-SVHCC performance is validated by extensive simulation studies for both steady-state and transient conditions.

A Novel Six-Level Inverter Topology for Medium-Voltage Applications

In this paper, a novel topology of six-level inverters for a medium-voltage high-power applications is proposed, which consists of inner flying-capacitor inverter (FCI) units and outer two-level inverter units. The proposed topology can reduce the number of devices, components, and isolated sources compared with the existing ones in the case of the same number of output voltage steps, which result in a reduction of the size and weight of the inverters. Also, the total power loss of the proposed topology is lower than that of the diode-clamped inverter (DCI) and FCI. Besides, the estimated cost of the proposed topology is about 60.5% and 81.3% compared with the DCI and FCI, respectively. In addition, the modulation technique and the control strategy for the dc-link capacitor and flying-capacitor voltages are developed for the proposed topology. The effectiveness of the proposed six-level inverter for the medium-voltage applications has been verified by simulation results. Also, the feasibility of the proposed inverter has been proved by experimental results for the prototype at the laboratory.

Cascaded H-Bridge Five Level Inverter for Grid Connected PV System using PID Controller

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

Certain Investigation on Multilevel Inverters for Photovoltaic Grid Connected System

This paper presents a photovoltaic (PV) system to convert the solar energy into electrical energy. DC power from PV system is converted into AC power using multilevel inverters. Cascaded H-bridge (CHB) inverter and diode clamped inverter (DCI) are used to convert variable DC power into sinusoidal AC power. Harmonic content is the important part to improve the efficiency of the inverter. Harmonics of CHB inverter and DCI are simulated and analyzed with different pulse width modulation (PWM) techniques.