Abstract
At the high power switching circuit's applications, when the harmonic distortion is harmful, a multi-level diode clamped inverter is useful, especially when reduced total harmonic distortion and high power are desired. But when the levels get a rise, number of semiconductors are also rising, which leads to many problems such as increasing cost, losses, installation area, and total harmonic distortion. Many researchers have tried to find solutions to these problems. In this sense, this paper focuses on: a) build a new structure of five level diode clamped inverter. b) Increase the efficiency of the inverter by reducing the number of switches. c) Reduce the total harmonic distortion. The theoretical calculation and simulation results are performed for five level diode clamped inverter by MATLAB/ SIMULINK.
Highlights
A multi-level invertor was lunched in the seventies of the previous century
Multi-level inverters divided into three topologies, flying capacitors inverter (Kou, 2003), diode clamped inverter (Chen, 2006, Bender, 2006 and Cheng 2006), and cascade
Many research articles have found in the literature about the multi-level diode clamped inverter
Summary
A multi-level invertor was lunched in the seventies of the previous century. Using of multilevel invertor was limited to simple levels. H bridge inverter (Zhang, 2001, Watson, 2007, Malinowski, 2009) These three types commonly depend on the source of the voltages. Many research articles have found in the literature about the multi-level diode clamped inverter. The main reason for using multi-level inverters is to lower voltage compression on the switches, relegate of electromagnetic interference trouble, and reduce harmonics, and reduce losses (Rodriguez, 2002). The multi-level diode clamped inverter is frequently used in many applications because it provides a high efficiency for switching at the fundamental frequency. The main circuit of the n- level diode clamped inverter has [2(n-1)] switches, [(n-1)].
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