Current Transistor Research Articles

An Inversion-Coefficient Based Methodology for Optimizing the Performance of TIAs

ABSTRACT The transimpedance amplifier (TIA) can be found in several applications such as optical transceivers, biomedical circuits, and signal-processing circuits. In this paper, an investigation of two widely used transimpedance-amplifier configurations is presented. The two adopted configurations are the regulated cascode-based TIA (RGC-TIA) and the common-source based TIA (CS-TIA) with resistive feedback. These two configurations are studied in the following three inversion regimes; weak, moderate, and strong. A general model for the drain current of the MOSFET transistor, that is valid for all levels of inversion, is adopted. Through the study, the inversion coefficient (IC) of the amplifying device is systematically varied and its impact is investigated on various performance metrics such as gain, bandwidth, noise, distortion, and power consumption. Studying the inversion coefficient is crucial for precisely adjusting the amplifier biasing, thereby enabling the design of enhanced performance TIAs that effectively address the requirements of diverse applications. Compact-form expressions are derived for the performance metrics and compared with the simulation results. A figure of merit incorporating multiple performance metrics is proposed for performing a fair comparison for a wide range of the inversion coefficient. The simulation employs the 130-nm CMOS Predictive Technology Model (PTM) with a power-supply voltage, VDD , equal to 1.2 V.

Flexible p-Type WSe2 Transistors with Alumina Top-Gate Dielectric.

Tungsten diselenide (WSe2) field-effect transistors (FETs) are promising for emerging electronics because of their tunable polarity, enabling complementary transistor technology, and their suitability for flexible electronics through material transfer. In this work, we demonstrate flexible p-type WSe2 FETs with absolute drain currents |ID| up to 7 μA/μm. We achieve this by fabricating flexible top-gated FETs with a combined WSe2 and metal contact transfer approach using WSe2 grown by metal-organic chemical vapor deposition on sapphire. Despite moderate WSe2 crystal grain size, our devices show similar or higher |ID| and ID on/off ratio (∼105) compared to most devices with exfoliated single-crystal WSe2 from the literature. We analyze charge trapping in our devices using pulsed and bias stress measurements. Notably, the high |ID| values are preserved during pulsing, where charge trapping is minimized. Overall, we demonstrate a fabrication approach advantageous for high drain currents in flexible 2D transistors.

ZnO-based triboelectric nanogenerator and tribotronic transistor for tactile switch and displacement sensor applications

Tribotronics, the coupling of triboelectricity and semiconductors, is a novel field that has sparked much interest in the nanoelectronics and nanoenergy industries. This work presents the fabrication of a ZnO tribotronic transistor by combining a ZnO thin film transistor (ZnO-TFT) and a triboelectric nanogenerator (TENG) operating in vertical contact separation mode. A Si/SiO2/ZnO/Au structure was used to construct a bottom-gated ZnO-TFT. Radiofrequency (RF) magnetron sputtering was employed to deposit ZnO thin film, and the Au contact was achieved through thermal evaporation. A range of annealing temperatures was investigated, and ZnO TFT annealed at 500 °C exhibited a maximum electron mobility of 5.47 cm2/V s and a high on/off ratio of 105. We also investigated the photoresponse of this optimized ZnO-TFT using a UV LED. A vertical contact separation mode TENG was fabricated using ZnO (tribo-positive layer) and polyvinylidene difluoride (PVDF, tribo-negative layer) and combined with the ZnO TFT to fabricate a tribotronic transistor. The drain current of the tribotronic transistor dropped from 2.9 to 0.02 µA at a drain voltage of 5 V when the tribo layers were separated by 15 mm. Within the separation region of 2 mm, the device showed a 1.29 µA/mm change in drain current demonstrating its effectiveness in displacement sensing. Unlike conventional TFTs, the TENG's output could successfully control the tribotronic transistor's drain current and was innovative in such domains where conventional electrical components were constrained. Furthermore, this ZnO tribotronic device was used as an active smart tactile switch by simply touching or releasing the ZnO TENG with a finger.

Optical and Electrical Properties of AlGaN-Based High Electron Mobility Transistors and Photodetectors with AlGaN/AlN/GaN Channel-Stacking Structure.

High channel current of the high electron mobility transistors (HEMTs) and high relative responsivity of the photodetectors (PDs) were demonstrated in the AlGaN/AlN/GaN channel-stacking epitaxial structures. The interference properties of the X-ray curves indicated high-quality interfaces of the conductive channels. The AlGaN/AlN/GaN interfaces were observed clearly in the transmission electron microscope micrograph. The saturation I ds currents of the HEMT structures were increased by adding a number of channels. The conductive properties of the channel-stacking structures corresponded to the peaks of the transconductance (g m) spectra in the HEMT structures. The depletion-mode one- and two-channel HEMT structures can be operated at the cutoff region by increasing the reverse V gs bias voltages. Higher I ds current in the active state and lower current in the cutoff state were observed in the two-channel HEMT structure compared with one- and three-channel HEMT structures. For the channel-stacking metal-semiconductor-metal photodetector structures, the peak responsivity was observed at almost 300 nm incident monochromic light, which was increased by adding a number of channel layers. The channel current of the HEMT devices and the photocurrent in the PD devices were increased by adding a number of two-dimensional electron gas (2DEG) channels. By using a flat gate metal layer, the two-channel AlGaN/AlN/GaN HEMT structures exhibited a high I ds current, a low cutoff current, and a high peak g m value and have the potential for GaN-based power devices, fast portable chargers, and ultraviolet PD applications.

A novel ballistic model for the subthreshold behavior of nanosheet transistors

A novel ballistic model for the subthreshold current of nanosheet transistors is successfully developed based on the Landauer approach with the three-dimensional number of channels. The ballistic threshold voltage can also be achieved through the calculated free charge density induced by the three-dimensional density-of-states equal to the substrate doping concentration. It indicates that under the low drain voltage corresponding to the Fermi distribution function, the subthreshold current is mainly governed by the low contact potential. However, under the high drain voltage corresponding to the Fermi distribution function, the thermal voltage, instead of the contact potential between the source and drain, initiates the subthreshold current. Besides subthreshold current and threshold voltage, the ballistic conductance and subthreshold swing are also revealed in the subthreshold conduction. It indicates that the thin silicon, thin gate oxide, heavy substrate doping density, and high work function will alleviate the ballistic effects, decrease the subthreshold current/swing, and increase the threshold voltage/ballistic resistance.

Role of tin clustering in band structure and thermodynamic stability of GeSn by atomistic modeling

Synthesis of device-quality GeSn materials with higher Sn compositions is hindered by various factors, such as Sn segregation, clustering, and short-range ordering effects. In the present work, the impact of the clustering of Sn atoms in a GeSn semiconductor alloy was studied by density functional theory using SG15 pseudopotentials in a Synopsys QuantumATK tool, where the thermodynamic stability, effective band structure, indirect and direct bandgaps, and density of states (DOS) were computed to highlight the difference between a cluster-free random GeSn alloy and a GeSn alloy with Sn–Sn clusters. A 54-atom bulk Ge1–xSnx (x = 3.71%–27.77%) supercell was constructed with cluster-free and a first nearest neighbor Sn–Sn clustered GeSn alloy at each composition for this work. Computation using the generalized gradient approximation exchange-correlation functional showed that the thermodynamic stability of GeSn was reduced due to the clustering of Sn, which increased the formation energy of the GeSn alloys by increasing the Hartree potential energy and exchange-correlation energy. Moreover, with the effective band structure of the GeSn material at a Sn composition of ∼22%, both direct (Eg,Γ) and indirect (Eg,L) bandgaps decreased by a large margin of 40.76 and 120.17 meV, respectively, due to Sn–Sn clustering. On the other hand, Eg,Γ and Eg,L decrease is limited to 0.5 and 12.8 meV, respectively, for Sn composition of ∼5.6%. Similar impacts were observed on DOS, in an independent computation without deducing from the electronic band structure, where the width of the forbidden band reduces due to the clustering of Sn atoms in GeSn. Moreover, using the energy bandgaps of GeSn computed with the assumption of it being a random alloy having well-dispersed Sn atoms needs revision by incorporating clustering to align with the experimentally determined bandgap. This necessitates incorporating the effect of Sn atoms clustered together at varying distributions based on experimental characterization techniques such as atom probe tomography or extended x-ray absorption fine structure to substantiate the energy bandgap of the GeSn alloy at a particular composition with precision. Hence, considering the effect of Sn clusters during material characterization, beginning with the accurate energy bandgap characterization of GeSn would help in mitigating the effect of process variations on the performance characteristics of GeSn-based group IV electronic and photonic devices such as varying leakage currents in transistors and photodiodes as well as the deviation from the targeted wavelength of operation in lasers and photodetectors.

Influence of RF power in the sputter deposition of amorphous InGaZnO film on the transient drain current of amorphous InGaZnO thin-film transistors

The device electrical and transient current characteristics of the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) are comprehensively investigated according to the radio-frequency (RF) power during the sputter-deposition of IGZO active film. The RF power dependencies of the oxygen vacancy (VO) concentration in IGZO and the surface morphology of IGZO film are analyzed through X-ray photoelectron spectroscopy (XPS) and atomic force microscope (AFM). According to the RF power change in the range of 100 ∼ 250 W, the optimal point in terms of threshold voltage (VT), ON current (Ion), field-effect mobility in the linear region (μFE_lin), hysteresis voltage (VHys), and the VT shift under current stress (ΔVT) is found to be 200 W. The existence of the optimal power condition originates from the RF-power dependencies of the electron carrier concentration, the density of electron traps in gate insulator (GI), and the interface trap density related to surface roughness.Furthermore, compared to the direct current (DC) current stress (CS) condition, it is found that when VGS rises rapidly, a total transient current ΔID can be decomposed into three components, i.e., ΔIOS, ΔIBOOST, ΔIDEG. While ΔIOS is attributed to the non-quasi static Fermi-level rising, ΔIBOOST and ΔIDEG result from the donor creation in IGZO and the electron trapping into GI and interface. Noticeably, the occurrence level of each component changes sensitively according to RF power.Our result suggests that the 200 W device has the least overshoot of transient current and shows the best reliability in terms of deterioration due to transient current characteristics.

Physics-based compact current model for schottky barrier transistors at deep cryogenic temperatures including band tail effects and quantum oscillations

This paper presents a compact model for the DC current of Schottky barrier field-effect transistors at deep cryogenic temperatures, close to absolute zero kelvin. The proposed model is physics based and calculates the injection current over a device’s Schottky barriers, by considering physical effects at these temperatures (e.g. quantum oscillations, band tail effect, phonon-assisted tunneling, etc.). For model verification, it is compared to measurements performed on nanowire Schottky barrier transistors at a temperature of 5.5K.

The interfacial properties of 2D metal-monolayer blue phosphorene heterojunctions and transport properties of their field-effect transistors

Monolayer blue phosphorene (BlueP) has attracted much interest as a potential channel material in electronic devices. Searching for suitable two-dimensional (2D) metal materials to use as electrodes is critical to fabricating high-performance nanoscale channel BlueP-based field effect transistors (FETs). In this paper, we adopted first-principles calculations to explore binding energies, phonon calculations and electronic structures of 2D metal-BlueP heterojunctions, including Ti3C2-, NbTe2-, Ga(110)- and NbS2-BlueP, and thermal stability of Ti3C2-BlueP heterojunction at room temperature. We also used density functional theory coupled with the nonequilibrium Green function method to investigate the transport properties of sub-5 nm BlueP-based FETs with Ti3C2-BlueP electrodes. Our calculated results indicate that Ti3C2-BlueP has excellent thermal stability and may be used as a candidate electrode material for BlueP-based FETs. The double-gate can more effectively improve the device performance compared with the single-gate. The estimated source leakage current of sub-5 nm transistors reaches up to 369 µA µm−1, which is expected to meet the requirements of the international technology roadmap for semiconductors for LP (low-power) devices. Our results imply that 2D Ti3C2 may act as an appropriate electrode material for LP BlueP-based FETs, thus providing guidance for the design of future short-gate-length BlueP-based FETs.

Performance improvement of α-6T thin film sensors based on F16CuPc buffer layer

A F16CuPc buffer layer is proposed to be added to improve the performance of the sensors. The change of relative responsivity of sensors with and without buffer layer was investigated. The relative responsivity of sensors with buffer layer reached 448.32 % from the off-state current of transistors under 20 ppm NO2 gas. The result was 51.45 % higher than that of the sensors without buffer layer. The sensitivity for NO2 gas reaches 2087.92 %/ppm, which is 25.80 % higher than the sensors without buffer layer. The addition of buffer layer is beneficial for the transmission of charge carriers. Therefore, it is possible to obtain highly responsive sensors, which provide a feasible solution for the study of high-performance organic thin film sensors.

A novel CMOS active inductor with high quality factor, high linearity and mutually independent tuning of inductance and quality factor

A novel CMOS active inductor (CAI) circuit topology is proposed. It consists of two identical gyrators, a voltage-controlled negative resistance cell (VCNRC) and a voltage-controlled current source (VCCS). And each gyrator is composed of a feedforward transistor, a feedback transistor, a cascaded transistor, a common-source (CS) transistor, and a feedback resistor. Moreover, these two gyrators are symmetric and form a differential structure. By above building blocks configuration and cooperation, the CAI can achieve following different performances. First, high quality factor (Q) can be achieved by a combination of the VCNRC, the cascaded transistors and the feedback resistors due to the decrease in the equivalent resistance losses; Secondly, high linearity can be realized by the additional CS transistors due to the compensation for the nonlinear drain current of the feedback transistors. Thirdly, mutually independent tuning of inductance (LCAI) and Q can be achieved by tuning three external bias voltage terminals respectively configured in the cascaded transistors, the VCNRC and the VCCS. The verification results show that at the frequency of 2.0 GHz, the peak Q can be tuned from 555 to 2780 with a large tuning range of 400.9 %, while the LCAI can be maintained within a small variation of only 0.9 %; on the other hand, LCAI at 2.0 GHz can also be tuned from 158 nH to 212 nH while the Q value has a variation of only 4.2 %; moreover, the CAI also is demonstrated to have inductance linearity as high as +0.17 dBm, and occupies a compact effective area of 43 μm × 52 μm. In addition, the output noise voltage at 2 GHz is 3.1 nV/√Hz, and both LCAI and Q values also exhibit good robustness against process corner and temperature variations. These comprehensive results highlight the CAI excellent performances in terms of size, Q value, linearity, mutually tunability of LCAI and Q, noise performance as well as the robustness against process and temperature variations.

Design of High I on/I off Fin-Statistic Induction Transistor Based on Gallium Nitride

Aiming at the problems of poor current control and high gate leakage current of traditional static induction transistors, we designed a new structure of GaN-based static induction transistor (SIT) using TCAD software. The SIT uses a new type of fin channel and a high-work function gate metal. In addition, this work simulates the electrical properties of different structure SIT and explores the influence of the channel shape on the channel barrier voltage. According to the simulation results, the GaN SIT has the following properties: high breakdown voltage (BV=830V), strong current control capability (switch current ratio I on/I off=1×1014), high turn-on current density, and low device conduction loss.

Fluorination-mitigated high-current degradation of amorphous InGaZnO thin-film transistors

As growing applications demand higher driving currents of oxide semiconductor thin-film transistors (TFTs), severe instabilities and even hard breakdown under high-current stress (HCS) become critical challenges. In this work, the triggering voltage of HCS-induced self-heating (SH) degradation is defined in the output characteristics of amorphous indium-gallium-zinc oxide (a-IGZO) TFTs, and used to quantitatively evaluate the thermal generation process of channel donor defects. The fluorinated a-IGZO (a-IGZO:F) was adopted to effectively retard the triggering of the self-heating (SH) effect, and was supposed to originate from the less population of initial deep-state defects and a slower rate of thermal defect transition in a-IGZO:F. The proposed scheme noticeably enhances the high-current applications of oxide TFTs.

Transverse currents in spin transistors

In many systems, planar Hall effect wherein transverse signal appears in response to longitudinal stimulus is rooted in spin–orbit coupling (SOC). A spin transistor put forward by Datta and Das on the other hand consists of ferromagnetic leads connected to SOC central region and its conductance can be controlled by tuning the strength of SOC. We find that transverse currents also appear in Datta–Das transistors made by connecting two two-dimensional ferromagnetic reservoirs to a central SOC two-dimensional electron gas. We find that the spin transistor exhibits a nonzero transverse conductivity which depends on the direction of polarization in ferromagnets and the location where it is measured. We study the conductivities for the system with finite and infinite widths. The conductivities exhibit Fabry–Pérot type oscillations as the length of the SOC regions is varied. Interestingly, even in the limit when longitudinal conductivity is made zero by cutting off the junction between the central SOC region and the ferromagnetic lead on one side (right), the transverse conductivities remain nonzero in the regions that are on the left side of the cut-off junction.

Combined experimental and theoretical investigation on SONOS pFLASH switch

In this paper, a new push–pull pFLASH switch is designed and fabricated based on a 110 nm eFLASH process, which includes two 2 T-pFLASH transistors and one signal transmission transistor. The pFLASH transistors are programmed and erased by band-to-band tunneling-induced hot electron and Fowler–Nordheim tunneling to realize its ‘on/off’ function, and the current of the signal transmission transistor can be effectively tuned by the drain voltage of the 2 T-pFLASH. In order to clarify the degradation mechanism of the electronic properties, first principles calculations are performed from the atomic scale. Nitrogen vacancies have been proven to play a crucial role in nitrides. In addition, the effects of vacancies on the charge retention are investigated in terms of electronic structure. The nitrogen vacancies have proven to be detrimental to the electron storage by the simulated localization energies. Therefore, this study will provide a newly designed field-programmable gate array configuration unit, whose electrical mechanisms are revealed by theoretical simulations, which can also become the design foundation for future FLASH switches.

Experimental method for determining the supply current of a PMOS power transistor for use as a RADFET dosimeter

Radiation Sensitive MOSFETs (RADFETs) have been commonly used as ionizing radiation dosimeters. The threshold voltage variation is the main transistor parameter used for radiation dosimetry, as this voltage variation is directly related to total dose and it can be easily determined by using simple measurement and biasing circuits. In this work it is presented a novel experimental method to determine the optimal drain-source current value to be supplied to a p-type MOSFET used in a traditional RADFET configuration (diode connected transistor) for monitoring of the accumulated X- and gamma-radiation dose. Experimental results from irradiations with 60Co gamma-rays and comparison measurements with semiconductor analyzer indicate that lower supply current values result in more precise dose measurement results.

Improved noise performance from the next-generation buried-channel p-MOSFET SiSeROs

The Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. In our earlier work, we characterized a number of first prototype SiSeROs with the MOSFET transistor channels at the surface layer. An equivalent noise charge (ENC) of around 15 electrons root mean square (RMS) was obtained. In this work, we examine the first buried-channel SiSeRO. We have achieved substantially improved noise performance of around 4.5 electrons root mean square (RMS) and a full width half maximum (FWHM) energy resolution of 132 eV at 5.9 keV, for a readout speed of 625 kpixel/s. We also discuss how digital filtering techniques can be used to further improve the SiSeRO noise performance. Additional measurements and device simulations will be essential to further mature the SiSeRO technology. This new device class presents an exciting new technology for the next-generation astronomical X-ray telescopes requiring fast, low-noise, radiation-hard megapixel imagers with moderate spectroscopic resolution.

A low‐power NPN‐based band‐gap voltage reference in an ultra‐wide temperature range

AbstractA low‐power negative‐positive‐negative (NPN)‐based bandgap voltage reference (BGR) over an ultra‐wide temperature range is presented. The conventional NPN‐based BGRs cannot maintain a low‐temperature coefficient (TC) with low power consumption in an ultra‐wide temperature range due to its inherent reverse junction saturation current of NPN bipolar junction transistors (BJT) in the high‐temperature range. This work introduces a new NPN‐based BGR unaffected by such saturation current. Based on Vanguard International Semiconductor Corporation (VIS) 0.18 μm/0.15 μm complementary metal oxide semiconductor (CMOS) Bipolar‐CMOS‐DMOS (BCD) process, the BGR receives the best 1.25‐mV deviation over the temperature range of −40°C to 150°C, much less than 38.5 mV from Brokaw‐type BGR. Meanwhile, the proposed BGR with the stacked NPNs for higher output voltage was fabricated. It consumes about 2 uA from a 5‐V power supply, and its average temperature coefficient is 14.89 ppm/°C. Also, the average line sensitivity is 0.039%/V.

Upconversion optogenetics-driven biohybrid sensor for infrared sensing and imaging.

Living organisms are far superior to state-of-the-art devices in visual perception as they have evolved a wide number of capabilities that encompass our most advanced technologies. By leveraging the performance of living organisms and directly interfacing them with artificial components, it can use the intricacy and metabolic efficiency of biological visual sensing within artificial machines. Inspired by the molecular basis (transient receptor potential, TRP) for infrared detection of pit-bearing organisms, we propose a TRP-like biohybrid sensor by integrating upconversion nanoparticles (UCNP) and optogenetically engineered cells on a graphene transistor for infrared sensing and imaging. The UCNP converts infrared light irradiation into blue light, the blue light activates the cells expressed with channelrhodopsin-2 (ChR2) and induces transmembrane photocurrent, and the photocurrent is detected by a biocompatible graphene transistor. Stepwise and overall experimental results show that, upon infrared light irradiation, the UCNP can rapidly mediate cellular photocurrents, which further translates into the extra output current of the graphene transistor. More notably, the response speed of the biohybrid sensor is 1∼3 orders of magnitude faster than those of TRPs heterologously expressed in cell lines in the literature, which confirms the response time advantage of the combination of UCNP and ChR2 within the sensor in place of TRPs. The biohybrid sensor can successfully image infrared targets, proving the feasibility of developing bionic infrared sensing devices by biohybrid integration of nonliving nanomaterials and biological components. This work opens up an avenue for biohybrid sensors to develop the bionic infrared vision that promisingly reproduces the functional superiority of natural organisms. STATEMENT OF SIGNIFICANCE: Infrared sensing and imaging have a wide range of military and civilian applications. Organisms have evolved excellent infrared vision with the molecular basis, transient receptor potential (TRP), and the performance is superior to existing state-of-the-art infrared devices. Inspired by this, a TRP-like biohybrid sensor based on upconversion optogenetics and a 2D material-based device is developed for infrared sensing and imaging. The biohybrid sensor has a relatively fast response speed that is 1∼3 orders of magnitude faster than that of the heterologously expressed TRPs, which enables its capability of infrared imaging with a single pixel-based method. This work broadens the spectrum of biohybrid sensing based on engineered cells to infrared, advancing the process of reproducing the excellent infrared detection of organisms.

Novel High-Speed Ternary Logic Using Step-Shaped Threshold Switch

We presented the ternary logic using a threshold switch (TS) that enabled faster operation than the existing ternary concept and quantitatively compared it to binary logic in a 5-nm node. TS-ternary inverter shows comparable power and performance to the binary inverter in low to high (high to low) operations. Operations passing through the middle state show large delays but still show the fastest speed among existing ternary concepts. Further, our TS-ternary can be applied to various logic applications, and the noise margin can be optimized by adjusting the threshold voltage of the transistor ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{T,TR}$ </tex-math></inline-formula> ) and threshold current of TS ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{I}_{T}$ </tex-math></inline-formula> ). Moreover, the ternary layout requires a slightly larger area, but the system complexity is reduced to 71.0% compared with binary. Overall, TS-ternary logic is a promising candidate as a future ternary concept, having fast speed, high density, and applicability to diverse logic applications.