Crosstalk Voltage Research Articles

Analytical expressions for noise and crosstalk voltages of the High Energy Silicon Particle Detector

The paper presents design and implementation of a silicon particle detector array with the derived closed form equations of signal-to-noise ratio (SNR) and crosstalk voltages. The noise analysis demonstrates the effect of interpixel capacitances (IPC) between center pixel (where particle hits) and its neighbouring pixels, resulting as a capacitive crosstalk. The pixel array has been designed and simulated in a 180 nm BCD technology of STMicroelectronics. The technology uses the supply voltage (VDD) of 1.8 V and the substrate potential of −50 V. The area of unit pixel is 250×50 μm2 with the substrate resistivity of 125 Ωcm and the depletion depth of 30 μm. The mathematical model includes the effects of various types of noise viz. the shot noise, flicker noise, thermal noise and the capacitive crosstalk. This work compares the results of noise and crosstalk analysis from the proposed mathematical model with the circuit simulation results for a given simulation environment. The results show excellent agreement with the circuit simulations and the mathematical model. The average relative error (AVR) generated for the noise spectral densities with respect to the simulations and the model is 12% whereas the comparison gives the errors of 3% and 11.5% for the crosstalk voltages and the SNR results respectively.

Transient Analysis of Through-Silicon Vias in Floating Silicon Substrate

For through-silicon vias (TSVs) in a floating silicon substrate, electric fields from signal TSVs terminate at ground TSVs instead of the substrate. The MOS capacitance of TSVs in a floating silicon substrate is quite different from that of TSVs in a well-grounded silicon substrate. Therefore, it is essential to perform transient analysis of such TSVs to facilitate designs and applications of 2.5-D and 3-D ICs. This paper presents a systematic study of time-domain responses of TSVs in a floating silicon substrate. Impacts of the floating substrate and the temperature are considered and investigated thoroughly. The equivalent circuit models are developed and applied to predict the signal propagation. The crosstalk voltages among TSVs are accurately captured and compared for different oxide charges and temperatures.

Fabrication of Optical Modulator Based on Proton Exchange

<p>For the investigation of optical modulator, the optical wave-guide was fabricated on x-cut LiNbO<sub>3</sub> substrate using proton exchange method with self-aligned electrode. The electrode pattern was designed using a self-aligned thin film electrode method. After proton exchange process, the wave-guide could be prepared by annealing process to control the width and depth of the optical wave-guide. The initial crossover state of the fabricated 1´2 optical switch was observed with controlling the annealing process variables and the structure of self-aligned thin film electrodes. As the results in the present work, the measured cross talk and minimum detectable switching voltage were obtained at the values of -29.5dB and 8.0V, respectively, with good merits.</p>

New differential-mode-source cable bundle crosstalk model based on multiconductor transmission lines theory

The traditional cable bundle crosstalk model is established based on an intra-system common mode source, without considering the crosstalk of cable bundles stimulated by a differential-mode source between different systems. To solve the physical problem of crosstalk between independent circuit cable bundles which is stimulated by a differential-mode source, in this article we propose a new differential-mode source cable bundle crosstalk calculation method based on the multiconductor transmission line theory. According to the mechanism of the differential-mode-stimulated transmission line coupling, using this method we obtain a new three-conductor transmission line parasitic parameter circuit model and mathematic matrix model through using the transmission line propagating transverse electro magnetic mode. We deduce the parasitic parameter calculation formula by an image method and Neumann formula, and then obtain the new cable bundle crosstalk chain parameter array equations in frequency domain. By using the top and end boundary conditions of the new differential-mode cable bundle crosstalk model, we finally work out the crosstalk voltage in frequency domain. In this article, we take the crosstalk between differential-mode parallel double culprit cables and the victim cable from other independent circuit for example. By simulating the crosstalk voltage of victim cable in different position arrangements, we obtain the crosstalk physical law between cable bundles under the differential-mode source condition, that is, the crosstalk of the victim cable located between differential-mode circuits is much larger than that situated outside the differential-mode circuit. We can also verify that this model can be used to calculate the crosstalk caused by differential-mode source at different frequencies. In this article, we analytically calculate the crosstalk problems caused by differential-mode source cable bundles for the first time, which provides theoretical basis for solving some practical electromagnetic compatibility problems such as the bundling of a large quantity of wires and the predicting of cable bundle crosstalk. Therefore it perfects the application of multiconductor transmission line model to cable bundle crosstalk problem, and has strong guiding significance.

Comparative Study of Crosstalk Reduction Techniques in RF Printed Circuit Board Using FDTD Method

Miniaturization of the feature size in modern electronic circuits results from placing interconnections in close proximity with a high packing density. As a result, coupling between the adjacent lines has increased significantly, causing crosstalk to become an important concern in high-performance circuit design. In certain applications, microstriplines may be used in printed circuit boards for propagating high-speed signals, rather than striplines. Here, the electromagnetic coupling effects are analyzed for various microstrip transmission line structures, namely, microstriplines with a guard trace, double stub microstriplines, and parallel serpentine microstriplines using the finite-difference time-domain method. The numerical results are compared with simulation results, where the variants are simulated using an Ansoft high-frequency structure simulator. The analysis and simulation results are experimentally validated by fabricating a prototype and establishing a good correspondence between them. Numerical results are compared with simulation and experimental results, showing that double stub microstriplines reduce the far end crosstalk by 7 dB and increase the near end crosstalk by about 2 dB compared with the parallel microstriplines. Parallel serpentine microstriplines reduce the far end crosstalk by more than 10 dB and also reduce more than 15 mV of peak far end crosstalk voltage, compared with parallel microstriplines.

An Accurate FDTD Model for Crosstalk Analysis of CMOS-Gate-Driven Coupled RLC Interconnects

This paper accurately models the crosstalk effects in a CMOS-gate-driven coupled RLC interconnects using the nth power law model and finite-difference time-domain (FDTD) technique. The propagation delay, peak crosstalk voltage, and peak voltage timing on victim line of coupled-multiple lines are observed and compared to HSPICE simulation results for the global interconnect length at 32 nm technology node. The numerical results illustrate that the proposed model accurately estimates the performance parameters of driver interconnect load system. An average error of less than 2% is observed in estimation of peak crosstalk voltage and its timing. The proposed model can be extended for coupled n lines and useful for the evaluation of signal integrity, issues of EMI, and EMC of on-chip interconnects.

Horizontal Growth and Electrical-Crosstalk Simulation of CNT Interconnection

The impact of time on the horizontal growth of carbon nanotubes with Fe catalyst is investigated at 600℃ for fabricating interconnects. The carbon nanotubes prepared using Fe catalyst was found to have small diameters, long lengths and high density. Resistivity of the horizontal carbon nanotube interconnect structures were found to be 2.79 Ω•cm. We also studied crosstalk using different lengths of multi-walled carbon nanotubes. Through the analysis of the basic parameters of carbon nanotubes, we establish a distribution model and a three-line structure of parallel multi-walled carbon nanotubes interconnects to analyze the impact of crosstalk between the interconnect line. Simulation was used to study the crosstalk behavior which was found to increase with respect to the length of the multi-walled carbon nanotubes and the crosstalk voltage decreased with the increase in radius. However, the thickness of the oxide layer or medium had little effect on the carbon nanotube interconnects.

Pseudo-balanced Signaling Using Power Transmission Lines for Parallel I/O Links

The performance of a system depends heavily on the communication speed between integrated circuits. Single-ended signaling is widely used for memory interface, but it suffers from simultaneous switching noise, crosstalk, and reference voltage noise. Even with other signaling schemes that remedy the shortcomings of the singled-ended signaling, there still is a limitation in terms of noise reduction due to the power delivery network (PDN). These include techniques such as differential signaling. The disruption between the power and ground planes based on the low target impedance concept induces return path discontinuities during the data transitions, which create displacement current sources between the power and ground planes. These sources induce excessive power supply noise which can only be reduced by increasing the capacitance requirements. The new PDN design proposed in this paper using power transmission lines (PTLs) enables both power and signal transmission lines to be referenced to the same ground plane so that a continuous current path can be formed. A modified balanced signaling scheme is applied to PTL, and called as pseudo-balanced PTL (PBPTL). The PBPTL scheme reduces the overhead caused by the conventional balanced signaling scheme and addresses the issues associated with PTL. Extensive simulations and measurements are shown using the PTL approach to demonstrate the enhanced signal integrity as compared to the currently practiced approaches.

A serious problem in using the Jarvis model for the prediction of crosstalk

The coupled transmission-line equations for a three-conductor, lossless transmission line are solved in symbolic form for its crosstalk voltages using various approximations [1, 2]. The most frequently-used approximate model for predicting crosstalk is referred to as the Jarvis model after its original publisher in 1963 [3]. The Jarvis model uses three approximations that simplify the result. One of the approximations requires that all four line terminations be matched which is unrealistic for virtually all crosstalk problems.

Modeling of Crosstalk Effects in Multiwall Carbon Nanotube Interconnects

Crosstalk effects in multiwall carbon nanotube (MWCNT) interconnects for future ICs are investigated by virtue of the equivalent single conductor model and the finite-difference time-domain solution of transmission line equations. The worst case time delay and the peak crosstalk voltage on victim wire of multiwire MWCNT interconnect configurations are derived and compared to those of the copper (Cu) wire counterparts for the intermediate and global interconnects at the 22- and 14-nm technology nodes. The numerical results illustrate that the crosstalk-induced time delays in the MWCNT interconnects are much smaller than those in the Cu interconnects, in particular, for longer wires. Nevertheless, the MWCNT interconnects exhibit little improvement on the crosstalk-induced noises in comparison with their Cu counterparts.

Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces

Serpentine microstrip lines are proposed to eliminate the far-end crosstalk in parallel high-speed interfaces by increasing the capacitive coupling ratio to equal the inductive coupling ratio. Zero far-end crosstalk voltage waveform and zero crosstalk-induced jitter (CIJ) were achieved on an FR4 printed circuit board, by adjusting the unit section length of the serpentine structure. Application of the proposed serpentine microstrip lines to the 2-drop stub series terminated logic DRAM channel increased the maximum data rate from 0.9 to 1.4 Gb/s and reduced CIJ by ~ 78 ps at 3.3 Gb/s.

A novel interconnect crosstalk RLC analytic model based on the nanometer CMOS technology

Based on the nanometer CMOS technology, a novel parallel RLC coupling interconnect analytic model is presented. Based on the function approach and reduced order techniques, an analyzable expression for the outlying terminal of the disturbed line is derived by the model in the off-angle step input signal. In the 90 nm and 65 nm CMOS process, the proposed RLC coupling interconnect analytic model enables to estimate the crosstalk voltage within 4% errors compared with Hspice simulation for various interconnect coupling size. The proposed analytic model can be applied to the design of nanometer SOC and optimizing the design for VLSIs.

Reduction of Transient Far-End Crosstalk Voltage and Jitter in DIMM Connectors for DRAM Interface

The transient far-end crosstalk voltage and the crosstalk-induced jitter of dual in-line memory module (DIMM) connectors are reduced by about 80% by increasing the mutual capacitance between DIMM connector pins with the additional interdigitated-comb-shaped metal-stub patterns on the motherboard. It was confirmed by the far-end crosstalk voltage waveform measurements using TDR and the eye diagram measurements at the data rates of 15 Mbps, 100 Mbps, and 3 Gbps. This reduction technique can be applied to the connectors where the inductive coupling ratio is larger than the capacitive coupling ratio.

A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel Microstrip Lines

A serpentine guard trace is proposed to reduce the peak far-end crosstalk voltage and the crosstalk induced timing jitter of parallel microstrip lines on printed circuit boards. The vertical sections of the serpentine guard increase the mutual capacitance without much changing the mutual inductance between the aggressor and victim lines. This reduces the difference between the capacitive and inductive couplings and hence the far-end crosstalk. Comparison with the no guard, the conventional guard, and the via-stitch guard shows that the serpentine guard gives the smallest values in both the peak far-end crosstalk voltage and the timing jitter. The time domain reflectometer (TDR) measurement shows that the peak far-end crosstalk voltage of serpentine guard is reduced to 44% of that of no guard. The eye diagram measurement of pseudo random binary sequence (PRBS) data shows that the timing jitter is also reduced to 40% of that of no guard.

ANALYSIS OF CAPACITANCE ACROSS INTERCONNECTS OF LOW-K DIELECTRIC USED IN A DEEP SUB-MICRON CMOS TECHNOLOGY

The paper presents the detailed analysis of the intercon- nect capacitance, crosstalk time and peak crosstalk voltage. The de- pendency of the couple capacitance and fringe capacitance on the in- terconnect layer dimensions affects significantly to the interconnect ca- pacitance. The peak crosstalk time obtained to be 13 femtoseconds for 9.6 femtoseconds of propagation delay, while the maximum crosstalk voltage obtained to be 178 mV.

Extraction of LRGC Matrices for 8-Coupled Uniform Lossy Transmission Lines Using 2-Port VNA Measurements

The electrical parameters (8 × 8 LRGC matrices) of 8-coupled uniform lossy transmission lines were extracted from 40 S-parameter values measured by using 2-port VNA measurements, where all the ports other than 2 VNA ports were terminated by 50 ohm chip resistors. It was assumed in the extraction step that the transmission lines are weakly-coupled, and that the resistance values of all the termination chip resistors are exactly 50 ohms with the second reflections neglected. Comparison of the extracted LRGC matrix components with those from a commercial 3D field solver revealed on average and a maximum relative difference of 2.45% and 7.66%, respectively. In addition, the time-domain crosstalk voltage waveforms in the measured data and those in the SPICE simulation results using the extracted LRGC parameters agreed very well with the average difference and the maximum relative difference in peak crosstalk voltages of 4.15% and 9.68%, respectively.

The crosstalk characteristics of different PCB layouts with multiconductor transmission line

AbstractA simple method of moment numerical scheme is adopted to study the crosstalk characteristics of printed circuit board. Both strip lines and microstrips PCB configurations are investigated. The results indicate that with the ground plane closer to the signal line, the crosstalk voltages can be reduced. Furthermore, the non‐synchronization due to difference in mode velocities can also be reduced. Copyright © 2004 John Wiley & Sons, Ltd.

Square-wave propagation along coupled coplanar transmission line

Results of modelling square-wave propagation along coupled coplanar transmission line with grounded centre strip conductor are presented. Improved agreement between numerical and experimental data for the near- and far-end crosstalk voltages has confirmed practical significance of inclusion of multimode propagation in non-ideally grounded coplanar lines.

Characterisation of crosstalk in terms of mean value and standard deviation

A probabilistic model is developed for the characterisation of crosstalk sensitivity to random fluctuations of conductors in a bundle cross-section. A uniform and lossless three-conductor transmission line (TL) is used for the definition of generator and victim circuits, with general loading conditions. A novel circuit model for crosstalk is developed, in which the victim circuit embeds all the interference effects due to the presence of the generator circuit. Such effects are represented by a voltage and a current lumped noise-source and a distributed-parameter passive two-port. Under the weak-coupling assumption, and by assuming random fluctuations of the generator wire in the TL cross-section, closed-form expressions for the mean value and variance of crosstalk voltages are derived, valid both at low-frequencies and in the TL standing-wave region. These closed-form crosstalk estimators extend previous results, limited to electrically short TLs. All the theoretical developments are checked via a numerical repeated-run analysis.

Inductance effect in crosstalk prediction

Rapid progress in integrated circuit technology has led to an increase in switching speeds of digital circuits. This increase is the primary reason why inductance noise causes chips to fail. As a result, there is a growing interest in the inductance associated with on-chip signal lines. In this paper, we present the electromagnetic analysis we have followed in order to determine the accurate values of the R,L,C,G equivalent parameters from which a set of multiple coupled transmission lines could be modeled. We then determine the most critical parameters which make the inductance effect important and we propose a new analytical expression to accurately evaluate the crosstalk voltage.