Common-mode Voltage Suppression Research Articles

Simplified Reactive Torque Model Predictive Control of Induction Motor with Common Mode Voltage Suppression

Simplified Reactive Torque Model Predictive Control of Induction Motor with Common Mode Voltage Suppression

A boost converter-based CSI-fed PMSM drives with common-mode voltage suppression for low-input voltage application

A boost converter-based CSI-fed PMSM drives with common-mode voltage suppression for low-input voltage application

Common-Mode Voltage Suppression of a Five-Level Converter Based on Multimode Characteristics of Selective Harmonic Elimination PWM

The combination of five-level converters with selective harmonic elimination pulse-width modulation (SHEPWM) is a practical need in medium-voltage, high-power applications. However, how to suppress the common-mode voltage (CMV) in this case becomes a difficult problem. Although CMV suppression under high switching frequency (SF) modulations and three-level SHEPWM has been discussed in many studies, these methods are not applicable to five-level SHEPWM. This is partly because the zero-sequence voltage under SHEPWM is difficult to adjust and partly because the solution spaces of three- and five-level SHEPWM are completely different. Moreover, conventional CMV suppression in three-level SHEPWM must sacrifice the switching angles to control the zero-sequence voltage, which makes the equivalent SF increase. Therefore, in this article, we propose a novel CMV suppression method that effectively utilizes the multimode characteristics of five-level SHEPWM. Multimode characteristics refers to the output waveform containing different levels of jump patterns. Therefore, there are a large number of switching angle trajectories in five-level SHEPWM, which outputs the same fundamental voltage with different CMVs. The proposed method uses the special multimode characteristics to reduce the CMV without sacrificing the switching angles. Its effectiveness and feasibility are verified by experiments.

Circulating Current Reduction for Parallel-Connected Modular Inverters Based on Suppression of Common-Mode Voltage

Circulating Current Reduction for Parallel-Connected Modular Inverters Based on Suppression of Common-Mode Voltage

Hybrid Modulation Strategy for Common-mode Voltage Suppression in Three-level Inverters

A hybrid modulation strategy is proposed to suppress the common-mode voltage (V com) of the three-level PWM inverter on the strength of the SVPWM modulation algorithm (space vector pulse width modulation) for V com generated during the run of the three-level inverter. The three-level space vector is classified as two different modulation areas by modulation ratios. In the low modulation ratio region, according to the nearest three vectors principle, the spatial voltage vector is obtained by combining the small vector with the medium vector, which suppresses V com and ensures that only one bridge arm is switched for any voltage vector. In the high modulation ratio region, the vector with large common-mode voltage is discarded, and the zero-vector, medium-vector, and large-vector are selected to synthesize the space voltage vector, which suppresses V com and ensures the good output current waveform of the PWM inverter. From the simulation results, we can see the hybrid modulation strategy of dividing the region by modulation ratio reduces the magnitude of V com to 1/6 of the dc bus voltage, and at the same time, a good current waveform is obtained at the output of the three-level inverter.

Topology and Modulation for a New Indirect Matrix Converter to Reduce the Common-Mode Voltage

In this paper, a new indirect matrix converter (IMC) topology with two insulated gate bipolar transistors (IGBT) set in the upper and lower dc-link is proposed to suppress the common-mode voltage (CMV). Meanwhile, two new space vector modulation (SVM) strategies are redesigned to control this topology. The first strategy utilizes the equivalent zero voltage vectors to replace the zero voltage vectors for reducing the CMV, while the second strategy selects and utilizes specific active voltage vectors and equivalent zero voltage vectors to suppress the CMV based on the input current sector. Comparative simulation and experimental research for the two strategies are carried out for the new IMC topology, which validates that the CMV can be reduced to 57.7% or 37.1% of the one in the conventional IMC system. Besides, the proposed new IMC system is experimentally verified that it can keep a satisfied CMV suppression performance when feeding an induction motor. Moreover, the efficiency analysis also indicates that the new topology will not bring in obvious additional power loss under the proposed SVM strategies even though two IGBTs are added in the dc-link.

Restraint of Common-Mode Voltage for PMSM-Inverter Systems With Current Ripple Constraint Based on Voltage-Vector MPC

At present, the common-mode voltage (CMV) interference is a general problem in motor drive system with three-phase voltage source inverters. When the zero vector is applied, the inverter will generate high CMV, which will bring some negative effects to permanent magnet synchronous motor. Removing the zero vector directly can suppress CMV, but will lead to large current ripple. Aiming to balance these two factors, this article proposes a new method based on finite control set model predictive control (MPC) to suppress the CMV and ensure the high quality of the operating current. The method divides the traditional two-level space voltage vector area into active vector selection area and zero vector selection area, and the tradeoff between CMV suppression and current ripple can be realized by adjusting the size of each selection area reasonably. On this basis, a fast-double vector MPC (FDV-MPC) is proposed to further reduce the current ripple. FDV-MPC directly selects the optimal double vectors without the optimization process, which greatly reduces the computation of the algorithm. The influence of CMV generated by the FDV-MPC during dead-time is analyzed. Finally, the experimental results verify the effectiveness of FDV-MPC and new CMV suppression method.

An Enhanced Predictive Current Control Scheme for Common Mode Voltage Alleviation and Improvement of Torque Response of PMSM Drive

Predictive current control (PCC) is an effective control scheme with provisions to handle multiple objectives and nonlinear constraints. In the conventional PCC (CPCC) scheme, the application of a zero-voltage vector (ZVV) leads to the generation of large common-mode voltage (CMV), which gradually leads to bearing damage. However, disregarding ZVV can suppress CMV at the expense of large distortions in stator current. To avoid this, the present work deploys synthesized voltage vectors (SVVs) obtained from adjacent active vectors (AAVs) for permanent magnet synchronous motor (PMSM) drive control. In this article, two techniques are proposed for alleviating the CMV. Two AAVs are applied for a fixed duration in the first proposed method. Thus, the effect of neglection of ZVV can be circumvented with the application of two AAVs. In the second method, multivectors are applied to ensure CMV suppression and improvement of the steady-state torque response. Furthermore, an effective voltage vector (VV) preselection scheme using the complex-plane concept is introduced. Unlike the conventional CMV reduction schemes, the proposed VV-preselection evades tangent inverse angle determination and complex transformations. This offers the advantage of reduced computational burden with improved steady-state torque performance. The effectiveness of the proposed schemes is validated by comparing them with CPCC and existing literature.

Research on the Coordination Suppression Strategy of Neutral Point Potential and Common Mode Voltage for NPC Three-Level Inverter

A Neutral Point Clamped (NPC) type three-level inverter has the advantages of a low switch voltage and a high-quality output waveform. However, there are inherent problems, such as neutral point potential asymmetry and common mode interferences, which easily affect the symmetry of the three-phase output voltage and the safe operation of the inverter. Firstly, according to the different modulation degrees, the fluctuation of midpoint potential can be suppressed by adding an action time correction factor to the traditional space vector pulse-width (SVPWM) modulation strategy and virtual space vector pulse-width (VSVPWM) modulation strategy, respectively. Secondly, considering the suppression of common mode voltage, a new virtual space vector pulse-width (NVSVPWM) modulation strategy is proposed, which uses a set of new vector synthesis methods. Finally, the simulation and experiment prove that the NVSVPWM strategy with an action time correction factor can suppress the fluctuation of the neutral point potential and common mode voltage at the same time, and the effect is significant.

Three-Phase Flying Capacitor Clamped Current Source Converter With Active Capacitor Voltage and CMV Control

AC-type flying capacitor (FC) concept has been proposed for current source converter (CSC) topologies recently, which offers unique merits over the traditional CSCs, such as lower <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> with improved dc-link voltage quality as well as flexible common-mode voltage (CMV) control. To cope with the main-stream three-phase industrial applications, in this article, the three-phase flying-capacitor-clamped CSC is introduced and extensively investigated for the first time. A novel space vector modulation is proposed, featuring a modular design process, active FC voltage control, and CMV suppression. The detailed commutation principles and the capacitor clamping voltage influence under different switching states are comprehensively addressed. Then, the redundant switching states are optimized to fulfill the multiple targets simultaneously. Simulation and experimental results are performed to demonstrate the superior dc-link power quality and CMV performance compared with the traditional three-phase CSC topology.

Multiobjective Model Predictive Current Control Method of Permanent Magnet Synchronous Traction Motors With Multiple Current Bounds in Railway Application

For multiobjective model predictive current control (MPCC) method with penalties, the penalty weights are introduced into the cost function to determine the relative importance of control targets. However, the dimensions and value ranges of each control target are different. Thus, the penalty coefficient is difficult to determine. To avoid the difficulty of dimensionless parameter design, this article proposes a multiobjective control method called MPCC with multiple current bounds. In this article, the switching frequency and the common-mode voltage (CMV) are selected as the control target. Their control is converted into the limitation of the current ripple so that the control parameters have a clear physical meaning. On the one hand, the proposed method can realize the cooperative control of reference current tracking, switching frequency suppression, and CMV suppression. On the other hand, the key control parameters have the same dimension and strong correlation with others. Therefore, appropriate parameter design can be realized. Experimental investigations for permanent magnet synchronous motor prove the effectiveness of the control method.

71% Common-mode voltage suppression modulation strategy for indirect matrix converters

71% Common-mode voltage suppression modulation strategy for indirect matrix converters

Zero Common-Mode Voltage Model Predictive Torque Control Based on Virtual Voltage Vectors for the Dual Three-Phase PMSM Drive

For the multiphase motor drive system, current harmonic components in stator windings and the common-mode voltage are the main factors affecting the control performance. In this paper, a novel model predictive torque control (MPTC) considering both harmonic and common-mode voltage suppression is proposed to improve the control performance. First, with the vector space decoupling (VSD) theory, 12 virtual voltage vectors are constructed based on the principle that the amplitudes of the vectors in the x-y harmonic subplace are zero to achieve the harmonic suppression. Then, these 12 virtual vectors are further simplified to six vectors to realize the common-mode voltage suppression, and they are taken as the candidate vectors to be rolling optimized to output the optimal voltage vector. This novel MPTC strategy can reduce the computational burden and avoid the weight factor design for the traditional multi-objective optimization. The effectiveness of this novel MPTC strategy was verified by simulations and experiments in comparison with normal MPTC methods, and it can save over 44% of the execution time of the traditional MPTC method and provide better suppression of the harmonic current components and the common-mode voltage.

An Improved Overmodulation Strategy for a Three-Level NPC Inverter Considering Neutral-Point Voltage Balance and Common-Mode Voltage Suppression

The three-level neutral-point clamped voltage source inverter (3L-NPC-VSI) is widely used in the maglev traction systems due to its high output voltage, large output capacity and low output current harmonics. In order to improve the utilization of the DC-bus voltage, an overmodulation strategy is necessary. This paper proposes an improved overmodulation strategy based on the minimum amplitude error method for a 3L-NPC-VSI. Compared with the conventional overmodulation strategy based on the minimum amplitude error method, the utilization of the DC-bus voltage is higher. Meanwhile, a virtual space vector modulation strategy is adopted for inverter neutral-point (NP) voltage balance and common-mode voltage (CMV) suppression. Furthermore, the suppression of leakage current also has been verified. Furthermore, the implementation details of the proposed overmodulation strategy based on minimum amplitude error method is elaborated. The effectiveness of the proposed method is verified by simulation and experimental results.

Improved PWM Methods to Reduce the Common Mode Voltage of the Five-Phase Open-Winding Drive Topology

With the phase angle and shape modifications for carriers, two improved carrier-based pulse width modulation (CPWM) methods with common-mode voltage (CMV) suppression effects for the five-phase open-winding drive topologies are introduced. Theoretical analysis reveals that, by employing reversed triangular carriers for two inverters under the carrier-reversed PWM (CRPWM), CMV contributions of two bridge legs belonging to the same phase can be cancelled, realizing the zero CMV effect. By dynamically employing positive and negative sawtooth carriers for all bridge legs under the carrier-switching PWM (CSPWM), the CMV contribution of each inverter can be reduced, decreasing both the amplitude and step frequency of the CMV. Current qualities and dead-time effects on CMV under the above PWM methods are analyzed. Moreover, performances of two PWM methods are verified by experiments implemented on a five-phase open-winding topology with the induction motor load.

A Common-Mode Voltage Suppression Strategy Based on Double Zero-Sequence Injection PWM for Two-Level Six-Phase VSIs

A common-mode voltage (CMV) suppression strategy, namely double zero-sequence injection common-mode voltage (DZICMV), is proposed in this paper for an asymmetrical six-phase induction motor fed by two-level dual three-phase voltage source inverters (VSIs). In this strategy, the sinusoidal waveforms injected by double zero-sequence signals are employed as modulation signals, and two opposite triangular waveforms are used as carriers. The fundamental period is divided into 24 sectors. In each sector, the carrier used by the medium amplitude phase is distinct from the carriers used by the other two phases in each set of three-phase windings. Using this method, the zero vectors (000) and (111) in each set of three-phase windings can be eliminated, and the peak values of sub-CMV and total CMV can be reduced from ±Udc/2 to ±Udc/6. The experiment results show that the root mean square (RMS) value of common-mode leakage current in DZICMV can be reduced by 51.83% compared with the double zero-sequence injection PWM (DZIPWM) strategy. It is also found in the other four existing benchmark CMV suppression strategies that the peak values of sub-CMV therein are nearly all ±Udc/2, and only in the low linear modulation region could one of these strategies suppress sub-CMV peak values to ±Udc/6. However, the proposed DZICMV can suppress the sub-CMV peak values to ±Udc/6 in the whole linear modulation range. Moreover, the maximum linear modulation index of the DZICMV is 1.15, which is larger than that of the four benchmark strategies, whose maximum modulation index is 1.

An Improved LMSVM Method for Leakage Current Suppression and Neutral-Point Voltage Control in Transformerless NPC Three-Level Inverters

Transformerless three-level inverters have many advantages over two-level inverters in photovoltaic (PV) systems. However, in transformerless systems, except for the inherent unbalanced neutral voltage of the three-level inverter, the leakage current also needs to be limited strictly. Concerning the defects of the conventional common-mode voltage (CMV) suppression methods, an improved LMSVM (ILMSVM) method is proposed. Unlike the conventional CMV suppression method, the ILMSVM method no longer just abandons the high CMV small vectors to limit the range of CMV to ±1/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$6U_{\mathrm {dc}}$ </tex-math></inline-formula> , but limits CMV variation to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta 1/6U_{\mathrm {dc}}$ </tex-math></inline-formula> in all switching cycles. So, high CMV small vectors also can be used in some sequence to help controlling neutral point (NP) while keeping leakage current well suppressed. Moreover, medium vector sequences are also used as an independent control sequence to help achieving bidirectional control on NP potential. Compared with LMP/NSVM strategy, the ILMSVM method has advantages in regulating NP potential, and leakage current spikes of the LMP/NSVM method are also eliminated. In comparison with the conventional SVPWM (CSVPWM) method, leakage current in the ILMSVM method is also well restrained. Simulations and experiment results verify that the ILMSVM method can well restrain leakage current and maintain good control of NP in comparing with LMP/space vector modulation (SVM) method and CSVPWM method.

Research on Common Mode Voltage Suppression Algorithm Based on Three Levels

The high frequency common mode voltage generated by the traditional two-level inverter and multilevel inverter modulation scheme is higher. In order to solve the problem of common-mode voltage in three-level inverter, a method to suppress the common-mode voltage in three-level inverter is proposed in this paper. Research comparing sinusoidal pulse width modulation (SPWM) and zero common mode voltage modulation methods. Through the application of the new modulation method to the three-level inverter, the effectiveness of the method is proved by simulation.

Two Types of Common-Mode Voltage Suppression in Medium Voltage Motor Speed Regulation System Based on Solid State Transformer With Dual DC Bus

Two types of common mode voltage (CMV) exist in medium-voltage motor drive system based on modular multilevel converter (MMC) type topology, that are, arms CMV (ACMV) and system CMV (SCMV). The former will produce circulating current between phases, and the latter will do harm to the motor. This article proposes a suppression scheme of CMV with a dual dc bus MMC-based solid-state transformer (DBM <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> C-SST) based drive system. The horizontal submodules (SMs) of MMC are cascaded with a quadruple-active-bridge (QAB), then a low voltage is formed. Plus the original medium voltage bus, the system is characteristic as a dual dc bus. The primary triple-active-bridge of QAB which characterized by low-impedance and synchronous-switching helps to achieve the natural suppression of the fluctuating voltage of the MMC horizontal three SMs within the entire operating frequency range under the relevant modulation strategy, thus realizing the full suppression of ACMV and low-frequency components suppression of SCMV simultaneously, and with the additional minimum method of SCMV high-frequency components, the DBM <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> C-SST can achieve zero CMV. As the SMs fluctuating voltage and CMV are decreased, the values of SMs capacitance and arms inductance can be significantly reduced.

Common-Mode Voltage Suppression Technique for Open-End Winding PMSM System With Five Bridge Arms

To further improve the reliability of the open-end winding permanent magnet synchronous motor (OW-PMSM) and avoid the secondary damage caused by the common-mode voltage (CMV) in the event of bridge-arm failure, a CMV suppression technique is proposed. With the proposed technique, the reference voltages in three-phase stationary coordinate system are optimized to adapt the characteristics of OW-PMSM with five bridge arms. Further, an improved modulation scheme is proposed, in which the CMV is suppressed and the switching actions within every control cycle is reduced. The effectiveness of the proposed technique is validated through experimental results.