Hybrid Modulation Strategy for Common-mode Voltage Suppression in Three-level Inverters

Abstract

A hybrid modulation strategy is proposed to suppress the common-mode voltage (V com) of the three-level PWM inverter on the strength of the SVPWM modulation algorithm (space vector pulse width modulation) for V com generated during the run of the three-level inverter. The three-level space vector is classified as two different modulation areas by modulation ratios. In the low modulation ratio region, according to the nearest three vectors principle, the spatial voltage vector is obtained by combining the small vector with the medium vector, which suppresses V com and ensures that only one bridge arm is switched for any voltage vector. In the high modulation ratio region, the vector with large common-mode voltage is discarded, and the zero-vector, medium-vector, and large-vector are selected to synthesize the space voltage vector, which suppresses V com and ensures the good output current waveform of the PWM inverter. From the simulation results, we can see the hybrid modulation strategy of dividing the region by modulation ratio reduces the magnitude of V com to 1/6 of the dc bus voltage, and at the same time, a good current waveform is obtained at the output of the three-level inverter.