An 8-bit, 4-phase insulated-gate CCD on bulk p-type InP is reported. The device, based on a two-level 10-µm long overlapping gate design, uses plasma-enhanced CVD SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> for gate isolation and ion implantation to define the input/output diodes and the channel stop. Operating at ∼ 1 MHz in the surface channel mode with ∼ 20 percent full well fat zero background, these devices have exhibited values of CTE \gsim 0.998/transfer.