Boundary Barrier Height Research Articles

Effect of Dy2O3 doping on microstructure and electrical characteristics of ZnO linear resistors

ZnO linear resistors, due to its excellent performance, are widely used in numerous industries and gradually replacing traditional conductive resistors, presenting a broad prospect for application. To study the effects of lanthanide oxides on the microstructure and electrical properties of ZnO-based linear resistors, this paper prepared Dy2O3-doped ZnO-Al2O3-TiO2-NiO based linear resistors using a solid-state sintering method. The results showed that proper doping of Dy2O3 could inhibit the growth of ZnO grains, leading to more uniform grain growth. Additionally, doped with appropriate amount of Dy2O3 could enhance the linear performance of ZnO linear resistors, reduce the grain boundary barrier height (φb), and decrease dielectric loss. Linear resistors with nonlinearity coefficient (α) of 1.07, grain boundary barrier height (φb) of 0.0934 eV and resistance-temperature coefficient (αT) of −5.39 × 10−3/°C were obtained. The doping of Dy2O3 could improve the comprehensive performance of ZnO linear resistors, making the fabricated ZnO linear resistors are more suitable for working in high frequency electric fields. The study and analysis of Dy2O3 doped ZnO linear resistors are of significant importance for the preparation of high performance ZnO linear resistors.

Microstructure evolution, dielectric properties, and nonlinear response of Na+-doped CdCu3Ti4O12 ceramics.

In this study, Cd1-x Na x Cu3Ti4O12 (x = 0, 0.02, 0.04, 0.06, and 0.08) ceramics were prepared via a solid-state method. The phase composition, microstructure, and defect characteristics as well as optical, dielectric, and nonlinear properties of the ceramics were systematically studied. A CuO second phase was detected in doped samples. Grain boundary precipitates, Na with a low melting point, and oxygen and cation vacancies together caused the grain size to first increase and then decrease with an increase in the Na+ doping amount. The abundant emerging cation vacancies with an increase in Na+ content led to a decrease in the optical energy band. The sample with x = 0.04 exhibited the highest ε' value (∼35 800) due to its largest grain size. Moreover, it possessed a lower tan δ (∼0.053) at 10 kHz, which was attributed to the multiplication of insulating grain boundaries. The huge dielectric constant originated from Maxwell-Wagner polarization at low frequencies and followed the internal barrier effect model. The lowest tan δ (∼0.037) and optimal nonlinear properties (α = 3.66 and E b = 3.82 kV cm-1) were obtained in the sample with x = 0.08, which were associated with its highest grain boundary resistance and barrier height. Electric modulus data proved that dielectric relaxation at low frequencies was associated with grain boundaries. Dielectric anomalies in the high temperature range were attributed to oxygen vacancies.

Strain-dependent grain boundary properties of n-type germanium layers

Polycrystalline Ge thin films have attracted considerable attention as potential materials for use in various electronic and optical devices. We recently developed a low-temperature solid-phase crystallization technology for a doped Ge layer and achieved the highest electron mobility in a polycrystalline Ge thin film. In this study, we investigated the effects of strain on the crystalline and electrical properties of n-type polycrystalline Ge layers. By inserting a GeOx interlayer directly under Ge and selecting substrates with different coefficients of thermal expansion, we modulated the strain in the polycrystalline Ge layer, ranging from approximately 0.6% (tensile) to − 0.8% (compressive). Compressive strain enlarged the grain size to 12 µm, but decreased the electron mobility. The temperature dependence of the electron mobility clarified that changes in the potential barrier height of the grain boundary caused this behavior. Furthermore, we revealed that the behavior of the grain boundary barrier height with respect to strain is opposite for the n- and p-types. This result strongly suggests that this phenomenon is due to the piezoelectric effect. These discoveries will provide guidelines for improving the performance of Ge devices and useful physical knowledge of various polycrystalline semiconductor thin films.

The effect of nitrogen doping and heat treatment on electrical resistivity of CVD SiC bulks

With the expansion of chip size, the challenge of achieving uniform etching becomes progressively more formidable. Implementing CVD SiC etching rings enhances etching uniformity effectively and offers notable attributes of high purity and prolonged operational lifespan. Controlling the resistivity of CVD SiC etching rings is essential to cater to diverse processes and equipment requirements. This investigation delves into the impact of nitrogen doping and heat treatment on the resistivity of CVD SiC bulks. Elevated nitrogen doping results in a heightened carrier concentration within CVD SiC. In modest doping cases, the grain boundary barrier height escalates with the doping concentration. However, in instances of higher doping concentrations, the grain boundary barrier diminishes with increasing doping concentration. Following heat treatment, there is a rise in the carrier concentration of the sample. Nonetheless, the surge in sample porosity precipitates a mobility reduction, yielding minimal variance in resistivity before and after heat treatment.

Effect of Sc2O3 doping on the microstructure and electrical characteristics of ZnO linear resistors

Herein, to improve the electrical characteristics, ZnO linear resistors mixed with MgO, TiO2, Al2O3, and various concentrations of Sc2O3 (with 0, 0.35, 0.7, and 1.05 wt %) were obtained using the conventional solid-state sintering technique, while the influences of Sc2O3 doping on the micro-morphology and electrical characteristics was investigated in detail. The crystalline phases and microstructure were investigated by X-ray diffraction (XRD), energy-dispersive spectroscopy (EDS), and scanning electron microscopy (SEM). The dielectric properties and electrical characteristics were evaluated using a precision inductance-capacitance-resistance meter and a high-voltage source meter. Results from SEM micrographs, XRD patterns, and EDS mappings illustrated that the doping of Sc2O3 hinders the growth of ZnO grains. Electric field-current density and resistivity-frequency measurements illustrated that the doping of Sc2O3 improves the linear performance of ZnO linear resistors and increases its grain resistivity and grain boundary resistivity. With Sc2O3 doping, the dielectric properties of the samples are significantly affected, while the resistance-temperature features reveal the negative temperature constant function. By appropriate Sc2O3 doping, the ZnO linear resistors exhibited excellent performance with grain boundary barrier height φb of 0.0106 eV, nonlinear coefficient α of 1.03, and resistance temperature constant αT of −2.88 × 10−3. It is beneficial to investigate the influence of Sc2O3 doping on the micro-morphology and electrical performances in detail for the preparation of zinc oxide linear resistors with superior performance.

N-Type Polycrystalline Germanium Layers Formed by Impurity-Doped Solid-Phase Growth

The carrier mobility of polycrystalline Ge thin-film transistors has significantly improved in recent years, raising hopes for the realization of next-generation electronic devices. Here, we adapted advanced solid-phase crystallization, which achieved the highest hole mobility of the polycrystalline semiconductor layer, to Ge layers doped with n-type impurities (P, As, and Sb). The type and amount of dopants had marked effects on the growth morphology and electrical properties of the Ge layers because they altered the activation energies in crystal growth, dopant activation rates, and grain boundary properties. In particular, P doping was effective in increasing the grain size (25 μm) and lowering the grain boundary barrier height (20 meV), which improved the electron concentration (8.0 × 1018 cm–3) and electron mobility (380 cm2 V–1 s–1) in n-type polycrystalline Ge layers. The electron mobility is greater than that of most semiconductor layers synthesized at low temperatures (≤500 °C) on insulators, and this will pave the way for advanced electronic devices, such as multifunctional displays and three-dimensional large-scale integrated circuits.

Elucidation of the Density of States for Polycrystalline Silicon Vertical Thin-Film Transistors

The polycrystalline silicon vertical thin-film transistors (TFTs) with different active layer thicknesses of 150 and 300 nm were fabricated by a five-mask process and electrically characterized. The vertical TFT with 150-nm active layer thickness shows comprehensive advantages over its counterpart with 300-nm active layer, especially with a higher ON/OFF current ratio <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I_{\mathrm{ON}}/I_{\mathrm{OFF}}$ </tex-math></inline-formula> of more than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> and higher field-effect mobility, excluding the access resistance effect. The electrical parameters were analyzed by the density of states (DOS) calculation, and smaller DOS is deduced for the device with 150-nm active layer for the same energy level. The detailed elucidation of the DOS was analyzed by introducing the intrinsic mobility and the grain boundary barrier height at the flat-band state, which gives the detailed expressions for the DOS. Polycrystalline silicon lateral TFT was also introduced to verify this evaluation method.

Modeling of Grain Boundary Barrier Height for Undoped Polycrystalline Silicon Channel in Macaroni MOSFETs

In this article, a physically based explicit analytical model for grain boundary (GB) barrier height ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\psi _{\text {B}}$ </tex-math></inline-formula> ) near the polycrystalline Si (poly-Si) channel/gate oxide interface is proposed for macaroni MOSFETs, the unit cell of 3-D NAND Flash memory. The model is derived by considering a cylindrical coordinate system and is expressed as the Lambert W function and the cosine integral. To verify our model, a computer-aided design (TCAD) simulation tool, including a carrier transport model for poly Si channel, is used and calibrated against experimental data of 3-D NAND string current. The validity of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\psi _{\text {B}}$ </tex-math></inline-formula> -model at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {GS}} &gt; {V}_{\text {FB}}$ </tex-math></inline-formula> is demonstrated by comparing the model with simulation data extracted from calibrated exponential density of states (DOS) distribution for grain boundary traps (GBTs). In the verification stage, simulations are also implemented under various exponential DOS distributions and channel hole radius, and a good agreement between the model and the simulation data is achieved.

Solid-phase crystallization of ultra-thin amorphous Ge layers on insulators

A simple method to form ultra-thin (<20 nm) semiconductor layers with a higher mobility on a 3D-structured insulating surface is required for next-generation nanoelectronics. We have investigated the solid-phase crystallization of amorphous Ge layers with thicknesses of 10−80 nm on insulators of SiO2 and Si3N4. We found that decreasing the Ge thickness reduces the grain size and increases the grain boundary barrier height, causing carrier mobility degradation. We examined two methods, known effective to enhance the grain size in the thicker Ge (>100 nm). As a result, a relatively high Hall hole mobility (59 cm2 V−1 s−1) has been achieved with a 20 nm thick polycrystalline Ge layer on Si3N4, which is the highest value among the previously reported works.

Effects of Ta2O5 on the microstructure and electrical properties of ZnO linear resistance ceramics

ZnO linear resistance ceramics were synthesized from ZnO–Al2O3–MgO–TiO2–SiO2–Ta2O5 by a conventional ceramics method. Effects of Ta2O5 on the phase composition, microstructures, and electrical properties of ZnO linear resistive ceramics were investigated. The results show that doping with appropriate amount of Ta2O5 can refine the grains of the main crystalline phase ZnO and the secondary crystalline phase ZnAl2O4 in terms of microstructure, and also can reduce the grain boundary barrier and optimize the I–V characteristics in terms of electrical properties. In addition, the doping of Ta2O5 can improve the stability of the resistivity , and the impedance frequency indicates that the doping of Ta2O5 makes the sample suitable for high-frequency electric fields. The resistivity of the sample doped with 0.2 mol% Ta2O5 is 56.2 Ω·cm, and this sample has the best grain boundary barrier height, nonlinear coefficient and temperature coefficient of resistance of 0.054 eV, 1.04 and −3.48 × 10−3 °C−1, respectively.

The influence of ZrO2 doping on microstructure and electrical properties of ZnO-based conductive ceramics

ZnO-based conductive ceramic materials doping ZrO2 were prepared at 1320 °C by the conventional solid-state sintering method in air, and the influence of comprehensive properties with different ZrO2-doped content were studied carefully. Microstructure and crystals of the samples were investigated by SEM and XRD respectively. As a donor, Zr4+ increases the carrier concentration and decreases the resistivity of grain and grain boundary. As-prepared samples shown excellent linear V–I characteristics and were suitable for high frequency electric field. With the increasing of dopant ZrO2 contents, the dielectric constant and resistivity of ZnO-based conductive ceramics were influenced significantly, moreover, the resistance-temperature characteristics presents the negative temperature coefficient effects. ZnO-based conductive ceramics exhibited excellent comprehensive electrical performance with 0.30 mol% ZrO2-doping, in which the nonlinear coefficient is 1.01, the grain boundary barrier height is 0.014 eV, and the resistance temperature coefficient is −2.6×10−3/°C.

Four-step heating process for solid-phase crystallization of Ge leading to high carrier mobility

Solid-phase crystallization is rapidly developing as a method for obtaining high-quality polycrystalline Ge layers. We propose a four-step heating process, focusing on post-deposition annealing (PDA), which is performed between the film deposition and crystallization. PDA at an appropriate temperature (500 °C) reduces the grain size while improving the crystallinity of Ge (150 nm thickness), which leads to the reduction of the grain boundary barrier height (5 meV). The resulting hole mobility (530 cm2 V−1 s−1) is higher than that of any other semiconductor thin films (<300 nm) and even single-crystal Si wafers. These findings will further improve Ge thin-film transistors for advanced devices.

Investigation of the Effects of CaO Doping on the Microstructure and Electrical Properties of ZnO-Based Linear Resistance Ceramics

ZnO-Al2O3-MgO-SiO2-TiO2-CaO (ZnO-based) linear resistance ceramics were prepared by the conventional ceramics method with different amounts of CaO. The impact of CaO doping on the phase composition, microstructures and electrical properties of ZnO-based linear resistance ceramics was investigated in detail. The research showed that CaO doping not only limits the growth of ZnAl2O4 and ZnO grains—in particular, the grain size of ZnAl2O4 decreased from 4.40 μm to 1.38 μm—but also improves the electrical properties. The grain boundary barrier height and nonlinear coefficient decreased with the increase in CaO content, and the resistance temperature coefficient increased from −5.65 × 10−3/°C to 1.04 × 10−3/°C. The 4.00 mol.% CaO-doped ZnO-based linear resistance ceramics were found to possess excellent electrical properties: the resistivity is 44.87 Ω cm, the grain boundary barrier height is 0.011 eV, the nonlinear coefficient is 1.05 and the resistance temperature coefficient is −0.822 × 10−3/°C, a stable resistivity against frequency.

Structural and optical properties of lead iodide nanostructure synthesized by vacuum evaporation method

Structural and optical properties were studied as a function of films thickness for thermally evaporation PbI2 films. X-ray diffraction analysis confirmed that PbI2 films are polycrystalline having hexagonal structure. The optical absorption data indicate an allowed direct transmission with optical energy gap varies continuously from (2.15eV - 2.33 eV). The energy gap shows thickness dependence, which can be explained qualitatively by a thickness dependence of grain size through the decrease of the grain boundary barrier height with grain size. The low fluctuation in energy gap indicates that the grain size is quite small, which is finding in agreement with AFM results.

Structural and optical properties of lead iodide nanostructure synthesized by vacuum evaporation method

Structural and optical properties were studied as a function of films thickness for thermally evaporation PbI2 films. X-ray diffraction analysis confirmed that PbI2 films are polycrystalline having hexagonal structure. The optical absorption data indicate an allowed direct transmission with optical energy gap varies continuously from (2.15eV - 2.33 eV). The energy gap shows thickness dependence, which can be explained qualitatively by a thickness dependence of grain size through the decrease of the grain boundary barrier height with grain size. The low fluctuation in energy gap indicates that the grain size is quite small, which is finding in agreement with AFM results.

$$\hbox {Bi}_2\hbox {O}_{3}\hbox {-doped}$$ $$\hbox {SnO}_{{2}}$$ varistors with low breakdown electric fields

This work presents $$\hbox {Bi}_{{2}}\hbox {O}_{\mathrm {3}}\hbox {-doped SnO}_{{2}}$$ ceramic varistors prepared through conventional ceramic processing in the sintering temperature range of 1290–1320°C. The sample sintered at 1300°C exhibits a breakdown electric field as low as 11.6 V $$\hbox {mm}^{\mathrm {-1}}$$. Scanning electron microscopy images reveal that all the samples have a compact structure, and energy dispersive spectroscopy results for the sample sintered at 1300°C indicate that Bi distributes homogeneously along the grain boundaries and aggregates inhomogeneously on the grain surfaces. With increasing sintering temperature, the grain boundary barrier height remains nearly constant at 0.80 eV. In both the dielectric loss and electric modulus spectra of the sample sintered at 1300°C, obvious relaxations were observed and the activation energies obtained from the respective spectra were 0.33 and 0.15 eV, which are expected to be related to oxygen vacancies and interstitial ions, respectively. Complex impedance spectra are employed to develop a non-typical equivalent circuit model for the $$\hbox {Bi}_{{2}}\hbox {O}_{\mathrm {3}}\hbox {-doped SnO}_{{2}}$$ ceramic varistors at low voltage that yields an excellent fit to the data.

Buffer/absorber interface recombination reduction and improvement of back-contact barrier height in CdTe solar cells

Electronic properties of a CdTe solar cell are reported using temperature-dependent capacitance spectroscopy and current-voltage characteristics, the latter in dark and illuminated conditions. The baseline solar cell material stack investigated is comprised of soda-lime-glass/SnO2:F/SnO2/CdS:O-buffer/CdTe-absorber/Cu/Au. Device properties are compared with CdTe solar cells in which the back surface was hydroiodic acid etched, before the back-contact formation, and a CdTe device in which Mg-doped ZnO (MZO) replaces buffer layers. Reduced back-contact barrier height and grain boundary barrier height are observed in the hydroiodic acid treated CdTe cell. Improved device performance in the MZO-based CdTe device is attributed to reduced emitter/absorber interface recombination when using the MZO window layer.

An extended grain boundary barrier height model including the impact of internal electric field

An extended phenomenological model is proposed to rationalize the potential barriers of the varistor like boundaries of piezoelectric semiconductors. This model takes self-consistently into account the inverse piezoelectric effect of the internal electric field associated with the barrier height at grain boundaries. A double Schottky barrier at a grain boundary gives rise to a strong internal electric field in the depletion layer. Due to the inverse piezoelectric effect, this internal electric field leads to mechanical strain and consequently piezoelectric charge at a grain boundary and also an additional space charge associated with the polarization inhomogeneity. The piezoelectric charges in return impacts the barrier height. Results show that the piezoelectric charge induced by the internal field tends to adjust the grain boundary charge and lowers the barrier height. Furthermore, the barrier height becomes less sensitive to mechanical stress and applied voltage if the influence of the internal field is taken into account. The extended model with the inverse piezoelectric effect of the internal field allows to further elucidate their piezotronic response. The work improves the grain boundary barrier height theory of piezoelectric ceramics and is expected to have general impact on piezotronics and other junction devices.

Study on the impact of stoichiometric and optimal compositional ratios on physical properties of Cu2ZnSnS4 thin films deposited by spray pyrolysis

Cu2ZnSnS4 (CZTS) thin films processed by spray pyrolysis technique have attracted a great deal of attention from scientific community for solar cell applications. It is well known that Cu-poor and Zn-rich conditions are required for a good solar cell performance regardless of the method used for CZTS thin film deposition. However, few reports are found along the literature to explain such results. In this work, a comparison on the physical properties of CZTS thin films processed under stoichiometric (Cu2ZnSnS4) and optimal (Cu1.6Zn1.1Sn0.9S4) compositional ratios by spray pyrolysis method is presented. The impact of different substrate temperatures on structural, morphological, optical and electrical properties considering both compositional conditions is studied. For this purpose, characterization techniques such as XRD, Raman, x-ray fluorescence, EDX, AFM, transmittance and reflectance measurements, I–V, I–T and Hall measurements were performed. It is demonstrated that samples deposited under optimal compositional ratios present better structural and morphological properties as well as lower contribution of secondary phases along with band-gap energy values near to 1.5 eV as required for solar cell applications. From the electrical point of view, higher resistivity and grain boundary barrier height values along with a lower density of defects at grain boundary are reported for CZTS deposited under optimal compositional ratios. In this sense, this work helps to clarify why stoichiometric condition in CZTS samples produces lower solar cell performances.

Noise Modeling in MOX Gas Sensors

In this paper, we propose a new model of adsorption–desorption (AD) noise in chemoresistive gas sensors by taking into account the polycrystalline structure of the sensing layer and the effect of the adsorbed molecule’s density fluctuation on the grain boundary barrier height. Using Wolkenstein’s isotherm, in the case of dissociative and non-dissociative chemisorption, combined with the electroneutrality, we derive an exact expression for power density spectrum (PDS) of the AD noise generated around one grain. We show that the AD noise generated in the overall sensing layer is a combination of multi-Lorentzian components. The parameters of each Lorentzian depend on the nature of the detected gas, the grain size, and the gas concentration. Moreover, we show that, according to the sensing layer microstructure (distribution of grain sizes in the sensing layer), this combination can lead to a [Formula: see text] spectrum, and in this case the noise level of the [Formula: see text] spectrum depends on the nature of the detected gas. The noise modeling presented in this paper confirms that noise spectroscopy is a useful tool for improving the gas sensor selectivity.