Base-emitter Voltage Research Articles

A 3.0-V 4.2-μA 2.23-ppm/°C BGR with cross-connected NPNs and base-current compensation

This paper presents a high-precision, low-power bandgap voltage reference with a 3.0 V output voltage suitable for battery-management systems. Compared to Brokaw's type bandgap references (BGRs), Cross-connected NPN transistors facilitate higher output voltages without the necessity of operational amplifiers and are unaffected by the current-mirror mismatch. Base-current compensation is proposed to address the effect of base current on voltage output temperature characteristics at low power consumption. A piecewise exponential curvature correction stains high-order compensation for the nonlinear characteristic of base-emitter voltage. Experimental results of the proposed BGR implemented in a 0.18-μm Bipolar-CMOS-DMOS (BCD) process demonstrate that the temperature coefficient is 2.23 ppm/°C over the range of −40 °C–120 °C. The line regulation is 0.2 mV/V at a 5–6 V supply voltage with a supply current of only 4.2 μA. The die area of the fabricated BGR is 0.105 mm2.

A Critical Review of Techniques for the Experimental Extraction of the Thermal Resistance of Bipolar Transistors from DC Measurements—Part I: Thermometer-Based Approaches

This paper presents a critical and detailed overview of experimental techniques for the extraction of the thermal resistance of bipolar transistors from simple DC current/voltage measurements. More specifically, this study focuses on techniques based on a thermometer, i.e., the relation between the base-emitter voltage and the junction temperature. The theory behind the techniques is described with a unified and comprehensible nomenclature. Advantages, underlying approximations, and limitations of the methods are illustrated. The accuracy is assessed by emulating the DC measurements with PSPICE electrothermal simulations of a transistor model, applying the techniques to the simulated currents/voltages, and comparing the extracted thermal resistance data with the values obtained from the target formulation embedded in the transistor model. An InGaP/GaAs HBT and an Si/SiGe HBT for high-frequency applications are considered as case-studies.

Performance investigation of low-power flexible n-ZnO/p-CuO/n-ZnO heterojunction bipolar transistor: Simulation study

Oxide semiconductor-based heterojunction bipolar transistors are widely applicable in flexible, printable, and cost-effective circuit applications. Among earth-abundant metal oxides, zinc oxide and copper oxide inherently show n-type and p-type characteristics, respectively, and their electronic properties can be easily modified during the fabrication process. Accordingly, a planar-type HBT can be achieved by low-temperature growth of the metal-oxide layers on a flexible substrate without the need for further sophisticated processes. In this paper, a double heterojunction bipolar transistor (DHBT) comprised of ZnO layers serving as the emitter and collector regions, along with the CuO layer functioning as the base area is presented. Simulation results demonstrate that the proposed all-metal oxide transistor based on p-CuO/n-ZnO heterojunction enjoys low power consumption owing to the low threshold voltage. High-frequency characterization and DC analysis of the proposed NPN configuration are carried out using the ATLAS/SILVACO package. Our findings reveal that at the base-emitter voltage of 0.55 V, the current gain factor of the device reaches 155, which is larger than those reported in the literature. Furthermore, an ideality factor at the base-emitter voltage of 0.7 V was obtained for the collector-base and emitter-base junctions equal to 1.5 and 1.2, respectively.

STABILIZATION OF TRANSISTOR ANALOGUES OF INDUCTANCE PARAMETERS

The article analyzes methods for stabilizing the parameters of transistor analogues of inductance (TAI), their advantages and disadvantages are determined. Ways of implementation are considered, thanks to which it is possible to weaken the influence of all destabilizing factors, such as temperature, instability of power supplies, production variation of parameters, changes in parameters due to aging, and others. Allocated universal means to stabilize the parameters of all transistor devices. The stabilization of the operating mode at direct current and negative feedback at alternating current are considered. An assessment of the mode of instability of the parameters of the TAI was carried out by the magnitude of the increase in the equivalent inductance and quality factor. A technique for stabilizing the parameters of the TAI, as well as microwave devices, is defined, in each specific case, the need to select the allowable instability of the operating point, to perform the expected calculation of the instability of the parameters, and then to obtain the desired stability, input negative feedback on alternating current is described. The graphs of the dependence of the equivalent quality factor on temperature and the graphs of the dependence of the equivalent inductance on temperature are presented. An expression is given for the increase in inductance in the case when the main destabilizing effect on the operating mode of the transistor is a change in the reverse collector current, current transfer coefficient, collector-base voltage, emitter-base voltage, emitter current. The coefficient of regime instability was calculated. The effectiveness of stabilizing influences from negative feedback on alternating current, which contributes to the stabilization of almost all parameters of the TAI, is considered. Inductance is considered as a parameter characterizing the properties of TAI in the presence and absence of feedback. An expression is given for the relative error of inductance in the presence of NZS on alternating current.

Thermal Load Influence during the Formation of Al-Al Contacts on the Electrical Parameters of the Integrated Circuits with Aluminum-Polysilicon Contacts

This work is devoted to establishing the effect of using rapid thermal processing (RTP) method (450 °C, 7 s) to form an ohmic contact between two layers of aluminum metallization on the electrical parameters and reliability of integrated circuits. The resistance values of contact chains aluminum-silicon, aluminum-polysilicon, polysilicon-silicon n+, aluminum-silicon n+, current-voltage characteristics of the tested bipolar transistors, as well as the results of the reliability analyses by conducting thermal field tests were chosen as the analyzed parameters of this microcircuit. Comparison of these parameters was carried out with respect to the microcircuits manufactured using standard RTP method (450 °C, 20 min) to form this contact. An analysis of the results of the resistance value of various contact chains showed that, regardless of the type of thermal treatment, all contact chains, with the exception of the aluminum-polysilicon contact chain, have almost the same resistance. By analyzing the elemental composition of the cleavage in the area of this contact by scanning electron microscopy, it was found that during rapid heat treatment, the depth of penetration of aluminum into polysilicon is 2 times less than during its standard formation due to a 2-fold reduction in the time of exposure to high temperature compared to the standard process. This leads to a lower concentration of the aluminum in the silicon and as a result to a higher contact resistance between the aluminum and polysilicon. An analysis of the currentvoltage characteristics showed that they are all identical, except for the course of the direct branch of the base current value from the emitter-base voltage. The deviation of the linear nature of this dependence in the region of their low voltage values (£ 200 mV) in the case of the formation of ohmic Al-Si and Al-Al contacts with the use of long-term heat treatments is due to the predominance of the generation-recombination current in this region associated with an increased density of traps in the depleted region and on the surface of the semiconductor. The ideal behavior of the base current versus the emitter-based voltage is maintained by applying rapid RTP method to form an Al-Al contact by eliminating traps both in the depletion layer and on the surface of the semiconductor. The tests carried out on the reliability of these products showed that it does not depend on the type of formation of ohmic contacts between the metallization layers.

Microscopic Simulation of the RF Performance of SiGe HBTs With Additional Uniaxial Mechanical Stress

A very detailed investigation of high-speed silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) showed an underestimation of the measured peak cutoff frequency by simulations with a hydrodynamic (HD) model. It was speculated that this might be due to a breakdown of the HD approximation or unknown additional mechanical stress. We repeated those simulations with the more fundamental Boltzmann transport equation (BTE) based on the same device model (doping profiles, 2-D geometry, parasitics, and so on) and obtained almost similar results showing that this failure was not due to a breakdown of the HD approximation. Since additional uniaxial stress along the direction of the lateral base has been shown to increase the cutoff frequency, we investigated this effect. We found by 2-D device simulations that the increase in the peak cutoff frequency is rather small, and at high stress levels, it even decreases, if the uniaxial stress is applied homogenously. This is due to the reduction of the conductivity of the highly doped collector layer by the stress. If the stress is limited to the intrinsic transistor, the increase in the cutoff frequency is monotonic with growing stress. On the other hand, the collector current for a given base–emitter voltage also increases with stress leading to an overestimation of the collector current compared with the measurements. If this increase is corrected by a slight decrease in the germanium profile, the gain in the peak cutoff frequency is lost. Thus, the underestimation of the peak cutoff frequency cannot be explained by an additional homogeneous uniaxial stress in the intrinsic transistor.

Study of the single-event burnout triggering criteria and hardening of the 550 V SOI lateral-IGBT

In this paper, we study the single-event burnout (SEB) tolerance of the 550 V SOI Lateral-IGBT (SOI-LIGBT). The TCAD simulations are performed to inspect the SEB triggering criteria. The SEB of SOI-LIBGT is caused by the ionized carriers induced latch-up of the inherent parasitic thyristor. The peak value of base-emitter voltage (Vbe) in the parasitic NPN transistor is used as the critical parameter to inspect whether the SEB occurs. An analytical model is brought up to reveal the failure procedure during SEB and the hardening strategy. The hardening SOI-LIGBT with the shallow p + layer (SPL-LIGBT) is proposed to improve the SEB immunity by reducing peak Vbe. It is verified by both analytical model and TCAD simulations that the SEB threshold voltage (VSEB) can be enhanced to 250 V at the linear energy transfer (LET) of 37 MeV·cm2/g in the blocking state.

A curvature-compensated bandgap voltage reference with a temperature coefficient trimming circuit

This paper presents an advanced topology of bandgap voltage reference (BGR) which consists of a novel curvature-compensated circuit and a current-mode trimming circuit. A positive-temperature-coefficient (positive-TC) nonlinear term is produced in the difference between the base-emitter voltages of two bipolar junction transistors (ΔVBE) to realize the high-order curvature compensation. The ΔVBE is generated by adding a negative-TC current into the bandgap core. Owing to the compensated ΔVBE, the BGR could be fine-tuned by an innovative current-mode trimming circuit which takes less area and achieves a larger trimming range. Benefiting from the trimming circuit, the PVT stabilities of proposed BGR are improved. Designed in a 0.18 μm HVCMOS process, the BGR occupies an active area of 267μm×226μm. The post-layout simulation results show the BGR reaches a low TC of 1.64 ppm/∘C in a wide range of -55 °C to 125 °C.

Sub-ppm/°C Bandgap References With Natural Basis Expansion for Curvature Cancellation

A general approach based on a natural basis function expansion to cancel the temperature-curvature of the base-emitter voltage in the bipolar transistors embedded in bandgap references is presented. The proposed method can be applied to the widely used Banba, Kuijk, and Brokaw structures to build references with sub-ppm/°C temperature coefficients. Current version and voltage version embodiments based on a self-bootstrapping concept are provided. Error sources that can potentially affect the reference performance are analyzed and their effects on the temperature coefficient are minimized after trimming. Monte Carlo simulation results confirm that after calibration, temperature drift performance is within the design/trimming target 0.5 ppm/°C. A partially integrated Kuijk-based prototype reference has been designed and fabricated in a 65nm UMC process. Measurement results demonstrated a 1.5 ppm/°C temperature coefficient over a temperature range of 0 °C to 80 °C with a low-cost two-temperature trimming method. With additional trimming, 0.8 ppm/°C performance was achieved.

Experimental Investigation of the Effects of Reactor Neutron-Gamma Pulse Irradiation on SiGe HBTs Under Different Bias Conditions

The degradation characteristics of silicon-germanium heterojunction bipolar transistors (SiGe HBTs) under different bias modes (forward, cutoff and saturation) during irradiation were reported after multiple pulsed neutron-gamma irradiation at room temperature. The radiation-sensitive parameters of the test samples, including base current IB, collector current IC and DC current gain β, were measured and compared before and after every reactor n-γ pulse irradiation. The test results show that IB increased with increasing fluence, and IC slightly increased in the low base-emitter voltage VBE region (approximately from 0.4 V to 0.5 V) and decreased in the high-VBE region (approximately VBE>0.5 V). Moreover, the degradation degree of the test samples was different under different bias conditions. The performance of the test samples under cutoff bias mode displayed the most serious degradation, while those under forward bias mode suffered minimum damage. Meanwhile, the time-dependent annealing characteristics of the DC current gain for SiGe HBTs at various bias conditions were compared and analyzed.

Effect of Defects on the Performance of Si-Based GeSn/Ge Mid-Infrared Phototransistors

In this paper, we discuss the impact of interfaces and defects on the frequency performance of Si-based GeSn heterojunction phototransistors (HPTs) at room temperature. Furthermore, the effect of base-emitter (B-E) voltage on the spectral responsivity (SR) and detectivity (D*) has also been studied. The presented device consists of Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Sn <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> alloy in the active layer to enhance the photodetection range. However, increasing Sn content in Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Sn <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> causes a lattice mismatch between Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Sn <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> and Ge virtual substrate (VS), which may increase defect density at the heterointerfaces. As a result, the diffusion length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> ) and minority carrier lifetime (τ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> ) may decrease, thereby, degrading the performance of the device. Three major noise components such as shot noise current components at the base-emitter (B-E) and base-collector (B-C) junctions and Johnson noise have been considered for the first time to calculate the detectivity and noise-equivalent-power (NEP) of the presented device. The calculated results show that the decrease in diffusion length does not cause a significant impact on the SR, D* and internal quantum efficiency (IQE), however, it significantly degraded the cut-off frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ), maximum frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ), and sensitivity (S) of the GeSn HPT at 300 K.

Evaluation of the off-State Base-Emitter Voltage Requirement of the SiC BJT With a Regenerative Proportional Base Driver Circuit and Their Application in an Inverter

A strong candidate device for use in high-efficiency and high-density power converters is the SiC bipolar junction transistor, which requires a continuous gate (base) current to maintain its on -state. A base driver circuit with regenerative collector current feedback using a current transformer, and a negative off -state base-emitter voltage is presented in this article. The off -state base-emitter voltage required to prevent simultaneous conduction of a commercially available device when subjected to d v /d t’ s is assessed. The device is then utilized in a three-phase dc-to-ac power converter where the efficacy of using the proposed base driver is evaluated. The off -state base-emitter voltage used is informed by the d v /d t tests. The converter is supplied from a 600-V dc rail, switches at 50 kHz and supplies a 4.1-kW load at a modulation index of 0.9. An efficiency of 97.4% was measured.

Design and Analysis of Ge/Ge1-xSnx/Ge Heterojunction Phototransistor for MIR Wavelength Biological Applications

This work presents the influence of lateral scaling such as emitter layer thickness and base layer thickness on the responsivity spectra and frequency response of Ge/ Ge1-x Snx/Ge p-n-p heterojunction phototransistor (HPT), a generalized detector for biological sensing and defense applications. The proposed structure contains Ge1-x Snx alloy in the base layer, allowing extension of the photodetection to the mid-infrared (MIR) applications. The study takes account of the effect of base-emitter voltage and Sn concentration on the frequency performance of the HPT. In addition, we have also estimated gain as a function of lateral scaling of the HPT. The calculated results show that cutoff frequency (fT)and maximum frequency (fmax) are not only strongly dependent on the lateral scaling of HPT but also on the Sn concentration and applied base-emitter voltage. Furthermore, gain is less dependent on the emitter layer thickness, however, it is strongly dependent on the base layer thickness. With the GeSn base (with Sn = 9%), fT > 65 GHz for the optimized emitter and base layer thickness of 100 nm and 50 nm, respectively, can be achieved compared with that of InGaAs based HPT. The proposed GeSn HPT exhibits the high spectral responsivity >100 A/W at 1550 nm and >32 A/W at 2100 nm and response time ~2.41 ps. Therefore, the proposed HPT may open up a potential candidate for mid-infrared photodetection in bio-sensing applications.

Effects of pre-irradiated thermal treatment on ideal factor of excess base current in bipolar transistors

&lt;sec&gt;During the service of the spacecraft, it will be disturbed by the energetic particles and rays, and thus induce total ionizing dose (TID), displacement damage (DD) or single event effect (SEE) to generate inside the electronic system, which can seriously affect the service lifetime of the electronic components. The difference in structure and types of electronic components are less sensitive to the radiation effects, but bipolar transistor is strongly sensitive to ionizing radiation effect. As a basic component of bipolar circuits, the in-depth study of bipolar transistor ionization radiation effect is of significance for engineering.&lt;/sec&gt;&lt;sec&gt;It has been shown that the an amount of hydrogen can inevitably introduced from an external source during the sealing process of the devices. The KOVAR alloy is widely used as a metal cap material of bipolar transistor in the process of encapsulation. The residual gas analysis (RGA) for sealed Kovar lid packages is shown to have 1%–2% of the hydrogen in the cavity. The source of the hydrogen is generally considered to be out-gassing from the gold plating on the KOVAR. So far, the researches have focused on the study of the ionization damage effect of bipolar transistors with different structures under &lt;sup&gt;60&lt;/sup&gt;Co gamma ray irradiation. There is lack of systemic study on the comparison of transistors packaged with and without cap.In this paper, we study the influence of sealed KOVAR lid packaged on ionizing radiation damage of lateral PNP bipolar transistor (LPNP) by using &lt;sup&gt;60&lt;/sup&gt;Co gamma ray as an irradiation source. The semiconductor parameter analyzer is used to measure the electrical parameters of LPNP transistor during irradiation. The irradiation defects in LPNP transistors packaged with and without cap are characterized by deep level transient spectroscopy (DLTS). Experimental results show that the LPNP transistors packaged with and without cap have similar electrical characteristics. The base current increases with the total dose increasing, while the collector current remains almost constant. The degradation of LPNP transistor packaged with cap is more serious.&lt;/sec&gt;&lt;sec&gt;According to the excess base current varying with base-emitter voltage for the LPNP transistors packaged with and without cap, the degradation of bipolar transistor packaged with cap is more serious under the same irradiation conditions. According to the analysis of DLTS, comparing with bipolar transistor packaged without cap, the signal peak at about 300 K is shifted to the left for the bipolar transistor packaged with cap. These results indicate that the LPNP transistors packaged with cap can generate more interface states during irradiation, which is attributed to a large amount of hydrogen and water vapor out-gassing from the gold plating on the KOVAR, which is released under the thermal stress. In the sealed environment, hydrogen can only diffuse into the device cavity, and is combined with the metal material in the transistor to form metal hydride. Therefore the degradation of transistor is severe under the same irradiation condition.&lt;/sec&gt;

Effect of H2 on interface traps in the LPNP transistors caused by 3 MeV proton irradiations

In this paper, the effects of 3 MeV proton irradiations on gate controlled lateral PNP (GLPNP) transistors are investigated with and without molecular hydrogen (H2) soaking. The electrical parameters are measured in-situ during irradiation. Radiation defects indicated by 3 MeV protons are measured by deep level transient spectroscopy (DLTS). At a given the irradiation fluence, the degradation for the H2-soaked transistors is much larger than that for the non-soaked transistors. Excess base current (ΔIB) for the H2-soaked transistors is bigger than that for the non-soaked transistors at a given emitter-base voltage and the same irradiation fluence. According to the gate sweep (GS) curve, it can be calculated that the number of the interface traps of the H2-soaked transistors is significantly larger than that for the non-soaked transistors under the same fluence, as demonstrated by DLTS analyses. 3 MeV protons could mainly produce the ionization damage in the GLPNP transistors, displacement damage can be almost negligible. The results for the 70 keV electron irradiations further confirm that 3 MeV protons could mainly produce ionization damage in the GLPNP transistors and hydrogen can aggravate the formation of interface traps in GLPNP transistors.

Junction Temperature Measurement Method for SiC Bipolar Junction Transistor Using Base–Collector Voltage Drop at Low Current

This paper proposes an electrical method for estimation of the vertical junction temperature of silicon carbide bipolar junction transistors (SiC BJTs). This measurement method is based on measurement of the base-collector voltage (VBC) drop at a low current (VBC(low)) during the turn-off process. This voltage shows both good sensitivity and linearity with respect to temperature. The traditional temperature-sensitive electrical parameter VBE(low) (i.e., the base-emitter voltage at a low current) and an infrared camera are used to compare the characteristics of VBC(low). The results show that use of VBC(low) provides more accurate junction temperature and thermal resistance measurement results, which can then be used to extract the vertical junction temperature of the SiC BJT under test.

A 68-nW novel CMOS sub-bandgap voltage reference circuit

This paper proposes a CMOS sub-bandgap reference (sub-BGR) circuit without resistors for ultra-low power applications. The BGR core circuit consists of a vertical PNP bipolar transistor, a temperature-compensation amplifier and a Proportional to Absolute Temperature (PTAT) voltage generator. The PTAT voltage generator consists of four p-type transistors and generates a positive temperature dependent voltage, which compensates for the negative temperature dependent base-emitter voltage in a PNP bipolar transistor. The circuit generates a sub-bandgap voltage of silicon. The sub-BGR is fabricated with 65-nm standard CMOS process with an area of 400 μm × 80 μm. Experimental results demonstrate that this sub-BGR circuit can generate a 202.8 mV reference voltage with a power consumption of 68 nW.

Ultimate design and testing TPTS-based control systems with using full-scaled physical models of nuclear power plants

Radiation degradation rate of base current in SiGe HBTs was experimentally investigated using X-ray irradiation source with Cu anode at room and low temperatures. The dependences of base and collector current on the emitter-base voltage of the transistors were measured during radiation impact and presented for different total dose levels and irradiation conditions.

A Resistorless High-Precision Compensated CMOS Bandgap Voltage Reference

A resistorless high-precision compensated CMOS bandgap voltage reference (BGR), which is compatible with a standard CMOS process, is presented in this paper. A higher-order curvature correction method called base-emitter voltage linearization is adapted to directly compensate the thermal nonlinearity of base–emitter voltage. With proper mathematical operations of high-order temperature currents, most of the nonlinear temperature terms in $V_{\mathrm {BE}}$ can be greatly eliminated. The proposed BGR, which is implemented in 0.35- $\mu \text{m}$ CMOS technology, is capable of working down to 2 V supply voltages with 1.14055 V mean output voltage. A minimum temperature coefficient of 1.01 ppm/°C with a temperature range from −40 °C to 125 °C is realized, and a power-supply noise attenuation of 61 dB is achieved without any filter capacitors. The line regulation is better than 2 mV/V from 2 V to 5 V supply voltage while dissipating a maximum supply current of $33~\mu \text{A}$ . The active area of the presented BGR is 180 $\mu \text {m}\times 220\,\,\mu \text{m}$ .

Extraction and Analysis of Gamma Irradiated Si BJT SPICE Model

The Simulation Program with Integrated Circuit Emphasis (SPICE) model parameters of pre and post-irradiated silicon bipolar junction transistor (Si BJT) were extracted with the use of Altium Designer (AD)/SPICE model wizard. The percentage changes (Δ%) between forward and reverse-bias parameters of existing BJT (ZETEX BCW72) SPICE model were estimated and also the degradation Δ% between the experimental data of pre and post-irradiated Si BJT were calculated. Then the new measured results by comparison were imported into AD/SPICE model wizard to extracts forward-bias parameters. The extracted forward-bias parameters were used to generate reverse-bias parameters through Δ%. The final extracted Si BJT SPICE model parameters were implemented in SPICE simulator to obtained forward and reverse Gummel plots. As expected, base current (IB) increases, the collector current (IC) increases slightly at low bias base-emitter voltage, leading to current gain degradation due to positive charge trapped in the oxide and interface of the BJT device. In addition, the results of the IB in the forward Gummel flows in parallel with base-emitter junction, while the IB in the reverse Gummel flows across the base-collector junction down to the back side collector contact through the collector region. Finally, the compared results of Si BJT forward Gummel simulation and experimental data showed good agreement.