Area Constraints Research Articles

Custom Hire Service Business of Rice Combine Harvester in Haor Basin of Bangladesh

Mechanization is a vital issue to modernize agriculture. The entrepreneurship development is imperative to provide service to the farmers at an affordable price, especially in haor areas. The study was conceived to estimate the combine harvester's rental charge and payback period. Data were collected from 86 rice fields harvested by a whole-feed combine harvester (Model: Zoomlion) in Mithamain upazila under the Kishoreganj district representing haor area of Bangladesh. Land size, operational time, loss time, repair time, idle time, daily area coverage and constraints of harvester machine were also recorded to predict the business viability of combine harvester. The rental charge and payback period was calculated following standard protocol to make business venture profitable. The perception of farmers regarding the prospect of using combine harvester in harvesting has been recorded through personal interviews. The field capacity of combine harvester was observed as 0.20 ha hr-1. Field efficiency of combine harvester depended on the land size. The daily area coverage can be increased after careful selection of the plots. Fuel consumption was found 4.18 l ha-1. Operational consolidation is the best approach to reduce the time of movement resulting in increased daily area coverage. Seasonal use of combine harvester in one locality of the study area was observed for 22 days. The rental charge of the machine was estimated as 10,000 Tk ha-1 and payback period was 3.5 years for the area coverage of 40 ha rice fields. Farmers would be able to save 40% harvesting cost for the rental charge of Tk 10,000 ha-1. Combine harvester rental service has emerged as a viable business model in the haor basin. Whole-feed (Zoomlion model) combine harvester appeared as an effective, economical, and labour-saving harvesting machine in the haor region land tenure system.
 Bangladesh Rice j. 2019, 23(2): 65-75

Variable-fidelity multipoint aerodynamic shape optimization with output-based adapted meshes

This paper presents a method to control the discretization error in multipoint aerodynamic shape optimization using output-based adapted meshes. The meshes are adapted via adjoint-based error estimates, taking into account both the objective and constraint output errors. A multi-fidelity optimization framework is then developed by taking advantage of the variable fidelity offered by adaptive meshes. The objective functional and its sensitivity at each design point (operating condition) are first evaluated on the same initial coarse mesh, which is then subsequently adapted for each design point individually as the shape optimization proceeds. The effort to set up the optimization is minimal since the initial mesh can be fairly coarse and easy to generate. As the shape approaches the optimal design, the mesh at each design point becomes finer, in regions necessary for that particular operating condition. The multi-fidelity framework is tightly coupled with the objective error estimation to ensure the optimization accuracy at each fidelity. Computational savings arise from a reduction of the mesh size when the design is far from optimal and avoiding an exhaustive search on low-fidelity meshes. The proposed method is demonstrated on multipoint drag minimization problems of a transonic airfoil with lift and area constraints. Improved accuracy and efficiency are shown compared to traditional fixed-fidelity optimization with a fixed computational mesh.

Reliability Aware Design and Lifetime Management of Computing Platforms

Meeting reliability targets with viable costs in the nanometer landscape become a significant challenge, requiring to be addressed in an unitary manner from design to run time. To this end, we propose a holistic reliability-aware design and lifetime management framework concerned (i) at design time, with providing a reliability enhanced adaptive architecture fabric, and (ii) at run time, with observing and dynamically managing fabric's wear-out profile such that user defined Quality-of-Service requirements are fulfilled, and with maintaining a full-life reliability log to be utilized as auxiliary information during the next IC generation design. After introducing our framework and the general philosophy behind it we delve into its key components. Specifically, we first introduce design time transistor and circuit level aging models, which provide the foundation for a 4-dimensional Design Space Exploration (DSE) meant to identify a reliability optimized circuit realization compliant with area, power, and delay constraints. Subsequently, to enable the creation of a low cost but yet accurate fabric observation infrastructure, we propose a methodology to minimize the number of aging sensors to be deployed in a circuit and identify their location, and introduce a sensor design able to directly capture circuit level amalgamated effects of concomitant degradation mechanisms. Furthermore, to make the information collected from sensors meaningful to the run-time management framework we introduce a circuit level model that can estimate the overall circuit aging and predict its End-of-Life based on imprecise sensors measurements, while taking into account the degradation nonlinearities. Finally, to provide more DSE reliability enhancement options we focus on the realization of reliable processing with unreliable components, and propose a methodology to obtain Error Correction Codes protected data processing units with an output error rate smaller than the fabrication technology gate error rate.

ASSESSING THE IMPACT OF ARTISTIC ARCHITECTURE ON PERCEIVED USABILITY AND WILLINGNESS TO USE MOBILE COMMERCE APPLICATIONS

Creating a useful portable browser or program is a demanding challenge for organisations due to the size constraints of the display area, which additionally is contingent on usability, internet connectivity, efficient backup power and mobility. Users also expect performance equivalent to that of microcomputers. Portable display programmers need to surmount these challenges without compromising users’ concerns for safety and confidentiality. Various works in the past couple of years revealed the ability of a strongly perceived artistic architecture of a mobile website as a push to overcome clients’ reduced skill. The investigation conducted in this report sought to determine the distinct impact of eight artistic display on the of a mobile website or program and the corresponding clients’ . Organisations may thus take advantage of this knowledge to improve usage, trust, frequency of adoption and consequently financial rewards on m-commerce applications. This study uses a with a screening objective. Data for the experiment was sourced through a web-based questionnaire program, . At the same time, social network sites were used to disseminate the questionnaires to enable gathering a good number of respondents. The data collection instrument had statements with threshold for Ninety-six participants took part in the inquiry. In contrast, seventy-six participants completed the exercise, signifying an estimated. was used in the study of the association concerning the . package was utilised in the evaluation of the . Findings revealed that artistic architecture bears a substantial impact on of portable websites and programs as well as influences artefacts on such platforms. , as well as the of an application, turned out as two features with the highest impact on the two factors. That the orientation of their effects is a reverse of the conjectured outcome suggests that future work should explore this issue.

Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint

Compute-in-memory (CIM) is a promising computing paradigm to accelerate the inference of deep neural network (DNN) algorithms due to its high processing parallelism and energy efficiency. Prior CIM-based DNN accelerators mostly consider full custom design, which assumes that all the weights are stored on-chip. For lightweight smart edge devices, this assumption may not hold. In this article, CIM-based DNN accelerators are designed and benchmarked under different chip area constraints. First, a scheduling strategy and dataflow for DNN inference is investigated when only part of the weights can be stored on-chip. Two weight reload schemes are evaluated: 1) reload partial weights and reuse input/output feature maps and 2) load a batch of input and reuse the partial weights on-chip across the batch. Then, system-level performance benchmark is performed for the inference of ResNet-18 on ImageNet data set. The design tradeoffs with different area constraints, dataflow, and device technologies [static random access memory (SRAM) versus ferroelectric field-effect transistor (FeFET)] are discussed.

Design of nanofluid-cooled heat sink using topology optimization

The paper presented topology optimization of 2D and 3D Nanofluid-Cooled Heat Sink (NCHS). The flow and heat transfer problem in the NCHS was treated as a single-phase nanofluid based convective heat transfer model. The temperature-dependent fluid properties were taken into account in the model due to the strong temperature-dependent features of nanofluids. An average temperature minimum problem was studied subject to the fluid area and energy dissipation constraints by using the density method. In the method, the design variable is updated according to the gradient information obtained by an adjoint based sensitivity analysis process. The effects of the energy dissipation constraint, temperature-dependent fluid properties and nanofluid characteristics on optimal configurations of NCHS were numerically investigated with following conclusions. Firstly, branched flow channels in the optimal configuration increased with the rise of the allowed energy dissipation. Secondly, temperature-dependent fluid properties were significant for obtaining the appropriate optimal results with best cooling performance. Thirdly, heat transfer performances of optimal configurations were enhanced by reducing the nanoparticle diameter or increasing the nanoparticle volume fraction. Fourthly, the optimal configuration for nanofluid had better cooling performance than that for its base fluid.

A comprehensive techno-economic analysis for optimally placed wind farms

Wind power project development investment is based on the separate technical and financial analyses. Based on the actual wind data, data-based wind distribution map and wake effect model, a combined techno-economic analysis is proposed in this paper. Starting from deriving the wind distribution map, a comprehensive analysis extending to the feasibility assessment of the project is presented here. The problem is formulated as the maximization of net present value of the project subject to the specified initial investment cost within a fixed area and turbine spacing constraints. Simultaneous optimization of the wind turbine size, hub height and placement is realized with BPSO-TVAC. Sensitivity analysis and Monte Carlo simulation are used to investigate the feasibility of the project, against various parameters, imposed on by the techno-economic constraints. Hypothesis testing with a confidence level of 99.99% corroborates the results obtained from Monte Carlo simulation. With scenario analysis, a positive NPV is identified even in the worst-case scenario, an attractive trait for investors. An ideal decision-making tool considering technical efficiency and profitability simultaneously is presented.

Multi-Objective Sizing Optimization of a Grid-Connected Solar–Wind Hybrid System Using Climate Classification: A Case Study of Four Locations in Southern Taiwan

Increased concerns over global warming and air pollution has pushed governments to consider renewable energy as an alternative to meet the required energy demands of countries. Many government policies are deployed in Taiwan to promote solar and wind energy to cope with air pollution and self-dependency for energy generation. However, the residential sector contribution is not significant despite higher feed-in tariff rates set by government. This study analyzes wind and solar power availability of four different locations of southern Taiwan, based on the Köppen–Geiger climate classification system. The solar–wind hybrid system (SWHS) considered in this study consists of multi-crystalline photovoltaic (PV) modules, vertical wind turbines, inverters and batteries. Global reanalysis weather data and a climate-based electricity load profile at a 1-h resolution was used for the simulation. A general framework for multi-objective optimization using this simulation technique is proposed for solar–wind hybrid system, considering the feed-in tariff regulations, environmental regulations and installation area constraints of Taiwan. The hourly load profile is selected using a climate classification system. A decomposition-based differential evolutionary algorithm is used for finding the optimal Pareto set of two economic objectives and one environmental objective with maximum installation area and maximum PV capacity constraints. Two types of buildings are chosen for analysis at four climate locations. Analysis of Pareto sets revealed that the photovoltaic modules are economic options for a grid-connected mode at all four locations, whereas solar–wind hybrid systems are more environmentally friendly. A method of finding the fitness index for the Pareto front sets and a balanced strategy for choosing the optimal configuration is proposed. The proposed balanced strategy provides savings to users—up to 49% for urban residential buildings and up to 32% for rural residential buildings with respect to buildings without a hybrid energy system (HES)—while keeping carbon dioxide (CO2) emissions lower than 50% for the total project lifecycle time of 20 years. The case study reveals that for all four locations and two building types an HES system comprising a 15 kW photovoltaic system and a small capacity battery bank provides the optimal balance between economic and environmental objectives.

Spectral Coexistence of LDACS and DME: Analysis via Hardware Software Co-Design in Presence of Real Channels and RF Impairments

To meet the exponentially increasing air traffic, L-band (960--1164 MHz) digital aeronautical communication system (LDACS) has been introduced. The LDACS aims to exploit the vacant spectrum between incumbent Distance Measuring Equipment (DME) signals and envisioned to follow an orthogonal frequency division multiplexing (OFDM) approach to support high-speed delay-sensitive multimedia services. This paper deals with the design and implementation of end-to-end LDACS the transceiver on the Zynq System on Chip platform, consisting of FPGA as programmable logic (PL) and ARM as processing system (PS). We consider OFDM based LDACS and improve it further using windowing and/or filtering. We propose a hardware-software co-design approach and analyze various transceiver configurations by dividing it into PL and PS. We demonstrate the flexibility offered by such a co-design approach to choose the configuration as well as word-length for a given area, delay and power constraints. The transceiver is also integrated with the programmable analog front-end to validate its functionality in the presence of various RF impairments and wireless channels and interference specific to the LDACS environment. Via in-depth performance analysis concerning parameters such as out-of-band attenuation, DME interference, bit-error-rate, word-length, and complexity, we demonstrate wide bandwidth filtered OFDM as an attractive solution for the next generation LDACS.

Energy-performance management in battery powered reconfigurable processors for standalone IoT systems

Reconfigurable processors are gaining more attention in battery powered portable platforms like IoTs. As the FPGA based reconfigurable processors are power hungry and the energy source is limited in battery powered system, energy management is vital for such systems. This paper addresses an energy-performance management method in battery powered reconfigurable processors for standalone IoT systems. It considers battery characteristics and nonlinearities to select the best set of task types with respect to energy-performance management policies while satisfying area and energy consumption constraints in different situations. The proposed method decides based on battery level and rate of discharge to adopt two different strategies: (1) energy-performance trade-off, (2) energy minimization. The proposed method benefits from three tools to reduce the power consumption: (1) reducing the total number of performed reconfiguration during the battery life, (2) using battery-ware scheduling, (3) reducing occupied resources. The results show that the energy-performance management system extends battery lifetime by 34% in energy minimizing scenario. Moreover, it boosts the average performance by 31% while extending the battery lifetime by 25% in the complete discharging scenario. In the situation that the battery is charging, the energy-performance management system has achieved an increment of 74% in performance compared to (3).

Industrial human resource management optimization based on skills and characteristics

In an increasingly diversified and competitive job market, not only is seeking the right job more challenging but also for companies, finding and holding on to the right persons is becoming the competitive edge necessary to outperform and grow. Skill preference and personality traits are key factors used to find the right candidate and previously many of this process have been conducted manually. The characteristics of job candidate and core-workers in companies are represented by Myers-Briggs Type Indicator (MBTI). The main reason for considering personality trait is to find and hire job candidates having the same trait as the company’s core employees’ hard working and loyal employees so that adapting to company culture and environment does not become difficult process for new hires. In this paper, the framework named Artificial Intelligence based Design platform (AID) has been applied for career matching based on companies’ and candidates’ skill preferences and MBTI with constraint of working location. The paper investigates three conceptual matching optimizations including (1) skill preferences, (2) skill preferences under working area constraint, (3) skill and MBTI preference with working area constraint. The numerical results show that the proposed method produces higher quality matching when compared to the conventional methods.

Total variation of the normal vector field as shape prior

An analogue of the total variation prior for the normal vector field along the boundary of smooth shapes in 3D is introduced. The analysis of the total variation of the normal vector field is based on a differential geometric setting in which the unit normal vector is viewed as an element of the two-dimensional sphere manifold. It is shown that spheres are stationary points when the total variation of the normal is minimized under an area constraint. Shape calculus is used to characterize the relevant derivatives. Since the total variation functional is non-differentiable whenever the boundary contains flat regions, an extension of the split Bregman method to manifold valued functions is proposed.

A Low-Overhead FFT Design With Higher SEU Resilience Implemented in FPGA

For area and power constraint applications in mission critical systems, the traditional fast Fourier transform (FFT) design requires huge hardware resources for data processing. In this article, we, therefore, present a low-overhead radix-2 FFT design that reduces hardware resources by simplifying the first two stages of the butterfly computations. Both the proposed design and the traditional design have been implemented in the MicroZus-20 (XC7Z020) platform. Their single-event performances have been compared through both fault injections and neutron exposure, and the experimental results demonstrate that the proposed design reduces the soft error rate by 53.8%. Also, the proposed FFT reduces the hardware resource consumption and circuit area by 64.8% when compared with the traditional design.

Power-Effective Vedic-Hierarchical Multiplier

The motivation of this project is to design a power effective multiplier without having much drawback in term of time constraint and area utilization. This is due to the overall power dissipation which increases in direct proportion to the increase in power density. The area and time constraint are considered as pertinent design parameters with the increase in market demand for high performance and complex portable systems. The current hierarchical multiplier designs suffer on long critical path and large area utilization. These parameters caused the hierarchical multiplier design to be less effective in term of power saving. The objective of this research is to reduce overall power dissipation and ensure that the multiplierachieve timing requirement. This paper proposes the design 1 by using two 4-bit Binary-to-Excess-One Converter (BEC) instead of an 8-bit BEC. The BEC reduce the critical path and cause low power dissipation. Design 2 which is implementation of Carry Select Adder (CSlA) with tristate buffer is to reduce logic elements. The power dissipation is reduced because of the decrease in the number of logic elements which leads to the lower number of logic gates. Both advantages of design 1 and design 2 are combined to become design 3. Design 3 is the lowest power dissipation design because it consists of the lowest number of logic elements and the shortest critical path. The timing requirement for all designs are met as shown by the positive slack time of 9.034 ns, 8.686 ns and 9.404 ns respectively. The power dissipation of the combinational multipliers designs have been improved to 60.96%, 60.89% and 61.02% respectively.

HYDRAULIC AND THERMAL PERFORMANCES OF LAMINAR FLOW IN FRACTAL TREELIKE BRANCHING MICROCHANNEL NETWORK WITH WALL VELOCITY SLIP

This work theoretically studies the effects of wall velocity slip on the hydraulic resistance and convective heat transfer of laminar flow in a microchannel network with symmetric fractal treelike branching layout. It is found that the slip can reduce the hydraulic resistance and enhance the Nusselt number of laminar flow in the network; furthermore, the slip can also affect the optimal structure of the fractal treelike microchannel network with minimum hydraulic resistance and maximum convective heat transfer. Under the size constraint of constant total channel surface area, the optimal diameter ratio of microchannels at two successive branching levels of the symmetric fractal treelike microchannel network with a minimized hydraulic resistance is only dependent on branching number [Formula: see text] in the manner of [Formula: see text] for no slip condition, but decreases with the increasing slip length, the increasing branching number and the increasing length ratio of microchannels at two successive branching levels for slip condition. The convective heat transfer of the treelike microchannel network is independent on the diameter ratio for no slip condition, but displays an increasing after decreasing trend with the increasing diameter ratio for slip condition. The symmetric treelike microchannel network with the worst convective heat transfer performance is the network with diameter ratio equaling one for slip condition.

8‐bit serialised architecture of SEED block cipher for constrained devices

This study presents an 8-bit serialised architecture of SEED block cipher for constrained devices. The circuit utilises 356 FPGA slices and 447 1-bit registers flip-flops (FFs) in the BASYS3 board, operates with an 8-bit datapath and is aimed for use on area constraints devices. In order to keep the usage of hardware resources to a minimum but, at the same time, achieve a high level of security, the key generation process of SEED is implemented through an on-the-fly procedure. In addition, the necessary S-boxes are implemented using composite field arithmetic without using any block RAMs, resulting in a very compact implementation. The proposed architecture achieves a maximum frequency equal to 125 MHz with a total latency of 280 clock cycles and a throughput up to 57.1 Mbps for encryption or decryption.

Multi-Level Design Influences on Robustness Evaluation of 7nm FinFET Technology

Transistor arrangement influences the performance of logic cells. Complex logic cells can be used to minimize area, delay, and power. However, with the increasing relevance of nanometer challenges such as process variability and radiation effects, it is also necessary to consider these factors at logic level design. The main contribution of this work is to evaluate the advantages of adopting a multi-level logic design instead of using complex gates to mitigate process variability and radiation effects. A justification for choosing the parameter that will characterize process variability is presented. Also, the analysis with different transistor arrangements and sizing is carried out to provide a basis for a better understanding of the obtained results. The experimental evaluation considers two topologies: complex gates and multi-level using basic gates, for a set of logic gates using the 7nm FinFET technology at the layout level. As expected, at nominal conditions, the best choice is to adopt complex gate topology to optimize area, power consumption, and performance. However, the logic multi-level arrangements became the functions up to 50% less sensitive to the transient faults and at least 30% more robust to the process variability effects. A trade-off needs to be done, considering the area and power constraints.

STEREOS: Smart Table EntRy Eviction for OpenFlow Switches

Software-defined networking (SDN) is fundamentally changing the way networks operate, enabling programmable and flexible network management and configuration. As the de facto standard southbound interface of SDN, OpenFlow defines how the control plane interacts with the data forwarding plane. In OpenFlow, flow tables play a significant role in packet forwarding. However, the size of the flow table is limited due to power, cost, and silicon area constraints and capacity-limited tables cannot hold all of the active flows in medium-to-large-scale SDN networks. Thus, when a flow table reaches capacity, an intelligent eviction strategy, which efficiently manages the limited flow table resource, is critical. In this paper, we propose Smart Table EntRy Eviction for OpenFlow Switches (STEREOS), which uses machine learning to classify flow entries as active or inactive and forms the basis for intelligent eviction. Trace-driven simulations demonstrate that STEREOS increases flow table usage by more than 50% and reduces incorrect flow entry evictions by up to 78%, compared with the dominant Least Recently Used eviction policy. Moreover, packet-level simulations of a datacenter network demonstrate that STEREOS can greatly reduce the control overhead, increase overall network throughput by 19%, and reduce packet loss rate by 70%.

A Level Set Method with Region-Scalable Fitting Energy for Retinal Layer Segmentation in Spectral-Domain Optical Coherence Tomography Images

Retinal layer segmentation of spectral-domain optical coherence tomography images plays an important role during diagnosis and analysis of ophthalmic diseases. In this paper, a novel variational level set framework with region-scalable fitting energy is proposed for automated retinal layer segmentation in SD-OCT. To the best of our knowledge, it is the first time that level set based method succeeds in ten retinal layers segmentation. The proposed framework consists of three steps. First, an anisotropic nonlinear diffusion filter is applied for speckle noise reduction and ROI contrast enhancement. Second, Canny edge detectors are used to extract initial layers: nerve fiber layer, connecting cilia and retinal pigment epithelium. Finally, the rest retinal layers are segmented by means of level set model combined with prior knowledge of retinal thickness and morphology, for which the energy function consists of region-scalable fitting energy data term, area constraint term, regularization term and length penalty term. The proposed method was tested on 50 retinal SD-OCT B-scans from 50 normal subjects. The overall unsigned border position error is 5.92 ± 4.72 μm. The result showed that data terms with border weight terms can keep layer segmentation results in strong border while retaining its fitting capability in weak border. The proposed method achieves better segmentation result than other active contour models.

Fuzzy logic hybridized artificial intelligence for computing and networking on internet of things platform

Artificial intelligence Computerized modelling is the best solution to manage immense information and storage in the IoT Network. Furthermore, IoT these days becoming more increasingly well-known with the development of high speed web systems and many advanced sensors that can be coordinated into a microcontroller. The information flows in the virtual environment presently will have these sensors data and the client information that can be send and receive information from the workstations using the peer to peer networking and computing. With the increase in the quantity of workstation and an ever increasing number of sensors, a few information might confront issues on the storage, delay, area constraint and congestion in the systems. To keep away from these issues, numerous mathematical calculations have been proposed in the recent past which has not been developed an fruitful solution for this issues.. In this work, an advanced fuzzy hybridized Artificial Intelligence system has been proposed to management the request on IoT platform. The significance of request management and computing has been processed in this paper. The experiment results show prominent outcomes than traditional methods.