Anti-parallel Diode Research Articles

A Time-Domain-Model-Based Digital Synchronous Rectification Algorithm for CLLC Resonant Converters Utilizing a Hybrid Modulation

For bidirectional <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CLLC</i> resonant converters, synchronous rectification (SR) is a key technique that can reduce the conduction losses in rectifying side by replacing the diodes with the switches’ channel. However, existing methods suffer from either complex hardware, or incomplete and imprecise control effect. Aiming at solving these problems, this article proposes a digital sensorless SR algorithm based on the time-domain model under a hybrid modulation for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CLLC</i> converters. The proposed approach can precisely enable the SR drive action within almost the whole load range and without any additional hardware, e.g., antiparallel diode, SR IC, and high bandwidth sensor. Its implementation only needs to measure dc signals (e.g., the output current), rather than any high-frequency resonant signals. Additionally, the presented algorithm can be easily implemented on a digital controller. Finally, experiments have been performed on a prototype to verify the validity and applicability of the presented SR algorithm.

A Novel Carrier Scheme Combined with DPWM Technique in a ZVS Grid-Connected Three-Phase Inverter

In this paper, a novel switching scheme using discontinuous pulse-width modulation (DPWM) for a zero-voltage switching (ZVS) grid-connected three-phase inverter is proposed. ZVS in the main and auxiliary switches was achieved. Moreover, the reverse recovery currents of the anti-parallel diodes in the main switches were suppressed. A circuit analysis was performed, and a simulation was carried out. Furthermore, a prototype of the ZVS grid-connected three-phase inverter was constructed to verify the effectiveness of the proposed PWM control scheme. Both the simulation and experimental results verified the validity of the proposed PWM control scheme.

Noninvasive Model-Based Open-Circuit Switch Fault Detection of AC-Bypass Leg Switches in Transformerless PV Inverter

Transformerless inverters are being used for integrating photovoltaic (PV) sources into the grid. Highly efficient and reliable inverter concept (HERIC) inverter is one such topology, which is derived from an H-bridge by adding a bypass leg on the ac side using two back-to-back insulated gate bipolar transistors (IGBTs). Open-circuit fault in the bypass leg would result in conduction of current through antiparallel diodes of the main switches of the inverter, effectively making the inverter operate in bipolar mode. As a result of the fault, there would not be an issue of leakage current, and the operation would continue at the expense of increased conduction losses and dc-offset in the grid current. This article proposes an online noninvasive model-based technique to detect switch faults in the bypass leg of the HERIC inverter. The grid current at the peak of the carrier signal is predicted based on the measured grid current at the start of the zero states. By comparing the estimated and measured grid currents at the peak of the carrier signal, the faulty switch in the bypass leg is localized. Once the fault is localized, the inverter’s modulation scheme is changed to conventional bipolar mode to improve the performance of the converter during the post-fault stage. A detailed simulation study is carried out to verify the effectiveness of the proposed approach. Experimental tests on the prototype converter show that the proposed algorithm can reliably detect the open-circuit fault in switches of the bypass leg, and once a fault is detected, the algorithm would change the modulation scheme to bipolar mode to minimize the inverter loss and dc-offset in the grid current.

Four-Scroll Hyperchaotic Attractor in a Five-Dimensional Memristive Wien Bridge Oscillator: Analysis and Digital Electronic Implementation

An electronic implementation of a novel Wien bridge oscillation with antiparallel diodes is proposed in this paper. As a result, we show by using classical nonlinear dynamic tools like bifurcation diagrams, Lyapunov exponent plots, phase portraits, power density spectra graphs, time series, and basin of attraction that the oscillator transition to chaos is operated by intermittency and interior crisis. Some interesting behaviors are found, namely, multistability, hyperchaos, transient chaos, and bursting oscillations. In comparison with some memristor-based oscillators, the plethora of dynamics found in this circuit with current-voltage (i–v) characteristic of diodes mounted in the antiparallel direction represents a major advance in the knowledge of the behavior of this circuit. A suitable microcontroller based design is built to support the numerical findings as these experimental results are in good agreement.

Low-noise sub-harmonic-mixing in 300-GHz band by Fermi-level managed barrier diode

We investigated the effect of device parameters on intermediate-frequency (IF) output power in sub-harmonic mixing by an anti-parallel diode pair based on Fermi-level managed barrier (FMB) diodes. The IF output power peaked as the local oscillator (LO) power increased due to the saturation of the FMB diode itself. The peak IF output power was found to increase as barrier height increased while it stayed nearly the same as the junction area increased. The lowest noise equivalent power of 4 × 10–19 W Hz−1 was obtained with an LO power of only 160 μW at a signal frequency of 304 GHz.

A Novel Repetitive High-Voltage Resonant Pulse Generator for Plasma-Assisted Milling

This article puts forward a high repetition rate and high-voltage resonant pulse generator for plasma-assisted milling. This circuit uses only one semiconductor switch with an antiparallel diode and works in the resonant mode with the help of a resonant inductor, a resonant capacitor, and a pulse transformer to generate high-voltage pulses. An equivalent circuit of the proposed topology considering parasitic elements is established. Based on the equivalent circuit, the working principle of the pulse generator is analyzed in detail. In order to verify the theoretical analysis and circuit operation, a laboratory prototype with a 150-V dc input is implemented. The pulse repetition rate can be adjusted from 5.32 to 18.90 kHz, and the peak output voltage correspondingly varies between 8.84 and 11.7 kV. The pulse generator is used to drive a dielectric barrier discharge plasma-assisted milling chamber. Experimental results show that the pulse generator can work stably.

An Improved Voltage Clamp Circuit Suitable for Accurate Measurement of the Conduction Loss of Power Electronic Devices.

Power electronic devices are essential components of high-capacity industrial converters. Accurate assessment of their power loss, including switching loss and conduction loss, is essential to improving electrothermal stability. To accurately calculate the conduction loss, a drain–source voltage clamp circuit is required to measure the on-state voltage. In this paper, the conventional drain–source voltage clamp circuit based on a transistor is comprehensively investigated by theoretical analysis, simulations, and experiments. It is demonstrated that the anti-parallel diodes and the gate-shunt capacitance of the conventional drain–source voltage clamp circuit have adverse impacts on the accuracy and security of the conduction loss measurement. Based on the above analysis, an improved drain–source voltage clamp circuit, derived from the conventional drain–source voltage clamp circuit, is proposed to solve the above problems. The operational advantages, physical structure, and design guidelines of the improved circuit are fully presented. In addition, to evaluate the influence of component parameters on circuit performance, this article comprehensively extracts three electrical quantities as judgment indicators. Based on the working mechanism of the improved circuit and the indicators mentioned above, general mathematical analysis and derivation are carried out to give guidelines for component selection. Finally, extensive experiments and detailed analyses are presented to validate the effectiveness of the proposed drain–source voltage clamp circuit. Compared with the conventional drain–source voltage clamp circuit, the improved drain–source voltage clamp circuit has higher measurement accuracy and working security when measuring conduction loss, and the proposed component selection method is verified to be reasonable and effective for better utilizing the clamp circuit.

Analysis of Reverse Recovery Characteristics of Anti-parallel Diode

Insulated gate bipolar transistor (IGBT) is widely used in various renewable green energy systems such as wind power generation and solar power generation at present. High-power IGBT modules usually include IGBT chips and anti-parallel diodes, and the transient characteristics of anti-parallel diodes will affect the external port characteristics of IGBT modules. Based on semiconductor physics and diode basic structure, this paper analyzes four stages of diode reverse recovery process, and describes the change process of turn-off time and stored charge by a step recovery process. Finally, the voltage and current waveforms of diode reverse recovery process are simulated and verified for a certain IGBT module.

A simple anti-parallel diodes based chaotic jerk circuit with arcsinh function: theoretical analysis and experimental verification

This paper introduces a novel autonomous chaotic jerk circuit with an antiparallel diodes pair whose mathematical model involves an inverse hyperbolic sine function in the form: $$f\left( x \right) = k - 2x + 4\arcsin h\left( {mx} \right)$$ where $$k$$ (i.e. a constant excitation source) controls the symmetry of the model while $$m$$ represents the slope of the inverse hyperbolic sine. The presence of the inverse hyperbolic sine is unusual provided that such types of circuits are connected to hyperbolic sine nonlinearity. The analysis of the model indicates that in case of a perfect symmetry ( $$k = 0.0$$ ), the system undergoes spontaneous symmetry breaking, period doubling scenario to chaos, symmetry recovering crisis, coexistence of multiple pairs of symmetric attractors, and coexisting symmetric bubbles of bifurcation. More complex and incoherent nonlinear dynamic patterns occur in the presence of symmetry perturbation ( $$k\ne 0.0$$ ) including for instance non-symmetric Hopf bifurcations, coexisting point attractor and limit cycle, coexisting asymmetric bubbles of bifurcations, critical transitions, and coexisting (i.e. up to five) non-symmetric periodic and chaotic attractors. The space magnetization resulting from the presence of various coexisting attractors is examined and illustrated by using basins of attraction. The predictions of theoretical investigations are supported by laboratory experimental tests based on a prototypal electronic circuit mounted on a breadboard.

Junction Temperature Measurement Method for Thermal Resistance Testing of SiC MOSFET Module

The internal anti-parallel Schottky barrier diode threshold voltage of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) modules is less than that of their body diodes, which prevents the use of the body diode voltage drop to measure junction temperature. In this paper, a thermal resistance test of the SiC MOSFET module is proposed based on the onstate voltage drop as a temperature-sensitive electrical parameter. Measurements are performed with the method and its feasibility evaluated. The on-state voltage drop temperature sensitivity under different gate voltages and the repeatability of the on-state voltage drop parameters before and after electric power heating in the thermal resistance tests are studied. The on-state voltage drop is measured under a high gate voltage and the accuracy of junction temperature measurement improves when the grid voltage remains the same during heating and measurement.

A 20.8-Gbps dual-carrier wireless communication link in 220-GHz band

With the successful demonstration of terahertz (THz) high-speed wireless data transmission, the THz frequencies are now becoming a worth candidate for post-5G wireless communications. On the other hand, to bring THz communications a step closer to real scenario application, solving high data rate realtime transmission is also an important issue. This paper describes a 220-GHz solid-state dual-carrier wireless link whose maximum transmission real-time data rates are 20.8 Gbps (10.4 Gbps per channel). By aggregating two carrier signals in the THz band, the contradiction between high real-time data rate communication and low sampling rate analog-to-digital (ADC) and digital-to-analog converter (DAC) is alleviated. The transmitting and receiving front-ends consist of 220-GHz diplexers, 220-GHz sub-harmonic mixers based on anti-parallel Schottky barrier diodes, G-band low-noise amplifiers (LNA), WR-4.3 band high-gain Cassegrain antennas, high data rates dual-DAC and -ADC baseband platform and other components. The low-density parity-check (LDPC) encoding is also realized to improve the bit error rate (BER) of the received signal. Modulated signals are centered at 214.4 GHz and 220.6 GHz with -11.9 dBm and -13.4 dBm output power for channel 1 and 2, respectively. This link is demonstrated to achieve 20.8-Gbps real-time data transmission using 16-QAM modulation over a distance of 1030 m. The measured signal to noise ratio (SNR) is 17.3 dB and 16.5 dB, the corresponding BER is 8.6e-7 and 3.8e-7, respectively. Furthermore, 4K video transmission is also carried out which is clear and free of stutter. The successful transmission of aggregated channels in this wireless link shows the great potential of THz communication for future wireless high-rate real-time data transmission applications.

A wideband subharmonic passive image rejection mixer

This article presents a circuit topology for a wideband subharmonic image rejection mixer. The mixer circuit is realized by employing two identical subharmonic mixers based on Schottky antiparallel diode pair, a wideband 90° differential phase shifter and a band pass filter without involving bonding wires, high impedance or tightly coupled arms. To demonstrate the topology, a mixer with 1 GHz as the fixed intermediate frequency is fabricated for 6 to 10 GHz of RF frequency. The lower side band is considered as the undesired band. Measurement results exhibit a minimum conversion loss of 7.87 dB and a maximum image rejection ratio of 41 dB at a local oscillator drive level of 9 dBm. Measured 1 dB compression point is 3 dBm. There is no requirement of DC bias.

Stumped nature hyperjerk system with fractional order and exponential nonlinearity: Analog simulation, bifurcation analysis and cryptographic applications

This article presents the construction and consumption of hyperjerk system having chaotic nature with the commensurate ordered fractional derivative on rapidly digitalized emerging technologies. The system analyzed analytically using Lipschitz condition and numerically with the help of predictor corrector approaches. Originality of constructed system is confirmed using log error plots which gives satisfactory small values on finite time scale. The dynamical performances of the complex system are termed in multiple phase planes by the mean of their significant nature. Stability and bifurcation analysis around the fractional derivative is also studies for the various parameter of system to check the visibility of chaotic solution. The system is also designed in analog circuit simulator with the aid of operational amplifier, anti-parallel semiconductor diodes for validation of the system. With the help of random number generators (RNGs), binary array generated from the hyperjerk system and plugged in to the NIST 800–22 test suite to measure the randomness. The array having high randomness is used as strong cypher key for the cryptographic execution straightforwardly in both direction encryption and decryption.

HVDC Breaker Power Loss Reduction by Bridge-Type Hybrid Breakers

Several types of high voltage direct current (HVDC) breakers have been introduced and commercialized. Each of them has advantages and disadvantages. Among them, the hybrid HVDC breaker is highly successful. One of the most important concerns that the hybrid HVDC breaker has faced is high power loss throughout its fault current breaking process. The hybrid HVDC breaker comprises a high voltage bidirectional main HVDC breaker. A significant number of electronic switches need to be connected in a series where anti-parallel diodes are essentially embraced. During fault inception, a number of series solid-state switches and a number of series diodes dramatically increase the power loss of the main breaker. This study, firstly, studies the power loss of the hybrid HVDC breaker and later develops a structure of a full-bridge hybrid breaker (FBHB) to reduce the losses of the current structure both in the normal and fault protection states. In this paper simulations are done based on PSCAD. In addition to the analytical study and simulations, we show that the developed structure substantially decreases the amount of power lost during the normal operation and fault current breaking stage.

Experimental characterization of a one-dimensional nonreciprocal acoustic metamaterial with anti-parallel diodes

Characterization of a newly developed class of passive nonreciprocal acoustic metamaterials is presented in an attempt to quantify their ability of controlling the flow and distribution of acoustic energy in acoustic cavities and systems. The proposed nonreciprocal acoustic metamaterial (NAMM) cell consists of a one-dimensional acoustic cavity provided with piezoelectric flexible boundaries connected to an array of anti-parallel diodes to introduce the nonlinear damping effect that tends to break the reciprocity of the energy flow through the NAMM cell. A comprehensive experimental characterization of prototypes of the NAMM cells is presented here in order to investigate the effect of various anti-parallel diode arrangements on the nonreciprocal behavior of the cell. Furthermore, the experimental characterization aims also at demonstrating the effectiveness of the proposed NAMM in tuning the directivity, flow, and distribution of acoustic energy propagating through the metamaterial.

High power density inverter utilizing SiC MOSFET and interstitial via hole PCB for motor drive system

AbstractThis paper proposes a high power density inverter utilizing SiC metal‐oxide‐semiconductor field‐effect transistor (MOSFET) modules and an interstitial via hole (IVH) printed circuit board (PCB) for a motor drive system. The inverter also includes a power circuit, heatsink, cooling fan, gate drive circuit, and DC capacitors. The output power density of the proposed inverter is 81 kW/L. The inverter outputs 37 kW for motor drive applications. To achieve this superior output power density, this paper explains a prototype SiC MOSFET module without an antiparallel schottky barrier diode, and a unique multilayer laminate IVH PCB to connect the modules and DC capacitors. This paper describes the experimental results to verify the motor drive performance and the increase in temperature under the rated load operation.

First Demonstration of L-Band High-Power Limiter with GaN Schottky Barrier Diodes (SBDs) Based on Steep-Mesa Technology

Gallium nitride (GaN) has attracted increased attention because of superior material properties, such as high electron saturation velocity and high electrical field strength, which are promising for high-power microwave applications. We report on a high-performance vertical GaN-based Schottky barrier diode (SBD) and its demonstration in a microwave power limiter for the first time. The fabricated SBD achieved a very low differential specific on-resistance (RON,sp) of 0.21 mΩ·cm2, attributed to the steep-mesa technology, which assists in reducing the spacing between the edge of the anode and cathode to 2 μm. Meanwhile, a low leakage current of ~10−9 A/cm2@−10 V, a high forward current density of 9.4 kA/cm2 at 3 V in DC, and an ideality factor of 1.04 were achieved. Scattering parameter measurements showed that the insertion loss (S21) was lower than −3 dB until 3 GHz. In addition, a microwave power limiter circuit with two anti-parallel diodes was built and measured on an alumina substrate. The input power level reached 40 dBm (10 watts) in continuous-wave mode at 2 GHz, with a corresponding leakage power of 27.2 dBm (0.5 watts) at the output port of the limiter, exhibiting the great potential of GaN SBD in microwave power limiters.

Harmonic Dual-Band Diode Mixer for the X- and K-Bands

This paper presents a new dual-band diode mixer for the X- and K-bands. The proposed mixer consists of a pair of series-connected diodes and a frequency-dependent delay line that operates at 180° and 360° at the X-band of 10.525 GHz and at the K-band of 24.15 GHz, respectively. Without reconfigurable devices such as switches, the proposed mixer operates as a single-balanced diode mixer at the X-band and a subharmonically pumped antiparallel diode mixer at the K-band simultaneously. The designed circuit was implemented in a hybrid microwave integrated circuit using discretely packaged RF components on a microwave printed circuit board. The measurement results showed conversion losses of 6.5 dB and 16.6 dB at the X- and K-bands, respectively.

An Improved Analytical Model for Crosstalk of SiC MOSFET in a Bridge-Arm Configuration

SiC MOSFETs have an excellent characteristic of high switching speed, which can improve the efficiency and power density of converters significantly. However, the fast switching processes of SiC MOSFETs cause serious crosstalk problems in bridge-arm configurations, which restricts the devices’ performances. This paper presents a detailed and accurate improved crosstalk analytical model, which takes into account the nonlinear capacitances, the parasitic inductances, the reverse recovery characteristics of the anti-parallel diodes, and the nonlinear voltage switching and damping oscillation process. The novelty of the proposed model lies in the fact that under the condition of comprehensively considering all these non-ideal factors of the bridge-arm, the effects of multi-parasitic elements and multi-variables coupling to the crosstalk are hierarchically divided. The parasitic elements and their correlations are described in detail and the direct and indirect variables’ impacts are clearly traced. Thus, according to the different variables switching stages, the influence processes of these parasitic elements and variables can be integrated and a complete equivalent analytical model of the crosstalk process can be derived. The simulation and experiment platforms are established and a series of experimental verifications and comparisons prove that the model can replicate experimental measurements of crosstalk with good accuracy and detail.

Measurements and Computations of Internal Temperatures of the IGBT and the Diode Situated in the Common Case

This article proposes effective methods of measurements and computations of internal temperature of the dies of the Insulted Gate Bipolar Transistor (IGBT) and the diode mounted in the common case. The nonlinear compact thermal model of the considered device is proposed. This model takes into account both self-heating phenomena in both dies and mutual thermal couplings between them. In the proposed model, the influence of the device internal temperature on self and transfer thermal resistances is taken into account. Methods of measurements of each self and transfer transient thermal impedances occurring in this model are described and factors influencing the measurement error of these methods are analysed. Some results illustrating thermal properties of the investigated devices including the IGBT and the antiparallel diode in the common case are shown and discussed. Computations illustrating the usefulness of the proposed compact thermal model are presented and compared to the results of measurements. It is proved that differences between internal temperature of both dies included in the TO-247 case can exceed even 15 K.