Anti-parallel Diode Research Articles

초고속차단기와 바이패스 사이리스터를 이용한 MMC의 DC-Link 고장전류 차단 방법

The modular multi-level converter (MMC) has recently gotten great attention due to the installation of large renewable generation farms and high voltage direct current transmission (HVDC). In the same manner as the conventional inverters, MMC operates based on multiple insulated-gate bipolar transistors (IGBTs). Each IGBT is generally combined with an anti-parallel diode in the half-bridge MMC, the most efficient MMC topology. Due to the diode path, the DC fault current, caused by the AC phase voltage differences when its DC-Link bus shorts, flows the MMC freely. This paper proposes a DC-Link fault current interrupting method based on Ultra Fast Disconnectors (UFDs) and bypass thyristor. The proposed method is verified based on electromagnetic transient (EMT) level simulations, including several case studies with various short circuit ratios (SCRs) and reluctance per resistance (X/R) ratios. As a result, the proposed method successfully blocks the DC-Link fault current within at most one cycle. The case studies are conducted using a power system computer aided design and electromagnetic transient including DC (PSCAD/EMTDCTM).

A Bridgeless Cuk-BB-Converter-Based BLDCM Drive for MEV Applications

This article presents a brushless DC motor (BLDCM) drive for a maritime electric vehicle (MEV) application. The presented BLDCM drive uses a bridgeless Cuk-buckboost (BL-Cuk-BB) converter for input-side power factor (PF) improvement. The BL-Cuk-BB converter uses the buckboost converter for the negative half-cycles of the input AC voltages and the Cuk converter for the positive half-cycles. In the case of MEVs, the drive systems are generally fed by diesel engine generators (DEGs). The asymmetric BL-Cuk-BB converter is operated in a discontinuous inductor current mode (DICM) in the present work to attain better power quality. The usage of a second-order buckboost converter with a fourth-order Cuk converter results in a decrement in the net order of the system. Additionally, the input inductor of the Cuk converter also participates as the filter component along with capacitor C2 during buckboost converter operation to enhance the power quality. The total component count reduction in the BL-Cuk-BB converter is also achieved by eliminating the usage of extra/external back-feeding diodes, which are generally used in bridgeless schemes. The present scheme uses the inbuilt anti-parallel diodes for the same purpose. The lesser components requirement in the BL-Cuk-BB-converter-based BLDCM drive implies lesser cost and volume, along with greater reliability, lower conduction losses, and lower weight of the BLDCM drive, which adds to the merits of the model. The paper includes a detailed mathematical model and stability analysis using pole-zero maps and bode plots of the BL-Cuk-BB converter for each half-supply AC voltage cycle. The BL-Cuk-BB-converter-based BLDCM drive for an EV application has been developed on the MATLAB/Simulink platform for a DICM operation, and the MATLAB simulation results have been presented for validation of the BL-Cuk-BB-converter-based BLDCM drive.

Study on the characteristic of the grounding fault on the cascaded midpoint side of the hybrid cascaded HVDC system

The hybrid cascaded high-voltage direct current (HVDC) system combines the system support capabilities of the modular multilevel converter (MMC) with the capacity of the line-mutated converter’s (LCC’s) advantage of high-power transmission. The HVDC system is among the key elements of a smart grid where artificial intelligence is applied extensively. However, the characteristics of a grounding fault on the cascaded midpoint side of a hybrid cascaded HVDC system remain unclear. This study analyzes fault characteristics and the impact of faults using analytical methods. First, the topology and basic control strategy are presented. The fault response process is then analyzed by dividing systems into the MMC and LCC parts at the inverter side. A separate theoretical analysis is also conducted. In addition, the impacts of faults on HVDC and alternating current (AC) networks are analyzed. Therefore, even after the HVDC system is disabled, the AC network can supply fault currents using an antiparallel diode. The simulation results show that the proposed analysis method is feasible, and the theoretical analysis is correct. The proposed method can provide a theoretical basis for the selection of equipment for HVDC systems and smart grid construction.

A soft start-up method for DC micro-grid based on improved two-level VSC with DC fault ride-through capability

For the black start-up of DC micro-grids, three-phase charging resistors are required to limit the uncontrollable surge current. The main drawback of this start-up method is the difficulty in determining the appropriate resistance value to achieve a rapid start-up and limit the surge current with the change of grid parameters. To address this problem, this article proposes a soft start-up method for the DC micro-grid based on an improved two-level voltage source converter (VSC). Specifically, an silicon controlled rectifier and anti-parallel diode are added in each up-bridge-arm in the improved VSC. By conducting a dynamic control strategy of the firing angle on the SCRs, the start-up current can always be maintained near a given value to achieve rapid start-up. Moreover, the improved VSC has DC fault ride-through capability. The simulation results based on PSCAD/EMTDC are provided to validate the feasibility of the proposed start-up method.

Dynamic performance of 6.5 kV SiC MOSFET body diodes and anti-parallel Schottky barrier diodes

Dynamic performance of 6.5 kV SiC MOSFET body diodes and anti-parallel Schottky barrier diodes

Miniaturized Fully Passive Wireless Neural Recording With Heterogeneous Integration in Thin Packages

Wireless fully-passive neural recording systems are demonstrated with heterogeneous integration of sensing, mixing, and communication components in flexible polymer dielectric films. The recording neurosensor has an antenna, antiparallel diode, and a by-pass capacitor to modulate an incoming carrier signal with the neuropotentials and backscatter the mixed signal to an external reader circuit. Planar antennas are realized on Liquid Crystal Polymer (LCP) flexible substrates with low dielectric constant. The designed antenna topology is realized with a single metal layer and eliminates the dependency on substrate thickness, and leads to thinner sensors. This is a major advance compared to prior passive neural recording with rigid and thicker substrates and components. Approximately 80% thickness reduction and 20% volume reduction are achieved with a similar performance when compared to earlier studies. Our approach thus leads to low-cost and disposable wireless neurosensors on a flexible platform with heterogeneous integration. This paper thus advances innovative wireless neural recording in three aspects: a)advanced packaging for miniaturized neural recording with passive telemetry, through which the overall size of the sensor is reduced without degrading the performance. b) new antenna topologies for neural recording applications, and c) detailed power link analysis to estimate the minimum signal sensitivity.

Port‐assignment modelling of anti‐parallel Schottky barrier diode and 0.3‐THz sub‐harmonic mixer design

This letter presents a new port-assignment model of an anti-parallel Schottky barrier diode (AP-SBD) and a 0.3-THz sub-harmonic mixer (SHM) as the application design. Using the proposed method, the AP-SBD is accurately modelled compared to conventional modelling methods. Because the characteristics of an AP-SBD have the greatest impact on mixer performance, an accurate modelling method for AP-SBD helps design SHMs with good performance. To verify the proposed modelling in the terahertz region, a 0.3-THz SHM based on the modelled AP-SBD is designed and assembled. The measurement result reveals that the optimal double-sideband (DSB) conversion loss of the mixer is 6.7 to 10.1 dB within 279 to 318 GHz when the fixed local oscillator (LO) signal is 6.4 dBm at 152 GHz. All measurement results confirm that the proposed methodology is concise and feasible for the design of terahertz SHMs.

A software-based method for energy losses decreasing in cascaded buck + boost DC-DC converter

A MOSFETs switching times calculation method for the known modulation strategy for bidirectional buck + boost DC-DC converter is presented. A former low-loss, constant-frequency modulation strategy based on a negative inductor offset current takes place at the beginning of each conversion period which provides the ability to turn on converter’s MOSFET switches under zero-voltage and zero current switching (ZVS/ZCS) condition. Time interval between switching times of half-bridge MOSFETs is needed to provide the ability to turn on the MOSFET under ZVS/ZCS due to its antiparallel diode takes over an inductor current. Described method based on a switching delay time estimation for the worst case of converter’s circuit components spread which allows to calculate proper MOSFETs switching times by Digital Control Unit (DCU). The article describes in detail the switching of the input half-bridge MOSFETs at first switching time. The clarified offset current calculation method, based on an estimated switching delay and converter’s input voltage is presented.

Comparative Reliability Assessment of Hybrid Si/SiC and Conventional Si Power Module Based PV Inverter Considering Mission Profile of India and Denmark Locations

Energy harnessing from renewable energy sources has become more flexible with power electronic technologies. Recent advancements in power electronic technologies achieve converter efficiency higher than 98%. Today, reliable power electronic devices are needed to design a PV-based energy converter (inverter) to reduce the risk of failure and maintenance costs during operation. Wide-bandgap SiC devices are becoming more common in power electronic converters. These devices are designed to reduce switching loss and improve the efficiency of the system. Nevertheless, the cost of SiC devices is a major concern. Hence, to improve the reliability of the PV inverter while considering the economic aspects, this paper develops a highly reliable PV inverter with a hybrid Si/SiC power module that consists of a Si-IGBT with a SiC anti-parallel diode. A test case of a 3 kW PV inverter is considered for reliability analysis. The loading of the PV inverter is done under uncertain environmental conditions by considering the yearly Mission Profile (MP) data related to Ambient Temperature (AT) and Solar Irradiance (SI) at the India and Denmark locations. The effectiveness of the proposed hybrid Si/SiC power module is tested by comparing it with a conventional IGBT power module. The results showcase the marked improvement in PV inverter reliability with the proposed hybrid power module.

A PWM Method of H-Bridge Converter With Temperature Rise Balancing and Minimization Based on Periodically Alternating Employment of Power Devices

Aiming at the temperature rise and thermal control issues of power devices in H-bridge converters under conventional pulsewidth modulation (PWM) methods, a novel PWM method of H-bridge converter with temperature rise balancing and minimization based on periodically alternating employment of power devices is proposed. In the proposed method, two novel operation mechanisms of power devices are alternately applied into the eight regions with the identical and opposite polarities of reference voltage and input current, which are composed of two fundamental frequency periods. All active switches and antiparallel diodes in H-bridge converters are made to work alternately in these eight regions, each of them is designed to keep in <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state in one region, operate in switching state in another two regions, and inactive in the left other five regions. This way, the power dissipation and temperature rise of all the devices are balanced and minimized, and H-bridge converters no longer suffer from the dead-time effect on current quality and dc-bus voltage utilization. The implementation strategy of the proposed modulation method is discussed in detail. Simulation and experimental results are presented that verify the effectiveness of the proposed method and the corresponding implementation strategy at different operating points.

Monolithic Integration of 1.2kV Optically-Controlled SiC npn Transistor and Antiparallel Diode

In this letter, a 1.2kV optically-controlled SiC transistor (OCT) is proposed and fabricated. A pin diode is monolithically integrated with the SiC OCT for reverse conducting and online junction temperature measurement capability. Field limiting rings are designed as terminal structure for forward blocking capability. The test results indicated that, besides full optical control and high blocking voltage performances, the fabricated transistor chip was also capable of reverse conducting and online junction temperature measurement. The forward breakdown voltage of the transistor was about 1400V and the leakage current at 1200V was <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${2.5}\,\,\times \,\,{10}\,\,^{-{8}}\text{A}$ </tex-math></inline-formula> . The reverse turn-on voltage was about 2.6V, while the temperature sensitivity of the integrated diode was 2.99mV/K at 5mA. Under 365nm ultraviolet (UV) light with 300mW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> incident intensity, the forward current of the OCT chip was <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$203.2\mu \text{A}$ </tex-math></inline-formula> at 0.3V, which is about <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${1.2}\,\,\times \,\,{10}\,\,^{{5}}$ </tex-math></inline-formula> times the corresponding dark current. The transient characteristic was tested at a 600V bias voltage in a resistive load circuit and the results indicate that the OCT can be switched using a 365nm UV light emitting diode.

Single-Stage Isolated Bridgeless Charger for Light Electric Vehicle With Improved Power Quality

A single-stage high power factor (HPF) improved power quality charging solution for light electric vehicles (LEVs) is presented in this work. The charger topology comprises a bridgeless isolated modified SEPIC (BIMSEPIC) HPF ac–dc converter, to accomplish various charging modes with high performance at the supply side. Unlike conventional bridgeless SEPIC topologies, the presented topology ensures zero circulating current through the antiparallel diode of the switch, utilizes a single switch structure, and requires simple gate drive circuitry. Further, the discontinuous conduction mode operation of the charger significantly simplifies the control complexities and associated cost of implementation. Additionally, the magnetic component's volume and switching losses are reduced considerably. Finally, the presented topology is designed, simulated, and implemented to verify its efficacy for the LEVs charging applications. A comprehensive analysis is carried out at various operating conditions, and the relevant test results are demonstrated for the performance verification. Moreover, a comparative analysis with existing chargers verifies the excellent performance of the presented charger topology.

직류배전망의 한류기를 고려한 보호협조 대책 개발

Recently, DC distribution system is being considered as one way to achieve the net zero to reduce the carbon emissions. However, there are still challenges to be overcame in order to introduce the DC distribution system, and in especially, it is necessary to develop a protective method considering the protective coordination for the stable and safe operation in DC distribution system. According to the analysis result of the fault current characteristics in DC distribution system, the fault should be detected before the fault current flows into the anti-parallel diodes in AC/DC converter. In this study, the Inverse Over-Current Relaying (IOCR) method is used to achieve the protective coordination. Since the fault detection by IOCR can be delayed according to the fault current, this paper proposes the use of Fault Current Limiter (FCL) to prevent the damage to the anti-parallel diodes. Overall, the protective method is developed so that the IOCR can operate even when the fault current is reduced due to the FCL. To verify the proposed method, a test system is modeled using Electro-Magnetic Transients Program (EMTP) and the simulation results for the several cases are analyzed.

A Real-Time Fault-Tolerant Control Approach to Ensure the Resiliency of a Self-Healing Multilevel Converter

Ensuring service continuity in safety critical applications is crucial. In some of these applications, multilevel converters play a vital role. In this regard, this research work presents a self-healing fault-tolerant control approach to ensure the resiliency of a neutral-point clamped converter when a semiconductor component encounters an open circuit fault. The defective semiconductor can be a power switch or a clamping diode. By applying the proposed real-time fault-tolerance control, the rated output voltage and output current are restored during post-fault operation. Furthermore, the total harmonic distortion value of the output voltage during application of the real time self-healing control does not increase when compared with that during healthy operation. Since the realization of the proposed control strategy does not require any bidirectional switch, a fast transition between the healthy and fault-tolerant operation is accomplished. Moreover, the proposed structure can ensure service continuity in case of a fault event in the anti-parallel diodes, something which has been overlooked in previously conducted research works.

A Critical Review of Modular Multilevel Converter Configurations and Submodule Topologies from DC Fault Blocking and Ride-Through Capabilities Viewpoints for HVDC Applications

Modular multilevel converters (MMCs) based on half-bridge submodules (HBSMs) are unable to prevent the AC side contribution to DC side fault currents, thus necessitating circuit breakers (CBs) for protection. A solution to this problem is using submodules (SMs) that are capable of blocking the flow of current from the AC grid to feed the DC side fault. The full-bridge submodule (FBSM) is one type of fault blocking SM where the presence of two extra switches ensures that in the event of a DC fault, the reverse voltage from the FBSM capacitor is placed in the path of the AC side current feeding the DC side fault through the antiparallel diodes. However, the additional semiconductor switches in the FBSMs increase the converter cost, complexity, and losses. Several SM configurations have been proposed in recent years that provide DC fault blocking capability with lower losses and device counts than those of FBSMs. Besides, many of the proposed hybrid converter configurations that combine different topologies to optimize converter performance are also capable of providing DC fault blocking. Furthermore, certain SM topologies are capable of riding through DC faults by remaining deblocked and operating in static synchronous compensator (STATCOM) mode to provide reactive power support to the AC grid. In this paper, noteworthy SM and MMC configurations capable of DC fault blocking and ride-through are reviewed and compared in terms of component requirements, semiconductor losses, and DC fault handing capability. The review also includes a discussion on control strategies for MMC arm/leg energy balancing during STATCOM operation.

A BL-CC Converter-Based BLDC Motor Drive for Marine Electric Vehicle Applications

This article presents a BLDC (permanent magnet brushless DC) motor drive for marine electric vehicle (MEV) application. The presented scheme uses bridgeless canonical cell (BL-CC) converter with center-tapped inductor (shown as two separate inductors for analysis purpose) for source-side power factor correction (PFC); however, the BL-CC converter requires two inductors. In the presented scheme use of one center-tapped inductor eliminates the requirement of one extra inductor. Thus, center-tapped inductor usage in BLDC motor drive results in decrement in components count. The BL-CC converter-based BLDC motor drive scheme do not require extra back-feeding diodes like other bridgeless (BL) schemes, but it uses inbuilt antiparallel diodes of insulated gate bipolar transistor (IGBT) switches for the same purpose this again leads to decrement in required component count. In this work, PFC BL-CC converter is operated in discontinuous inductor current (DIC) mode to attain better power quality. The DIC mode operation requires only one voltage sensor to sense DC-link voltage, whereas in continuous conduction mode (CCM), the sensor requirement increases to three (two voltage sensors and one current sensor). The PFC BL-CC converter also eliminates the diode bridge rectifier stage. The elimination of one extra inductor, two extra back-feeding diodes, DBR stage and also requirement of only one voltage sensor in DIC mode operation instead of three sensors for CCM implies reduction in components count which implies the reduction in cost and also the volume and weight of the BLDC motor drive. The weight reduction for marine (on-board) electric vehicle is very important as this enhances the vehicle performance. This paper also presents the detailed mathematical modeling and stability analysis of presented BL-CC converter using pole zero map and Bode plot. The BL-CC converter-based BLDC motor driving system for MEV application for DIC mode operation has been developed in the laboratory as well as on MATLAB/Simulink platform and simulated MATLAB and real-time experimental results have been presented to validate the presented BLDC motor drive under steady-state and dynamic operating conditions.

Demonstration and modeling of frequency tripler based on GaN Schottky diode pair

Based on GaN Schottky barrier diode (SBD), frequency triplers using anti-parallel diode pair (APDP) are demonstrated and modeled at an output frequency of 3.6 GHz. In addition, two connection schemes, namely series APDP tripler and shunt APDP tripler are explicitly studied and compared. Compared to shunt APDP tripler, series APDP tripler achieved higher output power of −0.14 dBm and smaller minimum conversion loss of 26.9 dB. Precise compact models for both types of triplers were proposed to verify the generation of output power and performance of triplers. In the compact models, nonlinear SPICE parameters of SBD and parasitic parameters of the diode pair were extracted from I–V characteristic and broad band small signal S-parameters. Input and output networks of tripler were de-embedded so that accuracy of harmonic simulations were ensured. The outstanding performance of APDP as a frequency tripler and corresponding models provide a practical option in designing RF multipliers.

A 220 GHz Orthogonal Modulator Based on Subharmonic Mixers Using Anti‐Paralleled Schottky Diodes

In this paper, A 220 GHz orthogonal modulator based on two symmetrical subharmonic mixers is designed, analyzed and measured, where the mixers are implemented basde on antiparallel Schottky diodes. The orthogonal modulator consists of a 90° phase shifted 220 GHz 3 dB coupler, two sub-harmonically pumped mixers and an in-phase 110 GHz 3 dB power divider. The IF output signals are in-phase (I) branch and quadrature (Q) branch operating from DC±3.5GHz. In the back to back experimentaltests, it is shown that the conversion loss of the two 220 GHz I/Q mixers is less than 30 dB when the IF operating frequency is DC−3.5 GHz, IF input power is −10 dBm and the LO power is around 6 mW. Based on floating-point simulation, the amplitude and phase imbalance of the I/Q mixer are less than 0.2 dB and 2 degree respectively. When the 220 GHz modulator and demodulator are set in a back to back configuration, a signal-to-noise ratio of 21 dB can be obtained using the 16QAM modulation type.

Optimal Fault-Tolerant Control of Multiphase Drives Under Open-Phase/Open-Switch Faults Based on DC Current Injection

In recent years, fault-tolerant control of multiphase drives against open-phase faults has been an interesting research topic. However, in contrast, few research efforts have been devoted to fault-tolerant control against open-switch faults in which only one controllable power semiconductor device in a converter leg is open, but its antiparallel diode operates normally. In this article, a fault-tolerant control strategy against open-phase&#x002F;open-switch faults based on dc current injection is proposed. In open-switch phases, dc currents, whose amplitudes are equal to the amplitudes of the corresponding fundamental phase currents, are injected to eliminate the nonlinearity brought by faults. Therefore, the fundamental currents in open-switch phases can be precisely regulated. To achieve torque-ripple-free postfault operation, minimize the stator winding losses and maximize the postfault torque production, stator winding losses associated with fundamental currents and injected dc currents are optimized over the full torque production range on the premise that no dc current is mapped in the torque-producing subspace. Simulation results on different kinds of multiphase drives and experimental results on a nine-phase induction drive proved the reduced stator winding losses, extended torque operation range, and reduced torque ripple compared with the existing methods.

Crosstalk Suppression Method for GaN-Based Bridge Configuration Using Negative Voltage Self-Recovery Gate Drive

In order to suppress the crosstalk in gallium nitride (GaN) based bridge configuration, a novel negative voltage self-recovery gate drive (NVSRGD) is proposed in this article. The resistor–capacitor–diode voltage divider is applied to establish the negative gate–source voltage and suppress the impact of positive crosstalk. The antiparallel diode is added to constitute a low-impedance Miller current path from the driver integrated circuit (IC) to the GaN device. It works together with the self-recovery gate–source voltage to suppress the negative crosstalk, which not only prevents the GaN device from the negative overstresses but also reduces the reverse conduction loss during the dead time. The NVSRGD is composed of a few passive components, which are suitable for integrating into the driver IC. The capacitors and resistors of the NVSRGD are designed to determine the negative voltage level and the restore time. Additive separate negative voltage power supplies or active devices are not needed. The double-pulse test based on GS66508B verifies the effectiveness of the proposed method for suppressing the positive and negative crosstalk of GaN devices.