On-chip Antenna Research Articles

High-Efficiency Wideband 3-D On-Chip Antennas for Subterahertz Applications Demonstrated at 200 GHz

This work presents an efficient method for realizing a laterally radiating 3-D monopole antenna for millimeter-wave and terahertz applications. The vertical antenna rod is formed with a standard $\text{17-}{\mu} \text{m}$ aluminum wire on a programmable semiautomatic ultrasonic wedge bonder, which allows for a good reproducibility. The key features are a high gain of up to 4.9 dBi, a ${\text{360}}^{\circ }$ azimuthal coverage, an estimated radiation efficiency of around 90%, a uniform behavior over a wide frequency range of 60 GHz, and a low chip area requirement of ${\text{0.06}} \text{mm}^{2}$ . The on-chip structure offers the unique ability to be alternatively utilized for direct characterization with standard measurement probes. In addition, an analytic model is derived and compared to electromagnetic field simulations. To verify the radiation performance, a physical transmission link is demonstrated for distances between 5 and 15 mm and for a frequency ranging from 140 to 220 GHz. The obtained results agree well with the theoretical and simulated estimations.

Broadband sub-THz spectroscopy modules integrated in 65-nm CMOS technology

The design and characterization of a broadband 20–480 GHz continuously tuneable on-chip spectrometer based on non-linear transmission lines in 65-nm CMOS technology is presented. The design procedure of the sampler that detects the ultra-broadband signal from the transmitter in time and frequency domain is described in detail. It consists of a non-linear transmission line, a passive pulse differentiator and a high-speed sample and hold-circuit. The relevance of the layout of the Schottky diodes in the sampler with a maximum RC-cutoff frequency of 430 GHz is described. Time domain and frequency domain measurements are presented to characterize the 480 GHz sampler bandwidth as well as the 3.1 ps sampler rise time. A signal to noise ratio of 90 dB at 100 GHz, 70 dB at 200 GHz and more than 30 dB at 480 GHz is reached. Two implementation of the spectrometer with antennas are presented, one with an on-chip antenna and one in a hybrid package. The antenna-less on-chip implementation of the transmitter and sampler requires no external lenses and is miniaturized to an area of 3 mm2. Future applications include analysis of fluids in microfluidic packages or droplet analysis in bio-medical or pharmaceutical applications.

Dielectric Loaded Endfire Antennas Using Standard Silicon Technology

This paper presents two endfire on-chip antennas (OCAs) at 140 and 320 GHz using a standard 0.13- $\mu \text{m}$ SiGeBiCMOS technology; quasi-Yagi antenna concept is used with loaded dielectric. In order to eliminate the influence of the low-resistivity silicon substrate, the substrate thickness is chosen as $\sim 84~\mu \text{m}$ (for 140 GHz), and the antenna is mounted on the edge of a metal supporter with the front part ungrounded. The loaded dielectric is designed using the silicon and silicon dioxide (SiO2) layers to improve the gain. The antenna shows the measured impedance bandwidth of >45% at 140 GHz, with the peak gain of 4.1 dBi, and the simulated peak radiation efficiency of 83%. A $1 \times 2$ array at 140 GHz is also designed and implemented; the corresponding measured impedance bandwidth, peak gain, and simulated radiation efficiency are >36%, 7 dBi, and 72%, respectively. With the proposed structure, the OCA at 320 GHz is also designed and fabricated with the substrate thickness of $\sim 34~\mu \text{m}$ . The measured gain of 3.9 dBi and the simulated radiation efficiency of 80% are achieved at 320 GHz, respectively.

340-GHz Low-Cost and High-Gain On-Chip Higher Order Mode Dielectric Resonator Antenna for THz Applications

A low-cost and high-gain on-chip terahertz (THz) dielectric resonator antenna (DRA) is proposed in this work. The DRA consists of a low-loss dielectric resonator (DR) made of high-resistivity silicon material and an on-chip feeding patch realized in a 0.18-μm CMOS technology for exciting the desired electromagnetic (EM) mode. The DR can be easily fabricated to the required dimension by wafer dicing of a 2-in silicon wafer. With a 500-μm thick DR, a higher order mode of TE δ, 1 , 7 can be excited, which greatly enhances the antenna gain. Such higher order mode operation also provides a reliable design. If a fundamental mode is selected, the DR thickness is around 100 μm at THz frequencies, which not only requires an additional wafer thinning process, but the wafer is also easily broken during the fabrication process. The feeding patch is used to excite the TE δ, 1 , 7 mode. Moreover, its ground plane also prevents the EM field from leaking into the lossy CMOS silicon substrate, which improves the antenna efficiency. The simulated antenna gain can be 7.9 dBi while providing radiation efficiency of 74% at 341 GHz with 7.3% bandwidth. To characterize the DRA performance, an identical CMOS imager is designed to be integrated with the proposed DRA and an on-chip patch antenna. By comparing the measured responsivity of these two imagers, the gain improvement of the DRA over the on-chip patch antenna can be obtained. Three samples are measured to evaluate the robustness of the proposed antenna over process variation. The measured results show that the maximum gain improvement of 6.7 dB can be acquired at 327 GHz. The proposed DRA with the integrated CMOS imager is also employed to successfully demonstrate a THz transmissive imaging system at 327 GHz. To the best of authors’ knowledge, this is first higher order mode DRA working at THz frequencies.

Open-loop electrooptic sampling for real-time analysis and near-field imaging of ultrafast electronic devices

In this paper, we present an open-loop electrooptic sampling system for real-time characterization and near-field scanning of ultrafast electronic devices. The system capabilities such as picosecond time resolution as well as 210 GHz of measurement bandwidth are verified with measurement of a CMOS nonlinear transmission line and an ultimate bandwidth of 230 GHz has been achieved with a post-process algorithm. The noise of the system is quantified and imaging over a broad range of frequencies for an on-chip antenna is demonstrated.

A 60-GHz CMOS Transceiver With On-Chip Antenna and Periodic Near Field Directors for Multi-Gb/s Contactless Connector

A 60-GHz-based millimeter-wave (mm-wave)-wireless-interconnect (M2W2-I) with noncoherent amplitude shift-key (ASK) modulation is presented for applications in multigigabit ultrashort distance contactless connector. M2W2-I modulates data at mm-wave frequencies and transmits over the air in a very short distance (5 mm or less). A folded-dipole antenna is designed on-chip for a compact package form-factor, and a periodic near field director (PNFD) is inserted between transmitter (TX) and receiver (RX) to enhance a communication distance. Designed and fabricated in 65-nm CMOS, the M2W2-I achieves 5 Gb/s with 0.5 mm separation of air-coupling and 5.7-Gb/s 5-mm separation through a PNFD inserted channel. The measured energy efficiency is 7 pJ/bit using a PNFD.

In brief

PAGE 524 Researchers from South Korea have developed a walking speed estimation and treadmill control algorithm for a user-driven treadmill. Data is gathered as the user walks on the treadmill wearing insole pressure sensors. The correlation between walking speed and centre of pressure was investigated to develop a feedforward scheme, ensuring speed control of the treadmill. The user-driven treadmill has applications in training, rehabilitation, sports and entertainment. PAGE 520 A microstrip antenna array (MAA) with metasurface has been designed and fabricated for ultra-wideband radar cross-section (RCS) reduction, whilst preserving its radiation characteristics. The research from China uses size-adjustable unit cells to achieve different reflection phase distributions. The proposed MAA can reduce the RCS in the ultra-wide frequency band 6.2–27.3 GHz for both x and y polarisations. Estimation of walking speed and treadmill control using data from insole pressure sensors. PAGE 538 Researchers from China mounted a dielectric lens on the topside of a silicon imaging chip to improve radiation patterns of an on-chip patch antenna. The integrated lens causes the main beam of radiation patterns to become narrower, thus achieving a finer spatial resolution for imaging applications. The technology can be applied in THz imaging. Microstrip antenna array with metasurface designed for ultra-wideband RCS. PAGE 546 A sixteenth-mode substrate integrated waveguide (SMSIW) bandpass filter loaded with complementary split-ring resonator (CSRR) is proposed by researchers from India. The SMSIW filter operates at 2.45 GHz and has a bandwidth of 8.2%. It is compact, occupying 6.25% of a conventional integrated waveguide. It is also simple, has low-loss and is easy to fabricate. Lens placed on topside of imaging chip improves radiation patterns of antenna. PAGE 568 An autofocusing imaging method for stepped frequency continuous wave ground penetrating radar (SFCW-GPR) is presented in this Letter from China. The method overcomes the uncertainty of electromagnetic wave propagation velocity in the subsurface medium, by using the sequential L0 and L2 norms minimisation technique. Compact, simple, low-loss and easy to fabricate bandpass filter. Autofocusing imaging method for SFCW-GPR.

220 GHz high spatial resolution detector with above‐chip mounted dielectric lens

A novel and low-cost solution to improve the radiation patterns of the on-chip patch antenna at 220 GHz is proposed. The radiation performances are enhanced by mounting the lens on the patch. The air cavity in the lens not only reduces the focal length, but also provides space for chip integration. The imaging chip and antenna are fabricated and an experimental platform is built. The responsivity and radiation patterns are measured. The 3 dB beamwidths of the with-lens detector in the E and H planes are 8° and 7°, respectively. Good agreement between the simulated and measured results is obtained.

Terahertz detector for imaging in 180-nm standard CMOS process

A CMOS terahertz (THz) detector implemented in a 180-nm standard CMOS process is proposed, and room-temperature detection of 0.94-THz radiation is demonstrated. The detector consists of an integrated on-chip patch antenna and a source-feeding NMOS transistor as the rectifying element. To improve the power transfer efficiency between the patch antenna and NMOS transistor, a novel short-stub matching network is proposed. An open quarter-wavelength microstrip transmission line connecting gate is proposed to eliminate the influence of the bonding wire and pad on the antenna-transistor impedance matching. Illuminated by a 0.94-THz BWO source, the measured voltage responsivity ($R_{\rm v}$) and noise equivalent power (NEP) of the detector are 31 V/W and 1.1 nW/Hz$^{1/2}$, respectively.

Active Multiple Feed On-Chip Antennas With Efficient In-Antenna Power Combining Operating at 200–320 GHz

The design and measurement of active multiple-feed on-chip antennas realized in a SiGe seven metal layer backend process are presented for millimeter-wave applications. To prevent the excitation of surface waves, the principle of an integrated lens antenna (ILA) is used. In-antenna power-combining is realized by using a novel concept in which the outputs of two or more parallel differential amplifiers are directly combined in the radiating element itself. The proof-of-concept is shown by characterizing the antennas directly without the amplifiers being connected and by using adequate feeding networks capable of demonstrating high ILA bandwidths. Further, the power-splitting is realized through distributed transformer circuits, which offer high bandwidths at low losses. Different antennas are evaluated in order to attain reflection coefficients better than -10 dB over the entire frequency band of 200-320 GHz. Finally, the power-combining capabilities of such antennas are demonstrated by connecting a four-feed differential antenna to four single stage cascode amplifiers in parallel.

An On-Chip Frequency-Reconfigurable Antenna For Q-Band Broadband Applications

This letter presents the design of a Q-band on-chip antenna with broadband characteristic using a standard 0.18- μm CMOS silicon-on-insulator process. A pair of on-chip switches is introduced in this design to implement the antenna with frequency reconfigurability, in order to enhance the bandwidth of the antenna. A small-signal equivalent circuit of this switch is illustrated in this letter, and an optimized gate width of the switch transistor is selected to achieve a tradeoff between the gain and the bandwidth of the proposed antenna. By changing the state of the on-chip switches, a measured -10-dB bandwidth from 29.5 to 51.0 GHz is achieved by this antenna, which has covered the whole Q-band frequency. A measured peak gain of 3.3 dBi is observed at 45 GHz, and a very compact chip size of 1.1 × 1.7 mm 2 is achieved by the proposed antenna in this work.

Gain-Enhanced On-Chip Folded Dipole Antenna Utilizing Artificial Magnetic Conductor at 94 GHz

On-chip antennas suffer from low gain values and distorted radiation patterns due to the lossy and high permittivity Si substrate. An ideal solution would be to isolate the lossy Si substrate from the antenna through a perfect electric conductor ground plane. However, the typical CMOS stack up that has multiple metal layers embedded in a thin oxide layer does not permit this. In this letter, an artificial magnetic conductor (AMC) reflecting surface has been utilized to isolate the Si substrate from the antenna. Contrary to the previous reports, the AMC structure is completely embedded in the thin oxide layer with the ground plane above the Si substrate. In this approach, the AMC surface acts for the first time as both a reflector and a silicon shield. As a result, the antenna radiation pattern is not distorted and its gain is improved by 8 dB. The fabricated prototype demonstrates good impedance and radiation characteristics.

An on-chip antenna integrated with a transceiver in 0.18-µm CMOS technology

An on-chip antenna integrated with a transceiver in 0.18-µm CMOS technology

Dual-Polarized On-Chip Antenna for 300 GHz Full-Duplex Communication System

This paper presents a novel design of compact orthogonally polarized on-chip antenna to realize 300 GHz full-duplex communication system with high isolation. It consists of a dipole antenna for horizontal polarization and a disk-loaded monopole antenna for vertical polarization. They are in good cross-polarization state with more than 90 dB of self-interference suppression and then can be used to achieve good isolation between transmitting and receiving antennas. In addition, two dual-polarized antennas have been adopted in two separated transceivers to study their isolation performance. Furthermore, this compact antenna only occupies an active area of 390 μm × 300 μm × 78 μm and can be used for multiple-input multiple-output application as well.

A CMOS Broadband Transceiver with On-Chip Antenna Array and Built-In Pulse-Delay Calibration for Millimeter-Wave Imaging Applications

A CMOS Broadband Transceiver with On-Chip Antenna Array and Built-In Pulse-Delay Calibration for Millimeter-Wave Imaging Applications

Design Exploration of mm-Wave Integrated Transceivers for Short-Range Mobile Communications Towards 5G

This paper presents a design exploration, at both system and circuit levels, of integrated transceivers for the upcoming fifth generation (5G) of wireless communications. First, a system level model for 5G communications is carried out to derive transceiver design specifications. Being 5G still in pre-standardization phase, a few currently used standards (ECMA-387, IEEE 802.15.3c, and LTE-A) are taken into account as the reference for the signal format. Following a top-down flow, this work presents the design in 65[Formula: see text]nm CMOS SOI and bulk technologies of the key blocks of a fully integrated transceiver: low noise amplifier (LNA), power amplifier (PA) and on-chip antenna. Different circuit topologies are presented and compared allowing for different trade-offs between gain, power consumption, noise figure, output power, linearity, integration cost and link performance. The best configuration of antenna and LNA co-design results in a peak gain higher than 27[Formula: see text]dB, a noise figure below 5[Formula: see text]dB and a power consumption of 35[Formula: see text]mW. A linear PA design is presented to face the high Peak to Average Power Ratio (PAPR) of multi-carrier transmissions envisaged for 5G, featuring a 1[Formula: see text]dB compression point output power (OP1dB) of 8.2[Formula: see text]dBm. The delivered output power in the linear region can be increased up to 13.2[Formula: see text]dBm by combining four basic PA blocks through a Wilkinson power combiner/divider circuit. The proposed circuits are shown to enable future 5G connections, operating in a mm-wave spectrum range (spanning 9[Formula: see text]GHz, from 57[Formula: see text]GHz to 66[Formula: see text]GHz), with a data-rate of several Gb/s in a short-range scenario, spanning from few centimeters to tens of meters.

On-Chip THz Spectroscope Exploiting Electromagnetic Scattering With Multi-Port Antenna

This paper presents a new methodology to extract spectral information of radiated THz signals to enable a fully integrated broadband THz spectroscope in silicon. A classical down-conversion spectrum analysis architecture requires on-chip generation of LO signals covering GHz-THz frequencies to analyze an incident spectrum covering that range. This paper presents a method to exploit the interaction between the front-end antenna and the incident signal to extract spectral information eliminating the need for extremely wideband LO generation and the entire receiver architecture following the antenna. The central premise is that the incident THz signal excites a spectrum-dependent current distribution on the antenna surface and this work presents a method to measure and then estimate the incident spectrum from the impressed current distribution on an on-chip antenna. The chip is implemented in $0.13~\mu \text {m}$ SiGe BiCMOS technology and measures 2.6 mm $\times 1.9$ mm. Measurement results are presented for various incident spectra between 40–330 GHz. In addition, the paper presents a method for extracting time-domain information by exploiting the variable nonlinearities of the integrated detectors. By modifying a classical single-port antenna into a 2D multi-port scatterer, the paper presents a synthesizer-free THz spectroscope which consists of an integrated scatterer and multitude of low-power sensors capable of sub-wavelength measurement of near-field interactions which are exploited for spectral estimation.

V-Band Integrated on-Chip Antenna Implemented With a Partially Reflective Surface in Standard 0.13- $\mu \text{m}$ BiCMOS Technology

A ${V}$ -band on-chip triangular planar monopole antenna implemented with a partially reflective surface (PRS) using standard 0.13- $\mu \text{m}$ BiCMOS technology is presented. The PRS, which is realized with a dual-layered gangbuster type-4 frequency selective surface structure, is designed to obtain 90% reflection of the incident power, thus reducing the power loss caused by the lossy silicon substrate and increasing the radiation efficiency simultaneously. The antenna-PRS codesign technique to optimize the antenna geometry and the radiation power is discussed. The total area of the antenna, including the GSG pad and the PRS, is 0.868 mm2. The measured $S_{11}$ is smaller than −17 dB from 54 to 66 GHz, while the maximum measured antenna gain is 1.42 dB at 69.5 GHz. The maximum simulated antenna efficiency is 41% at 65 GHz.

A Nonlinear Q-Switching Impedance Technique for Picosecond Pulse Radiation in Silicon

This paper presents a nonlinear Q-switching impedance (NLQSI) technique for picosecond pulse radiation in silicon. A prototype chip is designed with four NLQSI-based impulse generation channels, which can produce picosecond pulses with a reconfigurable amplitude. An on-chip impulse-coupling scheme combines the outputs from four channels and delivers the combined signal to an on-chip antenna. In addition, an asynchronous optical-sampling measurement system is used to characterize the radiated picosecond pulses in the time domain. The prototype chip can radiate 4-ps pulses with an SNR > 1 bandwidth of 161 GHz. Furthermore, pulse amplitude modulation is experimentally demonstrated. The prototype chip is fabricated in a 130-nm SiGe BiCMOS process technology with a die area of 1 mm2.

60-GHz 64- and 256-Elements Wafer-Scale Phased-Array Transmitters Using Full-Reticle and Subreticle Stitching Techniques

This paper presents 60-GHz wafer-scale transmit phased arrays with 64- and 256-elements spaced λ/2 apart in the x- and y-directions, and occupying an area of 21.4 × 22 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (471 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) and 41.4 × 42 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (1740 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ), respectively. The 64-element phased array is built as a complete reticle and includes 64 independent transmit channels with 5-b phase control, 3-b (9 dB) amplitude control, a saturated output power of 3 dBm at the antenna port, a 1-64 distribution network with redundant line amplifiers, and a high-efficiency on-chip antenna at each element. In addition, redundant serial digital interface and power strips, dual series metal-insulator-metal capacitors, and multiple RF inputs are employed for improved yield. The 256-element array uses the same phased-array blocks as the 64-element design, but is built using a subreticle stitching technique so as to result in a chip which is larger than the standard reticle size (22 × 22 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). The 64and 256-element arrays result in a half-power beamwidth of 12° and 6° in the E- and H-planes, a directivity of 23 and 29 dB, respectively, and scan to ±55° in the E- and H-planes with near-ideal patterns and a crosspolarization level of lesser than -30 dB. The measured equivalent isotropically radiated power (EIRP) of the 64-element array is 38 dBm at 62 GHz with a 3-dB bandwidth of 61-63 GHz, while that of the 256-element array is 45 dBm at 61 GHz with a 3-dB beamwidth of 58-64 GHz. A 1-4-Gb/s communication system is also demonstrated using the 64-element phased array up to ±45° scan angles, and at 4-, 30-, and 100-m ranges. To the best of our knowledge, this paper represents the first demonstration of large size (64and 256-element) phased-array transmitters on a single wafer.