On-chip Antenna Research Articles

Electromagnetic Band Gap Structures in Antenna Engineering [Reviews and abstracts

The implementation of electromagnetic bandgap (EBG) structures in all areas of high-frequency design is gaining widespread use. The applications for antennas include low-prof le antennas, on-chip antennas, phased arrays, waveguides, and microwave filters. This book is an excellent resource for this subject. The book appeals to a wide array of readers, including students, researchers, and practitioners. The book is a reference that presents the state of the art in antenna-specif c EBG technologies. The book could also serve as a textbook for a class on the subject, as there are suggested projects at the end of each chapter that can be implemented to check for understanding. I especially like how each chapter builds upon the understanding of the previous chapters.

A CMOS High-Power Broadband 260-GHz Radiator Array for Spectroscopy

A high-power broadband 260-GHz radiation source using 65-nm bulk CMOS technology is reported. The source is an array of eight harmonic oscillators with mutual coupling through four 130-GHz quadrature oscillators. Based on a novel self-feeding structure, the harmonic oscillator simultaneously achieves the optimum conditions for the fundamental oscillation and the 2nd-harmonic generation. The signals at 260 GHz radiate through eight on-chip slot antennas, and are in-phase combined inside a hemispheric silicon lens attached at the backside of the chip. Similar to the laser pulse-driven photoconductive emitter in many THz spectrometers, the radiation of this source can also be modulated by narrow pulses generated on chip, which achieves broad radiation bandwidth. Without modulation, the chip achieves a measured continuous-wave radiated power of 1.1 mW, and an EIRP of 15.7 dBm. Under modulation, the measured bandwidth of the source is 24.7 GHz. This radiator array consumes 0.8-W DC power from a 1.2-V supply.

2-D Direct-Coupled Standing-Wave Oscillator Arrays

A direct-coupled technique for standing wave oscillator (SWO) arrays is presented in this paper. The oscillation currents of a unit cell in the SWO array directly inject to adjacent cells through the resonator. Two 2-D SWO arrays based on the technique are reported. The first SWO array can provide synchronous signals with identical frequencies, amplitudes, and phases at multiple locations over a chip. It is implemented in a 90-nm CMOS technology with 61.5-GHz oscillation frequency. Millimeter-wave radiators that consists of the proposed SWO array, an RF driver array, and an on-chip loop antenna array are implemented in a single chip to verify the synchronicity of the reported 2-D SWO via wireless measurement. The indirect evidence of synchronicity is provided from the correlation between the wireless measured effective isotropic radiated power (EIRP) and phase noise of 1 × 1, 2 × 2, and 3 × 3 arrays. The EIRP in the normal direction of the array is increasing by a factor of 10 log N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the phase noise is reducing by a factor of 10 log N over that of a single cell, where N is the number of unit cells in the array. The second SWO array can provide synchronous signals with identical frequencies, amplitudes, and multiple phases at multiple locations over a chip. It is implemented in a 65-nm CMOS technology with 132.5-GHz fundamental frequency. The SWO array is designed for a 2-D second-harmonic (265 GHz) spatial power radiating and combining array. The EIRPs of the fundamental frequency and second harmonic in the normal direction of the array are -34 and -6.5 dBm, respectively. The phase noise of the fundamental frequency and second harmonic at 1-MHz offset from the carrier frequency are -96 and -89 dBc/Hz, respectively.

A 0.39–0.44 THz 2x4 Amplifier-Quadrupler Array With Peak EIRP of 3–4 dBm

This paper presents a CMOS amplifier-multiplier-antenna array capable of generating an EIRP of 3-4 dBm at 420 GHz. The chip is built using a 45-nm CMOS SOI process, and efficient on-chip antennas are used to extract the power out of the chip. The design is based on a 90-110 GHz distribution network with splitters and amplifiers, and a balanced quadrupler capable of delivering up > 100 μW of power at 370-430 GHz. The amplifier-multiplier concept is proven on a 2×4 array, and it can be also scaled to any N×M array using additional W-band splitters and amplifiers.

Investigating Electromagnetic Properties of Yttria-Stabilized Zirconia (YSZ) for Wireless Gas Sensor Applications

The article describes the investigation of electromagnetic properties of YSZ for wireless gas sensor applications. In particular, the dielectric properties of YSZ were found with a view to implement on-chip antennas. Agilent Dielectric Probe Kit and network analyzer were used for dielectric constant and dielectric loss measurements. The dielectric properties were measured as a function of YSZ sintering temperature. The average dielectric constant (over frequency) of YSZ was seen to increase with an increase in sintering temperature. The average loss tangent (over frequency) was seen to decrease with an increase in sintering temperature. Substrates based on the dielectric ceramic materials such as YSZ, Al2O3, and Low Temperature Co-fired Ceramic are promising candidates for antenna miniaturization because of their high permittivity, low loss, light weight, low cost, and market availability.

A wideband on-chip millimeter-wave patch antenna in 0.18 μm CMOS

A wideband on-chip millimeter-wave patch antenna in 0.18 μm CMOS with a low-resistivity (10 Ω·bm) silicon substrate is presented. The wideband is achieved by reducing the Q factor and exciting the high-order radiation modes with size optimization. The antenna uses an on-chip top layer metal as the patch and a probe station as the ground plane. The on-chip ground plane is connected to the probe station using the inner connection structure of the probe station for better performance. The simulated S11 is less than −10 dB over 46–95 GHz, which is well matched with the measured results over the available 40–67 GHz frequency range from our measurement equipment. A maximum gain of −5.55 dBi with 4% radiation efficiency at a 60 GHz point is also achieved based on Ansoft HFSS simulation. Compared with the current state-of-the-art devices, the presented antenna achieves a wider bandwidth and could be used in wideband millimeter-wave communication and image applications.

Excitation of a Si/SiGe quantum dot using an on-chip microwave antenna

We report transport measurements on a Si/SiGe quantum dot subject to microwave excitation via an on-chip antenna. The response shows signatures of photon-assisted tunneling and only a small effect on charge stability. We also explore the use of a d.c. current applied to the antenna for generating tunable, local magnetic field gradients and put bounds on the achievable field gradients, limited by heating of the reservoirs.

Electromagnetic simulation modeling of silicon substrate for 60 GHz on-chip differential-feed dipole antenna

A 60 Gigahertz (GHz) on-chip differential-feed dipole antenna integrated in a 65 nm complementary metal oxide semiconductor (CMOS) technology is investigated by simulation and measurement. It was found that it is important to model lossy thin well layer on the surface of CMOS substrate. Simulated frequency characteristic of scattering parameters agreed well with measured one. The simulated radiation efficiency was 3.4%. The loss factor was estimated by electromagnetic simulation, and it was found that low radiation efficiency was mainly due to the existence of the lossy layer and high conductivity of 10 S/m of silicon substrate.

A 108–114 GHz 4$\,\times\,$4 Wafer-Scale Phased Array Transmitter With High-Efficiency On-Chip Antennas

This paper presents a W-band wafer-scale phased- array transmitter with high-efficiency on-chip antennas. The 4 × 4 array is based on an RF beamforming architecture with an equiphase distribution network and phased shifters placed on every element. The differential on-chip antennas are implemented using a 100 μm thick quartz superstrate and with a simulated efficiency of ~ 45% at 110 GHz. The phased array is designed with low mutual coupling between the elements and results in a stable active antenna impedance versus scan angle. The phased array is built in the Jazz SBC18H3 SiGe BiCMOS process, and is 6.5 × 6.0 mm2. Measurements show two-dimensional pattern scanning capabilities with a directivity of 17.0 dB, an array gain of ~26.5 dB at 110 GHz, and an EIRP of 23-25 dBm at 108-114 GHz. The power consumption is 3.4 W from a 1.9 V supply. To our knowledge, this work represents the first W-band wafer-scale phased array to-date. The application areas are in point-to-point communication systems in the 100-120 GHz range.

A Terahertz Detector Array in a SiGe HBT Technology

This paper presents HBT terahertz power detectors implemented in an experimental 0.25- μm SiGe process technology with a peak fT/fmax of 280/435 GHz. Based on the nonlinearity of the HBT base-emitter junction, the detector operates as a square-law down converter, mixing terahertz frequencies directly to dc. Fifteen detectors have been arranged in a 3 × 5-pixel array with differential on-chip ring antennas. The array has been assembled with a hyper-hemispherical silicon lens. Referred to the collecting aperture of the lens, a maximum optical current responsivity RI of 1 A/W and a minimum noise equivalent power (NEP) of about 50 pW/√{Hz} have been measured at 0.7 THz with a 125-kHz chopping frequency. The detectors have been characterized from 0.65 to 1 THz.

A 0.32 THz SiGe 4x4 Imaging Array Using High-Efficiency On-Chip Antennas

This paper presents a 0.32 THz 4x4 imaging array based on an advanced SiGe technology. Each pixel is composed of a high efficiency on-chip antenna meeting all metal-density rules, which is coupled to a SiGe detector and a low noise CMOS operational amplifier. A quartz superstrate is used on top of the imaging chip to improve the radiation efficiency. The array results in an average NEP of 34 pW/Hz 1/2 at an IF of 10-100 kHz for a detector bias current of 50-150 μA, a responsivity of 18 kV/W and a 3-dB bandwidth of 25 GHz. The power consumption is 2.4 mW/pixel. Extensive measurements are presented which show the challenges encountered in obtaining accurate measurements at THz frequencies using a quasi-optical set-up, and the decisions taken to quote the average NEP values.

A UHF/UWB hybrid silicon RFID tag with on–chip antennas

In this contribution, we describe and analyse a miniature wireless radio frequency identification (RFID) chip with on-chip antennas (OCA) and ultra wideband (UWB) signalling by real-world measurements. With the on-chip antenna approach, no external antennas are required, and the size of the overall tag is identical to the size of the chip alone (3.5 mm×1 mm). The chip is powered through inductive coupling and controlled by an RFID signal at 866 MHz in the downlink, while the uplink transmits a quaternary pulse-position-modulated (4-PPM) UWB signal at 5.64 GHz with pulses having a duration in the order of nanoseconds. In this contribution, the hybrid or asymmetric communication scheme between prototype chip and reader, the embedded OCA, and the measurement setup are described. The prototype achieves 4-PPM bit rate of 126 Mbit/s based on a pulse-train transmission with a duration of 10 μs. The small size, high data rate, and fine time resolution of the UWB impulse radio offer new features and sensing capabilities for future RFID-like applications.

Fully Integrated ASK Receiver MMIC for Terahertz Communications at 300 GHz

An ASK receiver MMIC operating at 300 GHz for future terahertz communications is presented. In the receiver IC, we fully integrated all necessary components-a receiving dipole antenna, high gain RF amplifier, envelop detector for demodulating ASK signal and output differential data amplifier-in a 1000×2500 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area. A silicon lens was used to compensate for the small gain of the on-chip antenna. To ensure reliable and stable operation, we designed the MMIC with a thin-film microstrip line, which is expected to suppress crosstalk between the on-chip antenna and the RF amplifier through the substrate and silicon lens. The packaged receiver module with the silicon lens is expected to provide approximately 24-dBi beam directivity. Measured RF and baseband bandwidths are around 30 and 15 GHz, respectively, when a single bias of 3.3 V and total current of around 86 mA are applied. With the receiver module, simple wireless data transmission was conducted for up to 24 Gbps in the 300-GHz band. At 12.5 Gbps, error-free data transmission (bit error rate <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> ) over 0.3 m was achieved with the transmission power of - 16-dBm and a 25-dBi transmitting antenna. With -10-dBm transmission power, measured Q-factors of the received eye patterns were larger than 6 for up to 20 Gbps, which implies that the bit error rate will be less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> .

A 288-GHz Lens-Integrated Balanced Triple-Push Source in a 65-nm CMOS Technology

A 288-GHz lens-integrated high-power source implemented in a 65-nm CMOS technology is presented. The source consists of two free-running triple-push ring oscillators locked out-of phase by magnetic coupling. The oscillators drive a differential on-chip ring antenna, which illuminates a hyper-hemispherical silicon lens through the backside of the die. An on-wafer breakout of the oscillators core achieves a peak output power of -1.5 dBm with a 275-mW DC power consumption. The radiated power of the packaged source is -4.1 dBm, which is the highest reported radiated power of a single CMOS source beyond 200 GHz. The source die including the antenna occupies only 500 x 570 μ m2.

밀리미터파 CMOS 온-칩 다이폴 안테나 설계 최적화

This paper presents an optimized design of a millimeter-wave on-chip dipole antenna using CMOS process. The serious flaw of the antenna using CMOS process is low radiation efficiency because of high permittivity and conductivity. To overcome the weakness, we need to widen radiation area in air and optimize distance between an antenna and a reflector. The radiation efficiency and bandwidth of the designed antenna are respectively 16.5 % and 22.3 % at 80 GHz. Systematic methods are attempt to analyze an effect on the antenna radiation efficiency. To widen radiation area in air, substrate cut angle and distance between the antenna and chip edge are adjusted. In addition, to optimize distance between an antenna and reflector, substrate thickness and distance between the antenna and a circuit ground plane are adjusted.

Full-Duplex Crystalless CMOS Transceiver With an On-Chip Antenna for Wireless Communication in a Hybrid Engine Controller Board

A full-duplex transceiver for wireless inter-chip data communication in an engine controller board of hybrid electric vehicles is demonstrated. The amplitude shift keying (ASK) transceiver incorporates a clock data recovery circuit for crystalless operation as well as for simultaneous generation of a 24-GHz local oscillator signal and a 400-MHz clock for data recovery. The transceiver also integrates an on-chip antenna and a duplexer. The bit error rate (BER) degradation of RX due to the full duplex operation of transceiver with an on-chip antenna is negligible when the input power is greater than -44 dBm necessary to achieve a BER of less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> . This is the first demonstration of full duplex operation for an integrated circuit incorporating an on-chip antenna. The transceiver is fabricated in a 130-nm CMOS technology and consumes 245 mW.

A 60-GHz on-chip slot-array antenna in integrated-passive-device technology for antenna-in-package applications

A new millimeter-wave antenna structure on a low-cost, production platform integrated passive device technology is presented. The antenna consists of a 2-by-1 array of slot antennas at 60 GHz. An in-house developed on-chip antenna measurement setup was used to characterize the fabricated antenna. The measurement results show an antenna gain of more than 5dBi with a return loss of 18dB at 60 GHz. The better-than-10-dB impedance bandwidth of the antenna covers the 60-GHz unlicensed band from 57 to 64 GHz. The 3-dB beamwidths of the antenna are 105i¾? and 76i¾? at E-plane and H-plane at 60 GHz, respectively. The size of the die of the antenna is 2 mm×4.5 mm. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:155-160, 2014.

5.2-GHz RF Power Harvester in 0.18-/spl mu/m CMOS for Implantable Intraocular Pressure Monitoring

A first fully integrated 5.2-GHz CMOS-based RF power harvester with an on-chip antenna is presented in this paper. The design is optimized for sensors implanted inside the eye to wirelessly monitor the intraocular pressure of glaucoma patients. It includes a five-stage RF rectifier with an on-chip antenna, a dc voltage limiter, two voltage sensors, a low dropout voltage regulator, and MOSCAP based on-chip storage. The chip has been designed and fabricated in a standard 0.18-μm CMOS technology. To emulate the eye environment in measurements, a custom test setup is developed that comprises Plexiglass cavities filled with saline solution. Measurements in this setup show that the proposed chip can be charged to 1 V wirelessly from a 5-W transmitter 3 cm away from the harvester chip. The energy that is stored on the 5-nF on-chip MOSCAP when charged to 1 V is 2.5 nJ, which is sufficient to drive an arbitrary 100-μW load for 9 μs at regulated 0.8 V. Simulated efficiency of the rectifier is 42% at -7 dBm of input power.

A 60-GHz CMOS Sub-Harmonic RF Receiver With Integrated On-Chip Artificial-Magnetic-Conductor Yagi Antenna and Balun Bandpass Filter for Very-Short-Range Gigabit Communications

This paper presents a first reported 60-GHz CMOS sub-harmonic RF receiver with an integrated on-chip artificial-magnetic-conductor (AMC) Yagi antenna and a balun bandpass filter (BPF) fabricated in 90-nm technology. The on-chip antenna with an AMC structure can reduce the substrate loss and increase the antenna radiation efficiency and power gain. The on-chip balun BPF combines the integrated design of the balun and RF BPF to reduce the circuit size and the insertion loss. The sub-harmonic receiver is adopted to mitigate the dc offset problem. The probe-station based on-wafer continuous wave wireless transmission test is conducted ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i> =1 m) and the measured total receiving conversion gain CG <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ant+Rx</sub> and output third-order intercept point of the integrated RF receiver (with the on-chip AMC antenna and the balun BPF) are 16.2 dB and 3 dBm at 60 GHz, respectively. In error vector magnitude/bit error rate (BER) tests, the measured maximum data rate is 1.152 Gb/s in the 16QAM mode at a 25-cm wireless link (transmitting EIRP=23 dBm ) approximately with a BER of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> . The presented integrated RF receiver will be very useful for the design of a 60-GHz fully integrated CMOS single-chip radio for very-short-range communication applications.

A 94 GHz mm-Wave-to-Baseband Pulsed-Radar Transceiver with Applications in Imaging and Gesture Recognition

High-resolution mm-wave array beamformers have applications in medical imaging, gesture recognition, and navigation. A scalable array architecture for 3D imaging is proposed in which single-element phase coherent transceiver (TRX) chips, with programmable TX pulse delay capability, are mounted on a common board to realize the array. This paper presents the design of the enabling TRX chip: a highly integrated 94 GHz phase-coherent pulsed-radar with on-chip antennas. The TRX achieves 10 GHz of frequency tuning range and 300 ps of contiguous pulse position control, enabling its usage in the large-array imager with time-domain TX beamforming. The TRX is capable of transmitting and receiving pulses down to 36 ps, translating to 30 GHz of bandwidth. Interferometric measurements show the TRX can obtain single-target range resolution better than 375 μm (limited by equipment). Based on delay measurements, the time of arrival rms error would be less than 1.3 ps which, if used in a 3D imaging array, leads to less than 0.36 mm of RMS error in voxel size and position.