Adhesion Of Cu Research Articles

Study of regularities and features of simultaneous contact interaction of active and inert metal melts with zirconia

ABSTRACT The mutual influence of interface processes during simultaneous contact of zirconia ceramic plate with adhesion-active Cu–Ga–Ti melt (on one side of the plate) and inert to oxides liquid copper (on other side of the plate) was studied. Wetting of ceramic with metal melts was studied by sessile drop method, the structure of the interfaces was determined using SEM. Due to the dissolution of ceramic oxygen in Cu–Ga–Ti, non-stoichiometric zirconia (ZrO2-x) is formed, then ‘surplus’ zirconium from the ZrO2-x structure dissolves in the copper melt, the stoichiometry of zirconia is restored and an additional amount of oxygen dissolves in the Cu–Ga–Ti melt. It leads to a decrease in the adhesion of Cu–Ga–Ti to ceramics, while improving the wetting of ZrO2 ceramics with copper. The ZrO2–Cu–Ga–Ti interface contains copper–titanium–oxygen intermetallides with zirconia inclusions, which does not provide adhesion of metals with solid oxides. If the contact of Cu–Ga–Ti with ZrO2 is formed before contact with liquid copper, then the interface layer contains oxidized titanium, which promotes adhesion of metal to ceramic. Thus, the design of the sample affects the processes in the studied systems in the same way as the heating mode and the amount of the active component.

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Copper (Cu) metal nanoparticles were deposited onto FTO glass using the electrodeposition method. The precursor used was CuSO4×5H2O with Na2SO4 as the inorganic additive. The formation of Cu was characterized using field emission scanning electron microscopy (FESEM), energy-dispersive X-ray spectroscopy (EDX), and X-ray diffraction (XRD). This study investigated the impacts of the electrodeposition method (direct electrodeposition vs. pulse electrodeposition), voltages (‑0.4 V and ‑0.8 V), electrodeposition time (60s to 900s) and pulse cycles (50 cycles to 300 cycles), and FTO etching (fixed to 20s etching) towards the morphology and adhesion of Cu deposited. The grain size and thickness of Cu deposited vary with deposition time and pulse cycles. The voltage of -0.4 V successfully deposits shiny, metallic brown Cu onto FTO glass. Meanwhile, the voltage of -0.8 V gives powdery brown Cu on the surface. In addition, compared to direct electrodeposition (DD), pulse electrodeposition (PD) provides a more compact and homogeneous coverage of Cu onto FTO glass. The tape-test results also indicate that FTO etching by electrolysis reduction can improve the adhesion strength between deposited thin Cu film and the FTO glass. This work demonstrates a facile electrodeposition technique with substrate etching as an effective deposition of Cu metal with the potential for application in a wide range of fields.

Anti-dewetting of Cu thin film on nanostructured black Si template for continuous CVD growth of monolayer graphene

The growth of high-quality continuous film of graphene on less than [Formula: see text]m-thick Cu film is proven to be a challenging task due to the solid-state dewetting of Cu during the high-temperature chemical vapor deposition (CVD) process. In this paper, we introduce the use of nanostructured black Si (b-Si) as a template for Cu evaporation to mitigate the dewetting of Cu thin film. Using a cold-wall CVD system at a process temperature of 825[Formula: see text]C, even Cu thickness, [Formula: see text] nm on polished SiO2/Si substrate is poor for maintaining Cu as a continuous film. If the polished SiO2/Si is replaced with SiO2/b-Si, the minimum [Formula: see text] nm is sufficient. According to the Cu trapping mechanism, moving Cu particle is trapped in the nanostructured trenches of SiO2/b-Si during annealing and CVD growth processes. Continuous monolayer graphene with a grain size of [Formula: see text]m without defect is obtained on Cu/SiO2/b-Si substrate. The improved adhesion of Cu to the SiO2/b-Si enables dry-transfer of graphene by mechanical peeling using a polyvinyl alcohol (PVA) film. Our solution is promising for obtaining flat graphene and a recyclable Cu/SiO2/b-Si substrate.

27.3: Synergistic Improvement of Photoresistance Adhesion for Cu Triple‐Layer Structure

In this work, we provide a rational strategy to synergistically improve the photoresistance adhesion of Cu triple‐layer structure. By using plasma treatment, the microporous structure can be formed on the surface of Cu triple‐layer, which increases the interface contact area. Subsequent wet chemical treatment can effectively increase the hydrophobic groups and improve the interface properties of Cu triple‐layer.

Influence of Glass Surface Modification on Thin Film Copper Electrodes

Large-area and ultra-high resolution displays continue to progress driven by new performance requirements and applications. As display sizes become larger, the industry demands metal electrodes with low resistance to reduce the gate delay time and signal distortion. Cu is an attractive candidate due to its relative low resistivity and its superior resistance to electromigration as opposed to materials such as Al or Mo. For bottom gate TFT technologies, the metal electrode is deposited directly on the glass substrate. Cu is known to have poor adhesion with oxide materials such as the substrate glass. Typically, an adhesion layer such as Ti, Mo, or other metal/alloy is required to improve the adhesion of Cu to the substrate. In this work, we modify Corning® Eagle XG® glass surfaces by various treatments to study the impact of the glass surface on the structural and electrical properties of Cu. Ti was used the adhesion layer in this study. Atomic force microscopy is used to examine the surface topography and the surface roughness of Cu. In-plane X-ray diffraction results characterize the crystallization and crystalline in-plane orientation of Cu. Transmission electron microscopy is used to further investigate the structure of the Ti and Cu films. The films properties are correlated with 4-point probe measurement of the sheet resistance. The film adhesion performance is determined using the tape test. The role of the glass surface state is demonstrated through its impact on the structural and electrical properties of Ti/Cu electrodes emanating from glass surface treatments.

(Invited) Improved Copper Electrode Integration for Thin Film Electronics on Glass

Increasing demand for higher resolution and larger displays continues to push research of thin film transistor materials, process, and devices. Especially, as display size become larger and pixel density increase, the signal delay becomes more critical due to high resistance of interconnects due to longer line length and smaller current carrying cross-sections. With high refresh rate and higher definition displays, the decrease of the pulse time for each pixel requires higher conductance of the interconnects to avoid non-uniformity of display performance. Thus, Cu is used as a conductor because it has low resistivity and high reliability. Incumbent Cu interconnect technologies require adhesion layers, such as Ti, Mo, or variant alloys, due to poor adhesion of Cu to glass or SiNx barriers. However, these technologies have limits such as higher resistivity of the interconnect lines due to diffusion of adhesion or barrier metal into Cu. They can also result in under-cut during pattering due to Galvanic effects in etching chemistry. The cost of processing and fabrication is another key consideration for direction of process research. Cu interconnects with the metal adhesion layer requires two step etching process to avoid the under-cut. Thus, single Cu interconnects without the use of a metal adhesion layer is promising not only because of process simplicity, but also low processing cost. A Cu alloy is a promising approach to address the issues. Most of the Cu alloy study results have high resistivity Cu interconnects due to some residue of alloy elements in the Cu lattice or grain boundary. In this study, we demonstrate single layer Cu interconnects using thin CuMn alloy as temporally adhesion layer. After short annealing of a 10 nm CuMn alloy with 500 nm of Cu film, CuMn alloy layer is converted to pure Cu and the Mn is reacted with glass to form MnOx. The formed MnOx serves as adhesion layer, binding the thin film Cu electrode to the glass substrate. After optimization of Mn concentration, alloy thickness, annealing environment, time and temperature, a resistivity lower than 1.8 µOhm·cm of the electrode was achieved. Based on this results, one step Cu etching with low resistivity Cu interconnects is feasible. We also evaluated the effect of glass surface treatment to confirm the sensitivity of this process depending on substrate preparing conditions. This process has been shown to be very stable for different display glasses with treatments. It is also compared with that of Ti/Cu stack as reference.

The role of Ru passivation and doping on the barrier and seed layer properties of Ru-modified TaN for copper interconnects.

Size reduction of the barrier and liner stack for copper interconnects is a major bottleneck in further down-scaling of transistor devices. The role of the barrier is to prevent diffusion of Cu atoms into the surrounding dielectric, while the liner (also referred to as a seed layer) ensures that a smooth Cu film can be electroplated. Therefore, a combined barrier + liner material that restricts the diffusion of Cu into the dielectric and allows for copper electro-deposition is needed. In this paper, we have explored barrier + liner materials composed of 1 and 2 monolayers (MLs) of Ru-passivated ϵ-TaN and Ru doped ϵ-TaN and focused on their interactions with Cu through the adsorption of small Cu clusters with 1-4 atoms. Moreover, different doping patterns for Ru doping in TaN are investigated to understand how selective doping of the ϵ-TaN surface influences surface stability. We found that an increased concentration of Ru atoms in the outermost Ta layer improves the adhesion of Cu. The strongest binding of the Cu atoms was found on the 100% Ru doped surface followed by the 1 ML Ru passivated surface. These two surfaces are recommended for the combined barrier + liner for Cu interconnects. The closely packed arrangements of Cu were found to exhibit weak Cu-slab and strong Cu-Cu interactions, whereas the sparse arrangements of Cu exhibit strong Cu-slab and weak Cu-Cu interactions. The Cu atoms seem to bind more favorably when they are buried in the doped or passivated surface layer due to the increase in their coordination number. This is facilitated by the surface distortion arising from the ionic radius mismatch between Ta and Ru. We also show that the strong Cu-Cu interaction alone cannot predict the association of Cu atoms as a few 2D Cu clusters showed stronger Cu-Cu interaction than the 3D clusters, highlighting the importance of Cu-surface interactions.

Characterization and evolution of the coefficient of friction during pin on disc tribotest: Comparison between C10200 Cu, AA6082-T6 Al and C36000 brass pins under varying normal loads

Abstract Cu, leaded α+β brass and Al-alloy pins were pin-on-disc (PoD) tested against steel discs using sliding speed of 0.1 m/s and contact pressures from 0.51 to 2.55 MPa. Cu/steel tribopair showed unstable coefficient of friction (CoF) evolution around 0.6, while Al/steel and brass/steel tribopairs featured stable CoF evolution, around 0.42 and 0.30 respectively. The tribosurfaces of the discs and pins were characterized by laser interferometry and microscopy. Cu/steel and Al-alloy/steel tribopairs presented oxide transfer films, but intense adhesion of Cu on the discs produced unstable CoF evolution of the Cu/steel tribopair. Conversely, intense leaded-brass adhesion promoted the lowest and more stable CoF evolution of the brass/steel tribopair.

The effect of Fe vacancies and Cu adhesion on the magnetic properties of Fe3GeTe2.

Fe3GeTe2 is a promising two-dimensional magnetic material that exhibits a high Curie temperature with monolayer geometry. Using the first principles calculation method, the effects of both Fe vacancies and contact with Cu electrodes on the magnetic properties of Fe3GeTe2 are studied. Calculation results determined that Fe vacancies occur preferentially on the FeII site. As a result, the magnetic moment of FeI ions decreases significantly, while the magnetic moment of FeII increases due to the presence of the FeII vacancies. The Cu(111) layers that act as the electrodes have moderately strong bonds with Fe3GeTe2 but they are found not to distort the primary structure of the Fe3GeTe2 monolayers, thus producing a stable Cu(111)/Fe3GeTe2 interface. The magnetic moments of FeI atoms at the Fe3GeTe2 layer surface decrease substantially following the adhesion of Cu(111) layers. The effect for other Fe atoms, however, is relatively weak. These results are useful for experimental studies and can promote the applications of Fe3GeTe2 in spin electronics.

Direct copper metallization on TGV (Thru-Glass-Via) for high performance glass substrate

Abstract IoT (Internet of things) society will be coming in the near future, and everything will be connected by the Internet. Consequently, data traffic will be increased, and so will the demand to improve the performance of communication devices. Currently, plastics and ceramics are commonly used as insulating materials for communication components, but they are getting close to the limit in terms of material properties, because the next generation high performance communication devices require signal frequency of 20GHz and beyond. Therefore, further improvements in the properties of the insulating materials as well as in the performance of electronic devices are being demanded. Copper conformal metallization on glass provides many opportunities for high frequency electronic devices. The most obvious advantage is given by the material properties. The glass substrate was chosen for low conductivity and low dielectric loss for high frequency application, and for its scalability to the larger area panels with low cost. While applications require strong interfacial adhesion between copper film and glass substrate, glass is often inferior as compared to metal-to metal adhesion. Direct copper metallization on glass is conventionally a difficult task, and it usually does not provide enough peeling strength either. Therefore, forming Ni and Ti seed layers by sputtering and precursors deposited by sol-gel method are being studied. However, these processes have been limitedly used or not been used in mass production, because creation of vias and simultaneous formation of seed layers on both sides by sputtering is difficult to undertake. The Sol-gel method does not provide stable peel strength and it takes a long process. This additional process requirement to add a layer to promote the adhesion of Cu to glass burdens the factories in a couple of ways: 1) enlarging the glass substrate is difficult due to the limitation in equipment size, 2) forming the film inside the through holes is also difficult due to high-aspect ratio via requirements, and 3) high cost due to slow processing speed. In an earlier reports, we presented evidence that we have successfully demonstrated direct copper plating on glass, showing the adhesion strength of 0.42kN/m between glass and copper seed layer. In the present work, we are reporting wet plating process which enables easy and uniform film formation on large glass substrates and inside through holes. This low cost wet plating process enables forming copper film directly on glass without adhesion layer and enhancing the adhesion strength without degrading glass properties and copper conductivity.

Tribological behaviour of Cu based materials produced by mechanical milling/alloying and spark plasma sintering

Aim of the work is to investigate the tribological behaviour of Cu based materials produced by mechanical milling (MM), mechanical alloying (MA) and finally sintered by Spark Plasma Sintering (SPS). MM causes a significant strain hardening of Cu, while MA by 0.5wt%TiB2 adds a further dispersion hardening contribution. During dry sliding contact against high speed steel a close relation has been found between friction coefficient and contact temperature highlighting two regimes. The first one, occurring at an early stage of the process, is characterized by a high friction coefficient (~1), typical of the strong adhesion of Cu–Cu contact. The second one is characterized by a lower steady-state friction (~0.7) related to the change of wear mechanism from adhesive metallic into triboxidative. By increasing the load the friction coefficient decreases, the transition time from the adhesive to triboxidative friction regime decreases and the contact temperature increases. Under abrasive wear conditions the penetration depth of the indenter is progressively reduced by increasing hardness, highlighting the benefits of MM and, even more, of MA. The Cu+0.5wt.%TiB2 composite alloyed for 240min shows the best wear resistance under both wear conditions. The good wear resistance combined to high thermal conductivity represent very attractive properties for many applications.

Significantly enhancing back contact adhesion and improving stability of Cu2(Zn,Cd)Sn(S,Se)4 solar cell by a rational carbon doping strategy

Abstract The back contact adhesion is the important factor of the microstructural performance which can determine the optoelectronic properties of the kesterite-based solar cells. Here, we present a rational and effective strategy to significantly enhance the back contact adhesion of Cu 2 (Zn,Cd)Sn(S,Se) 4 (CZCTSSe) absorber layers by insetting the appropriate thickness carbon-doping CZCTS thin films. We chose the oleylamine as the carbon-doping reagent which can generate a small amount of carbon in the annealing process. The suitable thickness carbon-doping CZCTS films can significantly change the crystal growth mechanism of CZCTSSe absorber layers, and eliminate the holes in the back contact. The efficiency of CZCTSSe solar cells fabricated by insetting the appropriate thickness carbon-doping CZCTS films is above 7%, and shows the excellent repeatability and long-term air stability compared with the control devices.

Thermal Spray Coating: A New Way of Protecting Wood

Thermal spray technology was used to apply a thin layer of copper (Cu metal as an antimicrobial coating) on the surfaces of a number of different solid woods and medium-density fiberboard (MDF) wood composites. The adhesion of a Cu coating to Swietenia macrophylla (mahogany), Quercus (oak), Acer saccharinum (silver maple), Picea (spruce), Pinus strobus (white pine), and MDF was evaluated by a pull-off adhesion test. The resistance of Cu-coated samples to mildew, decay fungi, and water uptake was assessed in the lab. Also, the weathering performance of Cu-coated untreated and heat-treated spruce was evaluated. After proper surface preparation, the adhesion of Cu coatings to hardwood and softwood samples was considered very good, and the adhesion of the Cu coating to MDF was much stronger than the internal bond strength of MDF itself. The Cu coating effectively protected the wood from decay fungi and mildew, while it had no effect on the rate of water absorption and desorption from the wood. After one year of natural weathering in Toronto, Canada, the Cu-coated heat-treated spruce samples had significantly fewer checks than coated, untreated wood. Thermal spray copper coating proved to have the potential to protect wood from biological degradation while also serving as an antimicrobial coating.

Following crack path selection in multifilm structures with weak and strong interfaces by in situ 4-point-bending

Abstract

使用铜源漏电极的非晶氧化铟锌薄膜晶体管的研究

Cu was used as the source / drain( S / D) electrodes of amorphous indium-zinc-oxide( aIZO) thin-film transistors( TFTs) in order to realize low-resistance metallization in oxide thin film transistors. Cu film with a resistivity as low as 2. 0 μΩ·cm was deposited by optimizing the sputtering process. The crystal structure,adhesive property of Cu film as well as the interfaces of Cu / aIZO were investigated. In addition,a-IZO TFTs with Cu S / D electrodes were fabricated. The Cu films were polycrystalline. The adhesion of Cu to glass substrate was enhanced by introducing an aIZO film. Meanwhile,the diffusion of Cu atoms was suppressed in a-IZO. The fabricated TFT exhibited a saturated mobility of 12. 9 cm2/( V · s),a subthreshold voltage of 0. 28 V / dec and a threshold voltage of- 0. 6 V.

Role of W and Mn for reliable 1X nanometer-node ultra-large-scale integration Cu interconnects proved by atom probe tomography

We used atom probe tomography (APT) to study the use of a Cu(Mn) as a seed layer of Cu, and a Co(W) single-layer as reliable Cu diffusion barriers for future interconnects in ultra-large-scale integration. The use of Co(W) layer enhances adhesion of Cu to prevent electromigration and stress-induced voiding failures. The use of Cu(Mn) as seed layer may enhance the diffusion barrier performance of Co(W) by stuffing the Cu diffusion pass with Mn. APT was used to visualize the distribution of W and Mn in three dimensions with sub-nanometer resolution. W was found to segregate at the grain boundaries of Co, which prevents diffusion of Cu via the grain boundaries. Mn was found to diffuse from the Cu(Mn) layer to Co(W) layer and selectively segregate at the Co(W) grain boundaries with W, reinforcing the barrier properties of Co(W) layer. Hence, a Co(W) barrier coupled with a Cu(Mn) seed layer can form a sufficient diffusion barrier with film that is less than 2.0-nm-thick. The diffusion barrier behavior was preserved following a 1-h annealing at 400 °C. The underlayer of the Cu interconnects requires a large adhesion strength with the Cu, as well as low electrical resistivity. The use of Co(W) has previously been shown to satisfy these requirements, and addition of Mn is not expected to deteriorate these properties.

Effects of solvent on the formation of the MUA monolayer on Si and its diffusion barrier properties for Cu metallization

We investigated the effects of solvents, such as ethanol and isooctane, on self-assembly of the mercaptoundecanoic acid (MUA) monolayer on Si and its diffusion barrier properties for Cu metallization. The use of isooctane as a solvent produced MUA self-assembled monolayers (SAMs) (~1.3 nm thick) on Si. These acted as an effective diffusion barrier against Cu diffusion up to 200°C. In contrast, the MUA SAMs produced by ethanol allowed the diffusion of Cu to a MUA-Si interface at 200°C, stimulating the out-diffusion of Si into Cu and thus resulting in the degraded diffusion barrier properties. This was possibly due to the partial formation of interplane hydrogen bonding between the terminal groups of the bound acid and free thiol groups. This provided less dense thiol surface groups, thus leading to poor adhesion of Cu to MUA SAMs. The fabricated Cu/isooctane-assisted MUA source/drain electrode a-Si:H thin film transistors with a channel length of 10 µm exhibited an excellent electron mobility of 0.74 cm /V-s, threshold voltage of −0.51 V, I /I ratio of 3.25 × 10 , specific contact resistance of 4.24 Ω-cm after annealing at 200°C.

Optimized TSV Module for High Performance 2.5D Device Packaging

3D-IC has been increasingly adopted by the industry owing to its promise of higher device speed and package bandwidth, improved power consumption, reduced form factor, and lower cost for important applications over a wide range of industrial segments including image sensors, logic-memory and logic-logic integration, MEMS, integrated optical interposers and LEDs. This presentation is a systematic study of multiple experimental factors affecting the electrical performance, reliability and scalability of TSVs. Electrical modeling and simulation was used to determine the key factors influencing singal transmission and return losses in TSVs at high (>1 GHz) frequencies. A variety of process modules and steps for the fabrication of through silicon vias were then systematically optimized to ensure high performance. The modules evaluated include TSV etch, TSV fill, chemical mechanical polishing (CMP), pad finish, bonding schemes, wafer thinning, via reveal, passivation, wiring and bumping. One example is the improvement of TSV profile and sidewall roughness through the optimization of DRIE parameters and wet chemical methods to reduce silicon sidewall roughness from that of a typical Bosch etch to less than 10nm which is critical for adhesion of barrier/seed layer and the final reliability of 2.5D packaging. Scalability of void-free via fill process with respect to TSV diameter and depth was addressed by using highly conformal barrier layers. Adhesion of Cu to the barrier layer was also improved upon detailed analysis to prevent delamination and improve reliability. A bottom up plating chemistry with significantly low impurity content was utilized to mitigate voids, seams and excessive overburden in the TSV. Its impact on stress and delamination issues and subsequent reliability failures was studied in details. The annealing process following TSV formation is systematically studied with varying conditions and characterized with metrology and electrical tests to investigate its effect on microstructure and material properties. The process parameters were tuned for CMP of Cu, adhesion and barrier layer without causing corrosion or delamination between adjacent layers. Process requirements for these modules in TSV process are closely related. This presentation will review the process module development in the context of their effects on the integrated TSV parameters (performance, reliability and scalability). We will also provide an in-depth discussion on process module optimization, electrical and mechanical characterization and cost reduction methodologies.

Study on interfacial interaction energy of Cu–SAM–epoxy systems in a hot and humid environment

Due to poor adhesion, the interfacial delamination is one of the typical failure modes in electronic packages. In this paper, two kinds of self-assembly monolayers (SAMs), SAMA and SAME, are added to Cu–epoxy interface and the effects of temperature, moisture, and cross-link conversion on the modified interfaces are investigated with molecular dynamics (MD) simulation. The results show that the interfacial interaction energy of the systems with SAMA increases with the increasing temperature, decreasing moisture content, and cross-link conversion. However, the interfacial interaction energy of the systems with SAME decreases with the increasing temperature and moisture content, while it is reluctant to the cross-link conversion. In addition, the simulation reveals that the covalent bonds between SAMA and epoxy enhance the interfacial adhesion of Cu–epoxy. However, the nonbond interactions of SAME and epoxy resin weaken the interfacial adhesion. This paper provides a new method for research and valuation the effects of SAM or other adhesive on interfacial adhesion. MD simulation is an efficient tool in predicting the performances of materials.

Three-step H2Se/Ar/H2S reaction of Cu-In-Ga precursors for controlled composition and adhesion of Cu(In,Ga)(Se,S)2 thin films

Control of the through-film composition and adhesion are critical issues for Cu(In,Ga)Se2 (CIGS) and/or Cu(In,Ga)(Se,S)2 (CIGSS) films formed by the reaction of Cu–In–Ga metal precursor films in H2Se or H2S. In this work, CIGSS films with homogenous Ga distribution and good adhesion were formed using a three-step reaction involving: (1) selenization in H2Se at 400 °C for 60 min, (2) temperature ramp-up to 550 °C and annealing in Ar for 20 min, and (3) sulfization in H2S at 550 °C for 10 min. The 1st selenization step led to fine grain microstructure with Ga accumulation near the Mo back contact, primarily in a Cu9(In1−xGax)4 phase. The 2nd Ar anneal step produces significant grain growth with homogenous through-film Ga distribution and the formation of an InSe binary compound near the Mo back contact. The 3rd sulfization step did not result in any additional change in Ga distribution or film microstructure but a small S incorporation near the CIGSS film surface and complete reaction of InSe to form CIGSS were observed. The three-step process facilitates good control of the film properties by separating different effects of the reaction process and a film growth model is proposed. Finally, CIGSS solar cells with the three-step reaction were fabricated and devices with efficiency = 14.2% and VOC = 599 mV were obtained.