Abstract
Increasing demand for higher resolution and larger displays continues to push research of thin film transistor materials, process, and devices. Especially, as display size become larger and pixel density increase, the signal delay becomes more critical due to high resistance of interconnects due to longer line length and smaller current carrying cross-sections. With high refresh rate and higher definition displays, the decrease of the pulse time for each pixel requires higher conductance of the interconnects to avoid non-uniformity of display performance. Thus, Cu is used as a conductor because it has low resistivity and high reliability. Incumbent Cu interconnect technologies require adhesion layers, such as Ti, Mo, or variant alloys, due to poor adhesion of Cu to glass or SiNx barriers. However, these technologies have limits such as higher resistivity of the interconnect lines due to diffusion of adhesion or barrier metal into Cu. They can also result in under-cut during pattering due to Galvanic effects in etching chemistry. The cost of processing and fabrication is another key consideration for direction of process research. Cu interconnects with the metal adhesion layer requires two step etching process to avoid the under-cut. Thus, single Cu interconnects without the use of a metal adhesion layer is promising not only because of process simplicity, but also low processing cost. A Cu alloy is a promising approach to address the issues. Most of the Cu alloy study results have high resistivity Cu interconnects due to some residue of alloy elements in the Cu lattice or grain boundary. In this study, we demonstrate single layer Cu interconnects using thin CuMn alloy as temporally adhesion layer. After short annealing of a 10 nm CuMn alloy with 500 nm of Cu film, CuMn alloy layer is converted to pure Cu and the Mn is reacted with glass to form MnOx. The formed MnOx serves as adhesion layer, binding the thin film Cu electrode to the glass substrate. After optimization of Mn concentration, alloy thickness, annealing environment, time and temperature, a resistivity lower than 1.8 µOhm·cm of the electrode was achieved. Based on this results, one step Cu etching with low resistivity Cu interconnects is feasible. We also evaluated the effect of glass surface treatment to confirm the sensitivity of this process depending on substrate preparing conditions. This process has been shown to be very stable for different display glasses with treatments. It is also compared with that of Ti/Cu stack as reference.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have