Accelerated Reliability Testing Research Articles

電子デバイスはんだ接合部の熱サイクル加速信頼性試験方法

Thermal cycle tests for solder joints of electronic devices are generally performed to investigate their reliability under field service (design) conditions. It is important to clear a relationship between an accelerated test condition and a service condition and to determine a practical accelerated test condition. The relationship between an accelerated test condition and a service condition is explained by use of the solder joint fatigue curve. An accelerated reliability test condition is shown taking account of several factors such as a number of test samples, strain ranges of solder joints under accelerated test temperatures conditions, standard variations of fatigue life of solder joints, reliability and confidence level of devices under service conditions. Moreover, the cases that the standard deviation of fatigue life is known or unknown are investigated. A specific analytical and experimental result for single outline packages is shown.

Accelerated Reliability Test Inputs in Analyzing the Device Response of MgZnO Based UV Detector

ABSTRACTIn this paper we present the accelerated reliability testing of MgZnO based UV detectors. The UV detectors are fabricated on glass, quartz and sapphire substrates by Pulsed Laser Deposition (PLD) technique. The films are highly oriented and show sharp transmission at 350nm and 330nm for Mg composition of 10% and 20% in ZnO, respectively. The device response has been studied and life expectancy of the devices has been estimated from the accelerated tests.

Effects of thermomechanical cycling on lead and lead-free (SnPb and SnAgCu) surface mount solder joints

Accelerated reliability tests have been performed on leadless and leaded lead-free and lead containing SMT component assemblies. Results so far have shown that lead-free reflow soldering is a viable alternative for conventional lead based reflow soldering. The selected ternary eutectic solder alloy SnAg3.8Cu0.7 requires higher processing temperatures which could restrict the use of certain board and component types, but other than that no major modifications seem necessary. Although better SnAg3.8Cu0.7 bulk mechanical properties were obtained compared to the near eutectic lead bearing bulk solder properties, reflowed solder joints did not reflect this difference. In general, quite similar reliability results were obtained as found for the lead based solders. Dependent on board and component metallisations and use environment, the reliability of the lead-free solders could perform better or worse than the lead based solders. Temperature dependent aspects such as solderability and mechanical behaviour of the lead-free assemblies could play a role in this. Although microstructural differences can be seen between the lead-free and lead bearing solder joints, similar joint failure mechanisms occur. Resistor solder joint cracks propagate from underneath the component through either transgranular (lead-free) grains or along intergranular (lead) grain boundaries between lead-rich and tin-rich areas and into coarsened regions near the component terminations. Gullwing lead cracks were seen propagating from the heel fillet along the lead/solder interfacial intermetallic mostly (some cracks started in the heel fillet and propagated through the solder body dispersed with coarsened spherical Ag 3Sn intermetallic particles). Package design and leadframe material seem to play a more important role in the fatigue mechanism than the change in microstructure of the solder joint.

Assessment of worst case dielectric failure rate based on statistical samples with pure intrinsic failure distributions

Abstract Assessment of failure rates of integrated MOS circuits on basis of accelerated reliability testing is investigated. A procedure is proposed to predict an upper limit of dielectric failure rates for arbitrary cumulative breakdown distributions. This allows to derive a worst case number in any variety of experimental results.

Temperature measurements of metal lines under current stress by high-resolution laser probing

Accelerated reliability tests of aluminum interconnections with respect to electromigration are often performed by high current density stressing of particular structures designed to promote failures of this kind. In order to derive predictions of the interconnect lifetime under normal operating conditions, it is essential to know the temperature of the test structure when high current-density stressing conditions are applied. In this paper, we present the first experimental temperature measurements with two high spatial resolution laser probes of metal lines. The two optical probes provide an indirect access to the temperature of the metal line. The calibration of the probes for temperature measurements is performed by comparison to electrical temperature measurements. The probes have a lateral resolution of 1 /spl mu/m. Two types of test structures, used in accelerated electromigration analysis, are studied. The measurements are compared with two theoretical simulations. Good agreement is obtained only when a particular value of the thermal conductivity of the submicrometer oxide insulation layer of the metal line is used. This is not surprising, since the thermal properties of submicrometer layers are size dependant. Our experimental method provides an elegant way to determine these parameters.

HASS from concept to completion

The advent of HASS into the marketplace has enabled scores of manufacturers to reduce dramatically the number of production-related failures being shipped into their customers' hands. HASS is a screening process that uses accelerated techniques to uncover manufactured product weaknesses and flaws. The process requires the use of the HALT results, and other product specific information to design the initial profile, and then to tune it for optimal effectiveness. This paper presents the HASS development process as it was applied to an Uninterruptable Power Supply (UPS) product, in one of QualMark's Accelerated Reliability Test Centers (ARTC). This process is presented in a systematic approach to demonstrate the methods employed to create an effective screen. Copyright © 1998 John Wiley & Sons, Ltd.

An accelerated reliability test for retention after fatigue in ferroelectric memory devices

A prime advantage of ferroelectric nonvolatile memories over floating gate EEPROMs is the ability to rewrite data up to 1010 times without loss of functionality. This paper will demonstrate that data retention is not constant with increasing write cycles but degrades according to the number of switching cycles. An accelerated stress test to characterize the degradation in retention as a function of fatigue for production lots of product has been developed and used at Ramtron as a qualification test for 16K serial and 64K parallel memory devices. In this test, entire rows of memory cells with common bottom electrodes are alternately written with ones and zeros using standard semiconductor burn-in hardware with modified software. The use of complete rows allows for the separation of the memory array into fatigued and unfatigued portions which would not be possible if 1 byte or any portion of a row were fatigued due to the read/restore scheme which the entire row will see for any access within the row. Typically four adjacent rows of each device are chosen as the fatigued sample, while the rest of the memory is used as a control (unfatigued). Retention testing is performed after fatigue stress and the location of failing bits is tabulated for fatigued/ unfatigued failed bits.

A Check List for Developing Accelerated Reliability Tests

This paper provides the newcomer to or casual practitioner of environmental reliability testing with an integrated overview of important issues and considerations associated with accelerated reliability testing. These include step-stress testing, durability test time compression, and environmental stress screening. Other issues include the purpose of the test, the information needs of the customer, and the optimum level of assembly for testing. This information is presented in the form of a question and answer thought process that can be applied in commercial or military test situations.

Sheet resistance and layout effects in accelerated tests for dielectric reliability evaluation

Different extrapolation algorithms can be used to calculate gate oxide lifetime from accelerated reliability tests. The measurement is often carried out on large area capacitors in order to be statistically meaningful with respect to the active oxide area of the devices. This also allows a reduction of test time and therefore of cost. However, both the capacitor layout and the sheet resistance either of gate or of substrate or of interconnections can have a huge impact on the correctness of the experimental data. In this work it will be shown that lifetime forecast can be largely over-estimated due to series resistance. Moreover, a non-optimized layout of the capacitor can induce a non-uniform stress on the oxide due to sheet resistance effects. The validity of the accelerated test is also questionable in this case. Some guidelines to avoid errors in the collection of raw data will also be given.

Comparison of Cosi2- and Tisi2-Polycide Interconnections Tested by Conventional and High Accelerated Reliability Tests

ABSTRACTBased on 2μm-wide CoSi2-n+- and TiSi2-n+-polycide structures with a l00nm-thick silicide and a standard AlSi-metallization a comparison between conventional and the high accelerated SWEAT-test was carried out. Supported by simulations different parameters (e.g. activation energie EA) were determined by time-to-failure-measurements. Because of comparable results out of both different tests the SWEAT-test will be prefered due to short time-to-test. Also it will be shown that both silicide systems have an about three times higher activation energy for the inducing of EM-based “open”-failures than the tested standard AlSi-metallization. The failure-rate was less than 100 FIT for both polycides but because of process advantages the CoSi2-polycide should be a promissing metallization to improve the reliability of single and/or multilevel-metallization.

Method for accelerated reliability tests of centrifugal compressors

Method for accelerated reliability tests of centrifugal compressors

Influence of series resistance in oxide parameter extraction data from accelerated tests

Accelerated reliability tests on thin oxide capacitors can be affected by series resistance effects at high stress conditions. The purpose of this work is to point out such problems both with measurements and simulations. It is shown that breakdown electric field is overestimated. Due to the resulting nonuniform stress, charge to breakdown density is underestimated if the test structure layout is not accurately designed. In any case the series resistance effects can have an undesirable impact on the reliability evaluation of thin dielectrics.

Influence of series resistance in oxide parameter extraction from accelerated tests data

Accelerated reliability tests on thin oxide capacitors can be affected by series resistance effects at high stress conditions. The purpose of this work is to point out such problems, which concern both measurements and simulations. It is shown that breakdown electric field is overestimated. Due to the resulting non-uniform stress, charge density at breakdown is underestimated if the test structure layout is not accurately designed. In any case, the series resistance effects can have an undesirable impact on the reliability evaluation of thin dielectrics.

Accelerated reliability tests for corona-forming elements of electrostatic precipitators

Accelerated reliability tests for corona-forming elements of electrostatic precipitators

Evaluation of the potential usefulness of water immersion for a-Si thin film modules

Abstract Water immersion test conditions for thin film amorphous silicon photovoltaic modules were examined to address the need for an accelerated reliability test for moisture sensitivity. Initial test results conducted on immersion of EVA/Tedlar encapsulated coupons at 60, 70 and 85 °C with 0.1 – 0.3 Suns illumination indicate that the time to module failure over this temperature range conforms to an Arrhenius relationship. Comparative outdoor tests were also initiated. The water immersion test described appears to bea useful tool for rapid comparative testing of the moisture sensitivity of module designs.

Surface-mount attachment reliability of clip-leaded ceramic chip carriers on FR-4 circuit boards

The reliability of the attachment of 100 I/O ceramic chip carriers (CCs) surface mounted to FR-4 epoxy/glass circuit boards using clip-leads has been investigated. Clip-leads, commercially available from two vendors, of significantly different designs were utilized. The accelerated tests involved the accurate reproduction of the thermal and physical conditions-internal cyclic power dissipation, external thermal cycling of forced air stream, thermal gradients, mounting hardware, etc.-encountered by the product in use. The test acceleration (by acceleration factors between 12 and 20 for mean time to failure) was accomplished with shorter dwell times at the temperature extremes, resulting in 96 accelerated fatigue cycles per day. The distinct difference in lead compliancy between the two clip-lead designs is clearly reflected in the results of the accelerated reliability tests. The Type-A 'J-lead design' clip-lead (K=58 lb/in) CCs showed a median life to failure of 12000 cycles, while the Type-B 'hinged S-bend design' clip-lead (K=7.5 lb/in) CCs exhibited no failures when the test was terminated at 100000 cycles. Failure mode analysis shows that all Type-A clip-lead solder joints have failed after 48000 accelerated cycles due to the CC/substrate expansion mismatch: at 100000 accelerated cycles a significant number of clip joints showed cracks due to the solder/ceramic CC material expansion differential.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Surface Mount Solder Joint Long‐term Reliability: Design, Testing, Prediction

In this paper an overview of the issues underlying surface mount solder joint long‐term reliability is presented. The paper gives state‐of‐the‐art solutions for ‘Design for Reliability’ in simple design tool form, discusses the important accelerated reliability test issues, and provides the equations to estimate the reliability of SM product in use as well as the expected cyclic life in accelerated tests.

Failure in CMOS circuits induced by hot carriers in multi-gate transistors

The problem of vertical isolation in circuits fabricated using shallow n-well epitaxial CMOS technology is analyzed. Unexpectedly high substrate current resulting in circuit failure has been observed during accelerated reliability tests. The substrate current is a result of enhanced hole injection from multi-gate p-channel transistors with interdigitated source and drain. The electron current generated from impact ionization near the drain forward biases the source junctions, causing hole injection to the substrate. The current is sensitive to the supply voltage and temperature. Consequently, unanticipated failures may occur at the high voltages and temperatures encountered during burn-in. Design and process solutions are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Comparative Studies of Vibrational Reliability of Electroconductive Adhesive and Soldered Microjoints

Electroconductive adhesive and soldered micro-joints have been tested for reliability under vibrational loads. Electroconductive adhesive microjoints exhibited higher resistance to vibrations. Accelerated reliability tests were based on a simple physical model which permits changes in the frequency of vibrations without changing the failure mode. The model is presented too.

Component reliability assessment and assurance using a new step‐stress test

AbstractSeveral features of accelerated reliability testing are surveyed in this paper. A new technique for the practical evaluation of reliability under thermally induced acceleration is introduced. This procedure is termed the reverse‐step‐stress test, and involves a decrease in applied stress after some pre‐specified failure criterion has been met within a fixed sample of components. An analysis is presented which confirms that the reverse‐step‐stress test can reveal failures having low activation energies that would not be detectable in conventional constant‐stress, high temperature testing.