a-IGZO Transistors Research Articles

Ultra-thin top-gate insulator of atomic-layer-deposited HfOx for amorphous InGaZnO thin-film transistors

In recent years, high-k gate dielectrics have attracted increasing attention in amorphous oxide semiconductor (AOS) thin-film transistors (TFTs), due to the urge for stronger gate controllability in advanced applications of high integration density. In this work, the ultra-thin top-gate insulator of atomic-layer-deposited (ALD) HfOx was developed for the amorphous indium-gallium-zinc oxide (a-IGZO) TFTs. Despite the good electrical characteristics of the 4-nm HfOx-gated a-IGZO transistor, its reliability is considerably poor and ascribed to the abundant interface defects, for example, oxygen vacancies. The interface reaction between HfOx and a-IGZO during the ALD process is clarified to be responsible for such defect generation. To prevent the oxygen-related reaction, the a-IGZO channel is pre-treated using the strong oxidizing plasma, contributing to significantly enhanced electrical stabilities. However, the further thinner HfOx would readily increase the gate leakage current, since the electron can easily tunnel through the ultra-thin HfOx due to the low conduction band offset between HfOx and AOS. The 4-nm ALD HfOx together with the pre-oxidization contributes to the optimal performance and stability of top-gate a-IGZO TFT.

GO-HFIPPH covered a-IGZO thin film transistor for gate tunable DMMP detection

Field-effect transistor (FET) type gas sensors are showing their great attractions to researchers due to their miniature size, gate tunable sensitivity and compatibility with CMOS technology. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistors have the advantage of simple preparation method, high mobility and potential for large-scale integration, which has been widely investigated in recent years. The traditional method of obtaining selectivity of semiconductor sensing materials is to make chemical decorations directly to the semiconductor active layer, which may damage the material’s properties. In this paper, we decorate graphene oxide (GO) with p-hexafluoroisopropanol phenyl (HFIPPH) to form GO-HFIPPH, and then use GO-HFIPPH to physically modify a-IGZO TFT through self-assembly to prepare a FET-type dimethyl methylphosphonate (DMMP) sensor. The proposed sensor shows good sensitivity and selectivity to DMMP, and has a 61.1 nA response to 200 ppb DMMP with 42 s and 26 s response/recovery time. In addition, the sensing mechanism is explained based on hydrogen bond theory, heterojunction and charge transportation of the a-IGZO transistor. We believe our GO-HFIPPH/a-IGZO TFT DMMP sensor will show a significant value for FET-type gas sensor design.

Comparative Study of Atomic Layer Deposited Indium-Based Oxide Transistors with a Fermi Energy Level-Engineered Heterojunction Structure Channel through a Cation Combinatorial Approach.

Amorphous indium-gallium-zinc oxide (a-IGZO) has become a standard channel ingredient of switching/driving transistors in active-matrix organic light-emitting diode (AMOLED) televisions. However, mobile AMOLED displays with a high pixel density (≥500 pixels per inch) and good form factor do not often employ a-IGZO transistors due to their modest mobility (10-20 cm2/(V s)). Hybrid low-temperature polycrystalline silicon and oxide transistor (LTPO) technology is being adapted in high-end mobile AMOLED devices due to its ultralow power consumption and excellent current drivability. The critical issues of LTPO (including a complicated structure and high fabrication costs) require a search for alternative all-oxide thin-film transistors (TFTs) with low-cost processability and simple device architecture. The atomic layer deposition (ALD) method is a promising route for high-performance all-oxide TFTs due to its unique features, such as in situ cation composition tailoring ability, precise nanoscale thickness controllability, and excellent step coverage. Here, we report an in-depth comparative investigation of TFTs with indium-gallium oxide (IGO)/gallium-zinc oxide (GZO) and indium-zinc oxide (IZO)/GZO heterojunction stacks using an ALD method. IGO and IZO layers with different compositions were tested as a confinement layer (CL), whereas the GZO layer was used as a barrier layer (BL). Optimal IGO/GZO and IZO/GZO channels were carefully designed on the basis of their energy band properties, where the formation of a quasi-two-dimensional electron gas (q2DEG) near the CL/BL interface is realized by rational design of the band gaps and work-functions of the IGO, IZO, and GZO thin films. To verify the effect of q2DEG formation, the device performances and stabilities of TFTs with CL/BL oxide heterojunction stacks were examined and compared to those of TFTs with a single CL layer. The optimized device with the In0.75Zn0.25O/Ga0.80Zn0.20O stack showed remarkable electrical performance: μFE of 76.7 ± 0.51 cm2/(V s), VTH of -0.37 ± 0.19 V, SS of 0.13 ± 0.01 V/dec, and ION/OFF of 2.5 × 1010 with low operation voltage range of ≥2 V and excellent stabilities (ΔVTH of +0.35, -0.67, and +0.08 V for PBTS, NBIS, and CCS, respectively). This study suggests the feasibility of using high-performance ALD-derived oxide TFTs (which can compete with the performance of LTPO transistors) for high-end mobile AMOLED displays.

Vertically Stacked Full Color Quantum Dots Phototransistor Arrays for High-Resolution and Enhanced Color-Selective Imaging.

Color-selective multifunctional and multiplexed photodetectors have attracted considerable interest with the increasing demand for color filter-free optoelectronics which can simultaneously process multispectral signal via minimized system complexity. The low efficiency of color-filter technology and conventional laterally pixelated photodetector array structures often limit opportunities for widespread realization of high-density photodetectors. Here, low-temperature solution-processed vertically stacked full color quantum dot (QD) phototransistor arrays are developed on plastic substrates for high-resolution color-selective photosensor applications. Particularly, the three different-sized/color (RGB) QDs are vertically stacked and pixelated via direct photopatterning using a unique chelating chalcometallate ligand functioning both as solubilizing component and, after photoexposure, a semiconducting cement creating robust, insoluble, and charge-efficient QD layers localized in the a-IGZO transistor region, resulting in efficient wavelength-dependent photo-induced charge transfer. Thus, high-resolution vertically stacked full color QD photodetector arrays are successfully implemented with the density of 5500 devices cm-2 on ultrathin flexible polymeric substrates with highly photosensitive characteristics such as photoresponsivity (1.1 × 104 AW-1 ) and photodetectivity (1.1 × 1018 Jones) as well as wide dynamic ranges (>150dB).

Effect of trap-assisted tunneling on off-current property of a-InGaZnO thin-film transistors

We describe how the off-state current (Ioff) property of amorphous InGaZnO (a-IGZO) thin-film transistors is caused by trap-assisted tunneling (TAT) by using a two-dimensional device simulation software application (Atlas 2 D, Silvaco). We found that Ioff can be increased by controlling the bandgap energy (EG) and the effective mass of electron (me) of a-IGZO transistors. When me was increased from 0.32 to 0.38 mo (mass of a free electron), the point at which Ioff started to increase in the region of negative gate voltage (VGS) shifted from −4.7 to −7.4 V. In addition, when EG was changed from 3.05 to 3.2 eV, the average value of Ioff changed from 3.13 × 10−13 to 2.4 × 10−14 A. This implies that EG and me influence the increase in Ioff in a-IGZO TFTs because of the difficulty associated with TAT.

Amorphous-InGaZnO Thin-Film Transistors Operating Beyond 1 GHz Achieved by Optimizing the Channel and Gate Dimensions

Amorphous indium–gallium–zinc oxide (a-InGaZnO or a-IGZO) has already started replacing amorphous silicon in backplane driver transistors for large-area displays. However, hardly any progress has been made to commercialize a-IGZO for electronic circuit applications mainly because a-IGZO transistors are not yet capable of operating at gigahertz frequencies. Here, nanoscale a-IGZO thin-film transistors (TFTs) are fabricated on a high-resistivity silicon substrate with a Ta2O5 gate dielectric. Carrier mobilities up to 18.2 cm2V−1s−1 have been achieved. By optimization of the TFT channel length and contact overlap, we are able to demonstrate current gain and power gain cutoff frequencies at 1.24 and 1.14 GHz, respectively, both beyond the 1-GHz benchmark. Such a performance may have implications in developing at least medium performance, a-IGZO-TFTs-based circuits for low-cost or flexible electronics.

Ca-Doped CuO Diffusion Barrier for High-Performance <italic>a</italic>-IGZO Transistors With Cu-Based Source/Drain Material

A thermally stable Ca-doped CuOx (CuCaOx) diffusion barrier to prevent the migration of Cu to amorphous InGaZnO ( ${a}$ -IGZO) was developed by reactive sputtering and subsequent annealing. Insertion of a 5-nm-thick CaCuOx between the Ca-doped Cu (CuCa) and a-IGZO channel films in the source/drain contact regions provided the resulting transistors with superior charge transport and lower trap density compared to the diffusion barrier-free CuCa/a-IGZO transistors. The fabricated a-IGZO transistors with the CuCa/CuCaOx stack contact exhibited a high mobility of 20.8 cm $^{\textsf {2}}/\textsf {V}\cdot \textsf {s}$ and an Ion/off ratio of 108. Simultaneously, very stable behavior against the external positive/negate gate bias stress was observed for the a-IGZO thin-film transistors with the CuCa/CuCaOx stack contact. This was attributed to suppression of Cu-related acceptor-like traps due to the conformal formation of CuCaOx film with excellent barrier properties.

Enhanced electrical stability of nitrate ligand-based hexaaqua complexes solution-processed ultrathin a-IGZO transistors

We report solution-processed, amorphous indium–gallium–zinc-oxide-based (a-IGZO-based) thin-film transistors (TFTs). Our proposed solution-processed a-IGZO films, using a simple spin-coating method, were formed through nitrate ligand-based metal complexes, and they were annealed at low temperature (250 °C) to achieve high-quality oxide films and devices. We investigated solution-processed a-IGZO TFTs with various thicknesses, ranging from 4 to 16 nm. The 4 nm-thick TFT films had smooth morphology and high-density, and they exhibited excellent performance, i.e. a high saturation mobility of 7.73 ± 0.44 cm2 V−1 s−1, a sub-threshold swing of 0.27 V dec−1, an on/off ratio of ~108, and a low threshold voltage of 3.10 ± 0.30 V. However, the performance of the TFTs degraded as the film thickness was increased. We further performed positive and negative bias stress tests to examine their electrical stability, and it was noted that the operating behavior of the devices was highly stable. Despite a small number of free charges, the high performance of the ultrathin a-IGZO TFTs was attributed to the small effect of the thickness of the channel, low bulk resistance, the quality of the a-IGZO/SiO2 interface, and high film density.

Effects of hole self-trapping by polarons on transport and negative bias illumination stress in amorphous-IGZO

The effects of hole injection in amorphous indium-gallium-zinc-oxide (a-IGZO) are analyzed by means of first-principles calculations. The injection of holes in the valence band tail states leads to their capture as a polaron, with high self-trapping energies (from 0.44 to 1.15 eV). Once formed, they mediate the formation of peroxides and remain localized close to the hole injection source due to the presence of a large diffusion energy barrier (of at least 0.6 eV). Their diffusion mechanism can be mediated by the presence of hydrogen. The capture of these holes is correlated with the low off-current observed for a-IGZO transistors, as well as with the difficulty to obtain a p-type conductivity. The results further support the formation of peroxides as being the root cause of Negative Bias Illumination Stress (NBIS). The strong self-trapping substantially reduces the injection of holes from the contact and limits the creation of peroxides from a direct hole injection. In the presence of light, the concentration of holes substantially rises and mediates the creation of peroxides, responsible for NBIS.

MoS2-InGaZnO Heterojunction Phototransistors with Broad Spectral Responsivity.

We introduce an amorphous indium-gallium-zinc-oxide (a-IGZO) heterostructure phototransistor consisting of solution-based synthetic molybdenum disulfide (few-layered MoS2, with a band gap of ∼1.7 eV) and sputter-deposited a-IGZO (with a band gap of ∼3.0 eV) films as a novel sensing element with a broad spectral responsivity. The MoS2 and a-IGZO films serve as a visible light-absorbing layer and a high mobility channel layer, respectively. Spectroscopic measurements reveal that appropriate band alignment at the heterojunction provides effective transfer of the visible light-induced electrons generated in the few-layered MoS2 film to the underlying a-IGZO channel layer with a high carrier mobility. The photoresponse characteristics of the a-IGZO transistor are extended to cover most of the visible range by forming a heterojunction phototransistor that harnesses a visible light responding MoS2 film with a small band gap prepared through a large-area synthetic route. The MoS2-IGZO heterojunction phototransistors exhibit a photoresponsivity of approximately 1.7 A/W at a wavelength of 520 nm (an optical power of 1 μW) with excellent time-dependent photoresponse dynamics.

Electrical characteristics of a-IGZO transistors along the in-plane axis during outward bending

A highly flexible amorphous indium–gallium–zinc–oxide (a-IGZO) thin film transistor (TFT) was tested with respect to the in-plane axis location and device architecture in a bending system. Short channel a-IGZO TFTs were fabricated based on the conventional coplanar configuration and the islanded structure on a polyimide (PI) substrate and were then subjected to a cyclic bending of 1×105 with varying radii smaller than a few mm. Embedding the devices at a neutral position in bending system allowed them to function well when exposed to the induced mechanical strain, regardless of the difference in the structural geometry. However, placement of the TFTs outside of the neutral surface resulted in a drastic suppression of the strain-induced electrical failure for the island configuration as the distance of the TFTs from the neutral surface increased. By contrast, the conventional structure, when placed outside the neutral surface, showed strongly accelerated device failure as the strain on the TFTs was increased. The electromechanical integrity was maintained for island-structured TFTs under a bending stress with a radius of 1mm and a position margin of 50μm away from the neutral surface. The brittle and rigid characteristics of TFT arrays with inorganic components are still considered problematic in terms of being put into practical use in flexible applications; nevertheless, the high flexibility achieved by this structural design and its geometrical characterization along the in-plane axis shows the great potential for a-IGZO TFTs to serve as the functional building blocks of new platform applications, such as rolling or folding displays, by suppressing the mechanical strain in the backplane.

Conduction mechanism in amorphous InGaZnO thin film transistors

We validate a model which is a combination of multiple trapping and release and percolation model for describing the conduction mechanism in amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT). We show that using just multiple trapping and release or percolation model is insufficient to explain TFT behavior as a function of temperature. We also show the intrinsic mobility is dependent on temperature due to scattering by ionic impurities or lattice. In solving the Poisson equation to find the surface potential and back potential as a function of gate voltage, we explicitly allow for the back surface to be floating, as is the case for a-IGZO transistors. The parameters for gap states, percolation barriers and intrinsic mobility at room temperature that we extract with this comprehensive model are in good agreement with those extracted in literature with partially-complete models.

Application of Microwave Photoconductivity Decay Method to Characterization of Amorphous In-Ga-Zn-O Films

Microwave photoconductivity decay (µ-PCD) method was applied to evaluate the effects of chemical composition and Ar+ plasma induced damage on the bulk and the surface states in amorphous In-Ga-Zn-O (a-IGZO) films. It was found that the peak reflectivity signal in the photoconductivity response increased with decreasing the Ga content, and had a strong correlation with the a-IGZO transistor performances. In addition, the peak reflectivity signals obtained after various Ar+ plasma treatment duration were well correlated with the transistor characteristics. With Ar+ plasma treatment, the peak reflectivity signal decreased in accordance with degradation of transistor characteristics. The µ-PCD method was found to be a very useful tool not only to evaluate the bulk and the surface states, but also to predict the performance of a-IGZO transistors subjected to various plasma processes in the production.

Correlation of photoconductivity response of amorphous In–Ga–Zn–O films with transistor performance using microwave photoconductivity decay method

The film quality of amorphous In–Ga–Zn–O (a-IGZO), an amorphous oxide semiconductor (AOS), was studied by the microwave photoconductivity decay (μ-PCD) method. Also, μ-PCD mappings over a 6 in. wafer were undertaken. It was found that the peak signal of the decay curve had a strong correlation with the a-IGZO transistor performance and hence the film quality. The film annealed under a wet condition showed the highest mobility and had the highest peak signal. The μ-PCD method was found to be a very useful tool to evaluate the film quality and predict the performance of AOS transistors fabricated under different process conditions.