Transient effects in PD SOI MOSFETs and potential DRAM applications

Abstract

The transients in partially depleted (PD) silicon on insulator (SOI) MOSFETs produced with 0.25 and 0.13 μm technologies are studied. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both P- and N-channel devices is explained by the predominance of the impact ionisation mechanism. A pulse method to measure output I– V curves using short gate pulses has been applied to study self-heating and transient effects in 0.13 μm SOI N-MOSFETs. It is shown that under normal operating conditions the difference between DC and pulsed I– V curves of PD SOI MOSFET is attributed mainly to the floating body effect and not to self-heating. We demonstrate also that it is possible to use the body charging of PD SOI devices to store information. Based on this effect, an original 1T-DRAM cell concept is proposed (DRAM: dynamic random access memory). This cell is at least two times smaller in area than the conventional 1T/1C DRAM cell and does not require the integration of a storage capacitor. This concept allows the manufacture of low cost DRAMs and embedded DRAMs for 100 and sub-100 nm generations.