SYSTEMATIC FEEDBACK LOOP FOR SILICON DIE PICK&PLACE PROCESS IN RECONSTITUTED FAN-OUT EWLB WAFERS IN HIGH VOLUME PRODUCTION

Abstract

NANIUM S.A. Portugal recently started producing eWLB fan-out [1][2] wafer level packaging technology on 300mm reconstituted wafers. Initial setup of this process demonstrated that the stable die Pick&Place accuracy plays a key role for product feasibility. In the subsequent volume production ramp-up it became apparent that the dynamic expansion of molded eWLB wafers, caused by thermal stress and CTE mismatch throughout the thin film redistribution and passivation layer up to bumping and reflow manufacturing processes requires a very tight die position monitoring over the complete wafer diameter. Feedback loop to the initial die placement and implementation of correction measures is essential to meet the quality and yield targets of different product configurations (die sizes, distance between dies, die thickness, wafer thickness, single die or system-inpackage) in high volume manufacturing. Stability and repeatability is of outermost importance. The paper will discuss the effects seen on the wafer, the monitoring and the strategies for feedback loop process enabling implementation of corrections into the reconstituted wafer before forming the artificial backend wafer by compression molding. The setup of adequate metrology steps throughout the process line supports the control of the various interlayer alignments. The end result is a centered process in the initial Pick&Place and various subsequent lithography steps (Stepper and Mask Aligner). Sustained data availability and processed data visualization made possible the development of an elaborate theoretical model enabling systematic optimizations of machine parameters and material expansion/compression correction factors. The model also permits the immediate visualization of the impact of each machine parameter on the global result.