Implementation of Keep-Out-Zones to Protect Sensitive Sensor Areas During Backend Processing in Wafer Level Packaging Technology

Abstract

Wafer-Level Packaging (WLP) technology is quickly expanding to face the challenges of the next big wave of Internet of Things (IoT), by providing the required flexibility for high level, heterogeneous and system integration. Examples of smart sensors embedding MEMS with ASIC's in the same package, Magneto-Resistive devices with its amplifier and ASIC, bio-chips with bio-sensitive areas for Lab-on-Chip packages are part of the present. At the same time, the drive for lower packaging cost pushes the development of new solutions for the manufacturing of such new devices in WLP. In WLP process of these new devices, open zones on the Re-Distribution Layers (RDL) are often necessary to provide a physical, direct path of the embedded device to the environment. This implies the coexistence on the active side of the wafer of connection lines and pads, passivated areas with dielectrics and open areas with the same geometry precision as any other feature in RDL. This is the case, for example, for pressure MEMS, where a Si membrane must be exactly and directly exposed to the environment, or for MOEMS where a clear optical path is required. In the other hand, these open areas have also to be protected against very aggressive steps like sputtering metal depositions and chemical attacks that are part of the RDL process. The protected areas, referred as KOZ -- Keep-Out-Zones, require the development of specific RDL techniques, because the KOZs need first to be closed, to provide protection, and then opened without damage to provide a physical path, all this at wafer-level process. This paper describes the developments and results achieved towards the implementation of KOZ in WLP, both for Fan-In and Fan-Out types, using NANIUM's WLP technology know-how and manufacturing capabilities. The devised strategy makes use of the existing RDL dielectric masks for process efficiency, then applies a thick-mask over a thin-mask idea to open the KOZ with a standard, very low damage dry plasma process. Following KOZ implementation strategy, the paper discusses the materials selection to achieve the desired thickness and plasma selectivity, the assembly processes suitable for high-volume production and presents the results of KOZ implementation over MEMS on a Fan-Out wafer. The work done is part of the collaborative European ENIAC project PROMINENT (Innovative Nano-and Micro Technologies for Advanced Thermo and Mechanical Interfaces), together with a consortium of leading IDM, OEM, OSAT, material suppliers and academic/ institutes.