Abstract
A measurement of the low-level (10 −17-10 −12 A) electronic gate current in Si MOSFETs by the floating-gate technique is presented as a powerful tool to characterize the properties of defects induced in MOSFETs by hot-carrier-effects. This paper discusses the use of this technique to analyze: (i) the creation of new traps in the oxide in the gate-drain overlap region; (ii) the determination of the carrier capture properties of these traps; (iii) their localization; and (iv) their nature (interface states vs oxide traps). Finally, it is shown how the floating-gate technique is able to detect process-related reliability problems. The paper emphazises the new possibilities offered by the floating-gate technique compared to a standard characterization technique like charge-pumping.
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