Performance Evaluation of Static Random Access Memory (SRAM) based on Negative Capacitance FinFET

Abstract

Listen

Translate article

In this work, a comprehensive evaluation was performed for negative capacitance FinFET (NC-FinFET) based static random access memory (NC-SRAM) using the calibrated current-voltage relationship and dynamic behavior of NC-FinFETs that were experimentally demonstrated at 14-nm technology node. Important performance indicators of SRAM including static noise margin and standby leakage power were assessed at different values of supply voltage (V DD ). Compared with the conventional FinFET-based SRAM, it was found that NC-SRAM shows different behaviors at high V DD and low V DD . For example, at low V DD , standby leakage power consumption of NC-SRAM is higher than conventional SRAM which is different from the conclusion drew by previous works when only high V DD case was considered. Our evaluation gives new insights on the design of future NC-FinFET-based SRAMs, particularly with extremely low supply voltage.