Performance enhancement of nonvolatile memory by using a trapping layer of graphene oxide quantum dots

Abstract

In this study, we studied and fabricated two nonvolatile memory devices based on Pd/SiO2/ZnO/SiO2/p-Si and Pd/SiO2/ZnO/GOQDs/ZnO/SiO2/p-Si structures. From the device measurements, it can be seen that the ZnO/GOQDs/ZnO samples exhibit a very large memory window (up to 1.86 V) when the gate sweeping voltage is ±4 V, in contrast to a memory window (up to 1.05 V) for a single layer of ZnO sample under a gate sweeping voltage of ±8 V. The surface trap charge density of ZnO/GOQDs/ZnO samples is about 1.57 × 1011cm−2, and the charge loss is only 8% after a retention time of 104 s. These remarkable memory properties are mainly due to GOQD’s deep quantum potential traps and discrete distributions. The high potential barrier suppresses the reverse tunneling, thereby preventing leakage current. We conclude that the integration of GOQD in memory devices is compatible with semiconductor manufacturing processes, so the proposed device architecture is promising to achieve large memory window characteristics, low power consumption, and long data retention time.