Market & Technology Trends for the Fanout and 2.5D/3D Packaging Technology

Abstract

The industry is seeking alternatives to design and manufacture the latest Systems on Chips (SoCs) using System in Package (SiP) and chiplet-based approaches by leveraging Advanced Packaging to mix both the latest and mature nodes. In this regard, fan-out & 2.5D/3D packaging has emerged as the key technology choice for the heterogeneous integration. Fan-out packaging is growing at > 15% CAGR to reach ~ $3.4B by 2026. Key applications driving the fan-out are mobile, HPC, networking and automotive. Core-FO is expected to see slow growth and remain flat as many device requirements can be fulfilled by fan-in WLCSP and more reliable FCCSP configurations. HD-FO is mainly driven by application processor for high end phones and the growth will remain healthy. UHD-FO (Ultra High Density), such as FoCoS & InFO-OS, is expected to gain more traction in networking and HPC applications. With rise of the need for heterogeneous integration, 3D stacked packaging is coming at the forefront of advanced packaging arena as Moore’s law slows down due to increased cost of Si transistor scaling. 3D stacked packages are expected to grow at ~24% CAGR reaching $7.4B revenue by 2026. 3D stacked packages include SoC (System on Chip), active interposer packages such as Foveros and Co- EMIB, 3D NAND, 3DS, HBM, and Stacked CIS packages.