Comparative Study Of 3D Package Configurations In Power Delivery And Thermal Perspective

Abstract

The advanced packaging technologies including POP (package on package), SIP (system in package), embedded substrate, WLP (wafer-level package) and FO (fan-out) package have been utilized to achieve the small form-factor, high density, and high performance SOC package for mobile hand-held device. [1, 2] As the clock frequency of computation-intensive cores including CPU, GPU, and NPU increases, the impact of power delivery and temperature control of 3D package on the upper limit of performance becomes bigger and bigger. In this paper, several packaging configurations integrating high bandwidth and density DRAM and high performance SOC will be compared in terms of power delivery and thermal dissipation. POP and two kinds of SIP will be analyzed. POP has been popular packaging structure used for smart phone application, which has given small form-factor with high bandwidth DRAM package over SOC package. Although the flexibility and scalability provided by POP has been attractive in mobile terminal, SIP is being considered to maximize the performance of SOC within limited form-factor in hand-held device. Two kinds of SIP including side-by-side SIP and stacked SIP will be determined. While side-by-side SIP configuration is constructed by stacked SOC dies and stacked DRAM dies which are placed side-by-side, stacked SIP configuration is constructed by stacked DRAM dies on SOC dies which are interconnected by TSV (through silicon via). While side-by-side SIP configuration is more attractive than other configurations in thermal-perspective with several conditions, stacked SIP configuration has more advantage in terms of power delivery. Based on the power delivery network impedance and thermal violation region graph given by thermal resistance matrix [11], the comprehensive analysis including power integrity and thermal characterization will be presented with several POP and SIP configuration.