Low-power and high-speed approximate 4:2 compressors for image multiplication applications in CNFETs

Abstract

ABSTRACT Approximate computing is an emerging paradigm to make a trade-off between accuracy and hardware parameters in error resilient applications. Multiplication is one of the main operators in various digital signal processing (DSP) applications. In this paper, we propose two novel approximate 4:2 compressors based on carbon nanotube field-effect transistors (CNFETs). To evaluate the proposed designs, comprehensive simulations are carried out at both transistor and application levels. At the transistor level, all circuits are evaluated using the HSPICE simulator tool. Simulation results demonstrate remarkable improvements in terms of power consumption, delay, power-delay product (PDP), and transistor count in comparison to the previous approximate compressors. For instance, the proposed 12TAC design improves the PDP at least 33% and at most 84% compared to its counterparts at 0.65 V power supply. At the application level, we apply all designs in image multiplication by using MATLAB, and the important image quality metrics are evaluated. Finally, we use some figures of merit (FOM) that include both hardware and accuracy metrics to study the efficacy of cells. The results indicate that the proposed circuits have a better compromise between hardware and accuracy metrics.